Design Verification Engineer 47BillionDesign Verification EngineerSan Jose, CAFull timeWe are seeking DV engineers to verify complex internal IP blocks such as compute engines, accelerators, and custom logic within SoC environments.
Verification Engineer VortexlinkVerification EngineerSaratoga, CAFull timeSpecialized Verification Strategy: Develop verification infrastructure and test cases for ASICs in the area of network fabrics, leveraging your extensive experience in networking. Key Responsibilities.
DFT Engineer VBeyond CorporationDFT EngineerSanta Clara, CAFull timeGenerating collaterals for Test Timing and Place and Route. Job Description: Familiarity with the Siemens suite of DFT tools.
Sr. SW Test Engineer Visa Technology and Operations LLCSr. SW Test EngineerFoster City, CA$109,700–$170,200 / yearMasters, MBA, JD, MD)Minimum 3 years hands-on development experience • Excellent verbal and written communication skills to work well across teams • Experience with Agile Methodologies, Tools (Jira, Confluence) • Experience with Unit, Acceptance, Performance, Non-functional test, Certification test lifecycle, BDD/TDD methodology • Experience testing software at API level using SOAP UI, Postman, REST Client etc. Open VisaNet leverages state of the art Open Software technologies to achieve these goals on commodity hardware, such as Go, Scala, Apache Kafka, Docker, Kubernetes, Aerospike, Elasticsearch etc. and involves collaboration with exceptional group of software engineers, systems performance engineers, security specialists, DevOps engineers, payment experts, infrastructure and solution architects.
Test Engineer III Pinnacle Technical ResourcesTest Engineer IIICupertino,, California$65–$70 / hourContractorThe specific compensation for this position will be determined by a number of factors, including the scope, complexity and location of the role as well as the cost of labor in the market; the skills, education, training, credentials and experience of the candidate; and other conditions of employment. Successfully placed or hired candidates would only be asked for banking details after accepting an offer from us during our official onboarding processes as part of payroll setup.
Senior iOS Engineer BC ForwardSenior iOS EngineerSan Francisco, CA$71–$71.59 / hourFull timeThe ideal candidate will have strong experience in native iOS development, iOS frameworks, and SDK integrations and a proven ability to design, build, optimize, and publish performant iOS applications. With delivery centers and offices across North America and India, we take pride in building long-term relationships and delivering excellence through innovation, collaboration, and integrity.
Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpDesign Verification Engineer Silicon EngineeringSunnyvale, CA$135,000–$155,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Verification Engineer InterSources Inc.Verification EngineerSan Jose, CADeveloped test plans, constrained-random verification environments, and generated test cases, regressions, and coverage reports. The selected engineer will: Led verification efforts for complete FPGA designs in high-end router products.
Sr. ASIC Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpSr. ASIC Design Verification Engineer Silicon EngineeringSunnyvale, CA$170,000–$240,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Principal Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpPrincipal Design Verification Engineer Silicon EngineeringSunnyvale, CA$210,000–$310,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Systems Test & Verification Engineer Sr. Lockheed Martin CorpSystems Test & Verification Engineer Sr.Sunnyvale, CA$89,300–$157,550 / yearPay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $89,300 - $157,550. Desired Skills: Desired skills : 3+ years of experience performing Systems Engineering and integration activities in the aerospace industry, with a focus on ground segments or satellite communications systems.
NewPrincipal Design Verification Engineer Bright Vision TechnologiesPrincipal Design Verification EngineerSanta Clara, CAFull timeBright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations. As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology.
Senior SoC Verification Engineer Microsoft CorpSenior SoC Verification EngineerMountain View, CA$119,800–$234,700 / yearRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. To achieve this goal, the Silicon IP & Custom Products (SCIPS) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.
Verification Engineer - Aeromechanical (Design & Test) PivotalVerification Engineer - Aeromechanical (Design & Test)Palo Alto, California$115,000–$145,000 / yearDemonstrates a proactive safety mindset by embedding safety into daily operations, identifying and mitigating risks through assessments and training, encouraging open dialogue on safety concerns, and continuously improving protocols to ensure a safe work environment. Actively seeks and values diverse stakeholder perspectives, builds cross-functional relationships, and fosters trust through empathetic, fact-based communication—committing to shared decisions for the greater good.
Sr. Design Verification Engineer Credo Semiconductor, Inc.Sr. Design Verification EngineerSan Jose, CA$130,000–$160,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. You'll develop and execute verification plans, build scalable reusable testbenches, write SV-UVM sequences, debug issues, and collaborate closely with RTL designers and firmware/application engineering teams.
NewSr. Software System Verification Engineer ShifamedSr. Software System Verification EngineerLos Gatos, CaliforniaSupira Medical, a clinical-stage Shifamed Portfolio Company, is developing a low-profile, high continuous flow percutaneous ventricular assist device (pVAD) to provide temporary mechanical circulatory support in high risk percutaneous coronary interventional (HRPCI) procedures as well as patients suffering from cardiogenic shock. Founded in 2009 by serial entrepreneur Amr Salahieh, Shifamed LLC is a privately held medical device innovation hub focused on the development of novel medical products to address clinical needs in the rapidly evolving fields of cardiology and ophthalmology.
ASIC Verification Engineer Cisco Systems IncASIC Verification EngineerSan Jose, CAOur group is responsible for working on the Silicon One family of chips, where we build some of the most complex ASIC chips using cutting-edge technologies and the latest industry tools and techniques. Cisco Common ASIC Group is looking for a Senior ASIC Verification Engineer to drive existing projects and engage in new development of our next generation switching systems.
Sr. Full Chip Physical Verification Engineer Silicon Engineering Space Exploration Technologies CorpSr. Full Chip Physical Verification Engineer Silicon EngineeringSunnyvale, CA$170,000–$230,000 / yearPREFERRED SKILLS AND EXPERIENCE: Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
NewPrincipal ASIC Design Verification Engineer Bright Vision TechnologiesPrincipal ASIC Design Verification EngineerSanta Clara, CaliforniaAs we continue to grow, we’re looking for a skilled Principal Design Verification Engineer – UAL & PCIe Subsystems to join our dynamic team and contribute to our mission of transforming business processes through technology. Bright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations.
System Test and Verification Engineer Stf Lockheed Martin CorpSystem Test and Verification Engineer StfSunnyvale, CA$109,200–$192,510 / yearPay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $109,200 - $192,510. Desired Skills: 5+ years of experience performing Systems Engineering and integration activities in the aerospace industry, with a focus on ground segments or satellite communications systems.
Design verification Engineer ApolisDesign verification EngineerSan Jose, CA$65–$70 / hourA bachelor’s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a Master's Degree in Electrical or Computer Engineering with at least 8 years of experience in ASIC or a related discipline. Key Skill: SV/UVM, AXI expertise, NOC/Crossbar, Performance.
ASIC Formal Verification Engineer, TPU Compute Google LLCASIC Formal Verification Engineer, TPU ComputeSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
Senior DDR IP Verification Engineer Microsoft CorpSenior DDR IP Verification EngineerMountain View, CA$119,800–$234,700 / yearRequired Qualifications: • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience • Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience • Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. To achieve this goal, the Compute Silicon & Manufacturing Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.
Senior Design Verification Engineer Altera SemiconductorSenior Design Verification EngineerSan Jose, CaliforniaAltera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging. As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design validation for Altera next generation IP's across the Altera FPGA IP product portfolios.
Senior Design Verification Engineer Pyramid Consulting, IncSenior Design Verification EngineerSan Jose, CA$150,000–$160,000 / yearAnalyze and debug simulation failures at the RTL and gate-level, including working with gate-level netlists and SDF timing simulations. By applying to our jobs you agree to receive calls, AI-generated calls, text messages, or emails from Pyramid Consulting, Inc. and its affiliates, and contracted partners.
Senior Design Verification Engineer Pyramid, IncSenior Design Verification EngineerSan Jose, CA$150,000–$160,000 / yearFull timeExperience verifying mixed-signal circuits, including: PLL DLL ADC DAC Strong debugging skills involving RTL, gate-level simulations, and analog/mixed-signal schematic analysis. Experience: 6–10+ Years Bachelor's degree in Electrical Engineering, Computer Engineering, or related field with 8+ years of experience, or Master's degree with 6+ years of experience.
Sr. Staff ASIC Verification Engineer Rivian Automotive IncSr. Staff ASIC Verification EngineerPalo Alto, CA$237,000–$296,000 / yearRivian may use your Candidate Personal Data for the purposes of (i) tracking interactions with our recruiting system; (ii) carrying out, analyzing and improving our application and recruitment process, including assessing you and your application and conducting employment, background and reference checks; (iii) establishing an employment relationship or entering into an employment contract with you; (iv) complying with our legal, regulatory and corporate governance obligations; (v) recordkeeping; (vi) ensuring network and information security and preventing fraud; and (vii) as otherwise required or permitted by applicable law. Rivian may share your Candidate Personal Data with (i) internal personnel who have a need to know such information in order to perform their duties, including individuals on our People Team, Finance, Legal, and the team(s) with the position(s) for which you are applying; (ii) Rivian affiliates; and (iii) Rivian's service providers, including providers of background checks, staffing services, and cloud services.
Digital - Principal Digital Verification Engineer Eliyan CorporationDigital - Principal Digital Verification EngineerCAAs an Eliyan Principal Digital Verification Engineer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow's chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be a key technical leader in developing state-of-the-art testbenches and unit/chip level test cases for best-in-class PHYs and Controllers.
Senior Design Verification Engineer MicronSenior Design Verification EngineerSan Jose, CaliforniaFraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
NewASIC Design Verification Engineer (Santa Clara, CA) Qualcomm IncASIC Design Verification Engineer (Santa Clara, CA)Santa Clara, CA$126,700–$190,100 / yearThe responsibility of the position involves comprehensive pre-silicon test planning for digital power IP''s, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.
ASIC Design Verification Engineer, TPU GoogleASIC Design Verification Engineer, TPUSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We're the driving team behind Google's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
NewASIC Design Verification Engineer, Technical Leader Cisco Systems IncASIC Design Verification Engineer, Technical LeaderSan Jose, CA$183,800–$263,600 / yearWho We Are: The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. For quota-based incentive pay, Cisco typically pays as follows: 75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and.
Sr. FPGA Verification Engineer Reliable Robotics CorporationSr. FPGA Verification EngineerMountain View, CaliforniaFPGA engineers at Reliable Robotics have a unique opportunity to work at the heart of a vertically integrated technology stack that goes all the way up to aircraft level, with a direct impact on the aircraft's capabilities and requirements. FPGA Verification Engineer, you will own the FPGA integration and test environment for multiple airborne products including their test benches & simulation, continuous integration, timing analysis, elemental analysis, and build.
ASIC Design Verification Engineer, Platforms and Devices Google LLCASIC Design Verification Engineer, Platforms and DevicesMountain View, CA$138,000–$198,000 / yearCareers Careers Skip navigation linkshomehomeHomeHomework_outlinework_outlineJobsJobsnoogler_hatnoogler_hatStudentsStudentsgooglegoogleHow we workHow we workhandymanhandymanHow we hireHow we hireperson_outlineperson_outlineYour careerYour careerhelp_outlineHelp linkfeedbackSend feedbackmore_vert HelpSend FeedbackSign inCareersCareershomeHomework_outlineJobsexpand_morenoogler_hatStudentsexpand_moregoogleHow we workexpand_morehandymanHow we hireexpand_moreperson_outlineYour careerexpand_morejob detailsarrow_backBack to jobs search. Architectural background in one or more of Caches, Hierarchies, Coherency, Memory Consistency Models, DDR, LPDDR, PCIe, Packet Processors, Security, Clock, and Power Controllers.
CPU Design Verification Engineer Google LLCCPU Design Verification EngineerMountain View, CAGoogle is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. Minimum qualifications: Bachelor"s degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
Design Verification Engineer, TPU Cloud Compute Google LLCDesign Verification Engineer, TPU Cloud ComputeSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
Senior ASIC Design Verification Engineer, Google Cloud Google LLCSenior ASIC Design Verification Engineer, Google CloudSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing with key teams working on the development of our TPUs Vertex AI for Google Cloud Google Global Networking Data Center operations systems research and much more. Were the driving force behind Googles groundbreaking innovations empowering the development of our cutting-edge AI models delivering unparalleled computing power to global services and providing the essential platforms that enable developers to build the future.
Multimedia Design Verification Engineer, Silicon Google LLCMultimedia Design Verification Engineer, SiliconMountain View, CAPlan the verification of multimedia design blocks at subsystem level by understanding the design specification, and interacting with architecture and design engineers to identify important verification scenarios. Work with designers, architects, and other stakeholders to come up with detailed test plans, dependencies, and deliverables, while representing DV status throughout the development process.
ASIC/FPGA Verification Engineer IV Lockheed Martin CorpASIC/FPGA Verification Engineer IVSunnyvale, CA$123,500–$217,695 / yearPay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $123,500 - $217,695. The Silicon Solutions team of Lockheed Martin Space is building the best ASIC/FPGA team in the world, and are seeking a highly talented and motivated ASIC & FPGA Verification Engineer who has a passion for microchip design and space.
Senior Design Verification Engineer Google LLCSenior Design Verification EngineerMountain View, CAApplyshare linkCopy linkemailEmail a friendMinimum qualificationsBachelors degree in Electrical Engineering Computer Engineering Computer Science a related field or equivalent practical experience.8 years of experience with verification methodologies and languages such as UVM and SystemVerilog. Experience with different verification techniques and methodologies including formal GLS UPF based Power simulations UVM and C based testing etc. to achieve bug-free Silicon in complex SoCs.
Principal Silicon Design Verification Engineer Microsoft CorpPrincipal Silicon Design Verification EngineerMountain View, CA$142,800–$274,800 / yearul>Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000.00 - $304,200.00 per year.
Design Verification Engineer, Digital Signal Processing Google LLCDesign Verification Engineer, Digital Signal ProcessingSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
NewDigital Verification Engineer - 1999764 Ethan Alexander GroupDigital Verification Engineer - 1999764Campbell, CaliforniaProficiency in verification test planning, test bench architecture, assertions, problem solving and debugging. Debug/triage automated regressions, run gate level simulations, and perform coverage analysis.
Design Verification Engineer - Physical AI Compute Velaura AI IncDesign Verification Engineer - Physical AI ComputeSan Jose, CAAs AI moves beyond the datacenter into robots, autonomous mobile systems, drones, and other embodied systems, traditional compute architectures are increasingly constrained by power, memory bandwidth, latency, real-time requirements, and functional safety considerations. You will help establish confidence in the correctness, performance, reliability, and safety of the architecture-from individual RTL blocks to complete HW/SW systems running real-world workloads.
FPGA Design/Verification Engineer The Structures Company, LLCFPGA Design/Verification EngineerSunnyvale, CAAs trusted partners to major aerospace OEMs and Tier 1 suppliers, we connect professionals with opportunities to grow and excel in the aviation and aerospace industries. The Structures Company is a premier national aerospace and defense staffing agency specializing in contract, contract-to-hire, and direct hire placements.
NewASIC verification engineer Hewlett Packard EnterpriseASIC verification engineerSunnyvale, CaliforniaProvide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.
CPU Processor Performance Verification Engineer Apple IncCPU Processor Performance Verification EngineerSanta Clara, CAAs a CPU Processor Performance Verification Engineer owning the verification of a certain area of performance features in a chip design, you will have responsibilities as follows: • Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon). The role involves pre-silicon performance verification as well as developing tests to characterize CPU performance, analyzing and profiling software/applications, correlating and comparing performance across silicon/system software version, and working with OS and compiler teams on performance debug and tuning.
Silicon Design Verification Engineer Advanced Micro Devices, IncSilicon Design Verification EngineerSan Jose, CaliforniaCreate and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
Principal, Design Verification Engineer, UAL and PCIe Subsystems Veracity Software IncPrincipal, Design Verification Engineer, UAL and PCIe SubsystemsSanta Clara, CAFull Name: Degree (BS/MS/PhD) – Major, University & Completion Year: Total ASIC/SoC Design Verification Experience (Years): Experience with SystemVerilog (Years – details): Experience with UVM (Years – details): Experience writing Verification Test Plans (Yes/No – details): Experience building Constrained Random Verification Environments (Yes/No – details): Experience with Coverage-Driven Verification (Yes/No – details): Experience with Python and/or Perl Scripting (Years – details): Experience using EDA Verification Tools (Specify tools): Experience with Object-Oriented Programming (Yes/No – details): Linux Experience (Years – details): C++ Programming Experience (Years – details): ARM Assembly Experience (Yes/No – details): Experience with UAL Protocol (Yes/No – details): Experience with PCIe Protocol (Years – details): Experience verifying Multi-Core SoCs (Yes/No – details): Experience with Boot Code Verification (Yes/No – details): Motivation / Reason for interest in this position: Contact Number: Email ID: LinkedIn Profile URL: Full Address (Street, City, State, Zip Code): Notice Period: Current Work Authorization Status: Expected Salary: Are you able to relocate on your own expenses and work Santa Clara, CA – Onsite?. This role involves creating sophisticated verification methodologies, writing comprehensive verification plans, developing constrained-random verification environments, debugging complex hardware issues, and collaborating closely with design engineers to ensure robust silicon validation.
Staff Verification Engineer SiFive IncStaff Verification EngineerSanta Clara, CASiFive's unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. They will need to understand the component parts of the system, create test plans and unit test benches, execute tests to ensure the design captures the architect's intent, and finally ensure verification quality through coverage metrics and other means.