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We have some of the most brilliant and hardworking people in the world working with us and our product lines are growing fast in some of the hottest state of the art fields such as Virtual Reality, Artificial Intelligence, Deep Learning and Autonomous Vehicles. You will design and implement compiler transformations, develop MLIR-based dialects and lowering passes, and optimize the performance of tile-based kernels to ensure they execute efficiently across multiple generations of NVIDIA GPU and LPU architectures.

Visualize your future . . . We Do 
NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people and our technologies, support and fund industry research around the world, and consistently deliver high-quality products. NVIDIA's culture promotes and inspires a team of world-class employees to be at the top of their game. We've created an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow. . . today. We invite you to explore the opportunities available at NVIDIA to see what your future may hold.

NVIDIA

Senior DL Compiler Engineer - CUDA Tile LPU

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Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation. Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level.

ASIC Physical Design and Timing Engineer - New College Grad 2026

Own validation of products from start to finish including test plan development, automation, design for validation requirements, resource planning, coverage metrics, test execution, bug resolution, and release to production. In this role you will be working with a team of HW/SW engineers to develop and implement complex automated test plans for our industry leading GPU accelerated computing products.

Senior High Speed SerDes Validation Engineer

Collaborate with Cross-Functional Teams: Work closely with RTL, DFX, Clocks, and other teams to devise timing closure strategies, create timing constraints, and drive timing and power convergence as well as implement ECOs. Drive Timing Analysis and Closure: Lead the timing analysis and closure processes for NVIDIA's GPUs, CPUs, LPUs, and SoCs at block level, cluster level, and full chip level.

Senior ASIC Timing Engineer

Improve Power, Performance, and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.

Nvidia

Senior Asic Design Engineer - Clocks IP

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What you'll be doing: You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on netlist-related aspects such as equivalence checking, asynchronous checking including clock domain crossing checks and MTBF analysis, logic synthesis, netlist quality checks, etc. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.

Senior Asic Physical Design Engineer, Netlisting

Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Collaborate closely with SI, materials, mixed-signal, and system teams to drive end-to-end interconnect performance.

Senior Signal Integrity Engineer – Cryogenic Interconnects

Unlike typical VLSI roles, engineers here directly shape products that define the state of the art in AI, HPC, and autonomous systems, working at a pace and scale few organizations can match. Our team drives IP design, and verification for chips of unmatched complexity — billions of transistors pushing the limits of performance and power efficiency.

Circuit Design Engineer - Standard Cell

With a targeted charter to enable best-in-class datacenter-scale performance and efficiency for our next generation of datacenter products, including CPUs and CPU+GPU Superchips. Strong understanding of multicore hardware, operating systems design, concurrency, virtual memory, caching, interrupts, device drivers and real-time programming.

Senior System Software Engineer - Performance

Create realistic enterprise environments: sandboxed replicas of issue trackers, code repositories, chat, and internal APIs, filled with synthetic or anonymized data, where agents safely run long, end-to-end tasks. Build the self-improvement loop for evolving harnesses: agents propose changes to their own skills, plugins, and harness configuration, and sandboxed evals test each one.

Agent Evaluation and Self-Improvement Engineer

Work with high-dimensional data: spot trends, tie changes to known events, summarize conclusions, and communicate results to engineers and leadership. Join a team that analyzes large-scale datacenter workloads on GPU-accelerated clusters.

Senior Software Engineer, At Scale Compute Analysis

You'll direct your own fleet of coding agents, onboard exciting new tools and technologies, and leverage deep business knowledge to point the right technology at the right problem. Develop and own agentic systems end to end — from scoping the problem with finance partners through the eval harness, retrieval quality, and cost that keep them reliable in production.

Senior Staff AI Engineer – Finance

While specific benefits vary, here are some of the ways we strive to take care of our eligible team members globally: Comprehensive health, life, and disability insurance | Commute subsidy | Employee stock ownership | Competitive retirement/pension plans | Generous vacation and personal days | Support for new parents through leave and family-care programs | Office food snacks | Mental Health and Wellbeing programs and support | Employee Resource Groups | Global Employee Assistance Program | Training and development programs | Volunteering and donation matching program. This position requires the incumbent to have a sufficient knowledge of English to have professional verbal and written exchanges in this language since the performance of the duties related to this position requires frequent and regular communication with colleagues and partners located worldwide and whose common language is English.

YEAR

Unity Technologies

Senior Machine Learning Engineer

NVIDIA's Hardware Infrastructure organization develops, deploys, and runs engineering infrastructure on large-scale, distributed cloud computing systems with 1000s of heterogeneous servers and petabytes of high-performance shared storage. Collaborate with internal customers and partners, working with technical teams to build and implement efficient software storage systems that improve engineering efficiency and benefit NVIDIA's business.

NVIDIA Corp

Senior Storage Infrastructure Software Engineer

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We are seeking a highly motivated Senior HPC Support Engineer focussing on InfiniBand and NVLink technology, passionate about data center and networking technologies, to provide comprehensive solutions for sophisticated installations, maintenance, or operations for a broad scope of groundbreaking networking products. What you will be doing: Ability to resolve sophisticated customer concerns and technical issues through meticulous research, reproduction, and solving problems for customers installing our products and supporting systems using Linux Operating Systems (Multi-distro), with the focus on NVIDIA InfiniBand, NVLink and GPU Technology and our End-to-End Solutions.

Senior HPC Support Engineer, InfiniBand - NVLink

Recently, we curated Open Thoughts, one of the best open reasoning datasets used by multiple frontier labs, trained SOTA specialized models such as Bespoke-MiniChart-7B and Bespoke-MiniCheck, and taught agents to do multi-turn tool-calling with reinforcement learning. You will build the pipelines that mass-produce them, design the complex coding worlds agents train inside, and keep pushing throughput: more environments, higher quality, less manual work per task.

BespokeLabs AI Inc

RL Environments Engineer

Build isolated, contributor-safe CI that validates external pull requests without touching internal infrastructure, and the end-to-end path from starter issue to contribution guide to automated review - including a check that screens each PR for quality signal before a maintainer looks at it. It means driving adoption, designing governance, building the infrastructure and automation a community runs on, and the roadmap that takes DSX OS projects from newly public to actively, sustainably built with the community.

Growth Engineer, Developer Platform

We are seeking a highly motivated Senior HPC Support Engineer - Ethernet / AI Infrastructure to be engaging with our prestige customers, passionate about data center and networking technologies, to provide comprehensive solutions for sophisticated installations, maintenance, or operations for a broad scope of groundbreaking networking products. What you will be doing: Ability to resolve sophisticated customer concerns and technical issues through meticulous research, reproductions, and solving problems for customers installing our products and supporting systems using Linux Operating Systems (multi-distro), with the focus on NVIDIA Ethernet Switching technologies and our End-to-End Solutions such as NVIDIA Spectrum-X.

Senior HPC Support Engineer - Ethernet and AI Infrastructure

Ways to stand out from the crowd: Understanding how library models are consumed in chip design flows (synthesis, place and route, timing closure, power analysis). We're seeking a Senior VLSI Methodology Engineer to join our team and to design automation that powers library modeling, quality checks, and release for NVIDIA's PD flows.

Senior Vlsi Methodology Engineer

Help in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation. What you'll be doing: Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level.

Game Engineer Jobs in San Jose, CA

Senior DL Compiler Engineer - CUDA Tile LPU NVIDIA

ASIC Physical Design and Timing Engineer - New College Grad 2026 NVIDIA

Senior High Speed SerDes Validation Engineer NVIDIA

Senior ASIC Timing Engineer NVIDIA

Senior Asic Design Engineer - Clocks IP Nvidia

Senior Asic Physical Design Engineer, Netlisting Nvidia

Senior Signal Integrity Engineer – Cryogenic Interconnects NVIDIA

Circuit Design Engineer - Standard Cell NVIDIA

Senior System Software Engineer - Performance NVIDIA

Agent Evaluation and Self-Improvement Engineer NVIDIA

Senior Software Engineer, At Scale Compute Analysis NVIDIA

Senior Staff AI Engineer – Finance NVIDIA

Senior Machine Learning Engineer Unity Technologies

Senior Storage Infrastructure Software Engineer NVIDIA Corp

Senior HPC Support Engineer, InfiniBand - NVLink NVIDIA Corp

RL Environments Engineer BespokeLabs AI Inc

Growth Engineer, Developer Platform NVIDIA Corp

Senior HPC Support Engineer - Ethernet and AI Infrastructure NVIDIA Corp

Senior Vlsi Methodology Engineer Nvidia

Asic Physical Design And Timing Engineer - New College Grad 2026 Nvidia

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