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Our team recently delivered the new PlayStation Link, PULSE Explore and PULSE Elite products, recently announced the FlexStrike and PULSE Elevate products, and are hard at work on what comes next. SIE is a dynamic technology company, delivering cutting-edge hardware and network services to more than 100 million people and an entertainment leader, home to some of the most beloved and recognizable intellectual properties (IP) in the world.

YEAR

Sony Playstation Network

Principal Wireless Protocol Architect/Engineer

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Proven experience in debugging electrical issues (e.g., signal integrity, power integrity), thermal issues (e.g., airflow, cooling design), and firmware anomalies (e.g., BIOS/UEFI, BMC). This individual will play a critical role in root cause analysis and resolution of complex issues across our server and data center platforms, involving electrical, mechanical, thermal, and firmware components.

Visualize your future . . . We Do 
NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people and our technologies, support and fund industry research around the world, and consistently deliver high-quality products. NVIDIA's culture promotes and inspires a team of world-class employees to be at the top of their game. We've created an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow. . . today. We invite you to explore the opportunities available at NVIDIA to see what your future may hold.

Nvidia

System Debug Lead Engineer

The expected base salary ranges for this position are:152,000 USD – 241,500 USD for Level 3; and 184,000 USD – 287,500 USD for Level 4. You will also be eligible for equity and benefits . You will understand workflows covering the full chip design process from inception through study, architecture, design, verification, emulation, layout, packaging, power-on and production.

NVIDIA

EDA Workflow Optimization Engineer

We are looking for a Senior Principal Engineer, Data & Machine Learning to serve as chief architect for our Data & Intelligence organization and as the senior technical authority for how SIE builds, reuses and activates trusted data and intelligence. Translate our multi-year Data & Intelligence strategy into a coherent technical strategy and target architecture, with clear principles for trusted data products, ML systems, shared intelligence, evaluation, activation and lifecycle management.

Senior Principal Engineer, Data & Machine Learning

U.S. Export Controls Disclaimer: In accordance with the U.S. Export Administration Regulations (15 CFR §743.13(b)), some roles at Intuitive Surgical may be subject to U.S. export controls for prospective employees who are nationals from countries currently on embargo or sanctions status. Certain information you provide as part of the application will be used for purposes of determining whether Intuitive Surgical will need to (i) obtain an export license from the U.S. Government on your behalf (note: the government's licensing process can take 3 to 6+ months) or (ii) implement a Technology Control Plan ("TCP") (note: typically adds 2 weeks to the hiring process).

Intuitive Surgical Inc

Sr. Simulation & Synthetic Data Engineer - Remote

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Your work will include component placement, constraint-driven routing, stack-up definition, return path and reference plane strategy, and partitioning between sensitive mixed-signal domains and high-speed digital interfaces. In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction.

Array Labs Inc

Senior High-Speed PCB Layout Engineer

In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction. To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

Staff RF Design Engineer

Hands-on experience designing high-performance platforms including compute (SoCs, FPGAs, MCUs), storage (DDR, SSDs), high-speed interfaces (PCIe, SPI, JESD204B), RF components (PAs, LNAs, switches). In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction.

Staff Electrical Design Engineer

ITAR Requirements: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction.

Lead RF PCB Layout Engineer

Hands-on experience designing high-performance platforms including compute (SoCs, FPGAs, MCUs), storage (DDR, SSDs), high-speed interfaces (PCIe, SPI, JESD204B), RF components (PAs, LNAs, switches). ITAR Requirements: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

Principal Electrical Design Engineer

Your work will include component placement, constraint-driven routing, stack-up definition, return path and reference plane strategy, and partitioning between sensitive mixed-signal domains and high-speed digital interfaces. ITAR Requirements: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.

Lead High-Speed PCB Layout Engineer

In addition, you will help architect, develop and deploy DFT methodologies for our next generation products including RTL design, Verification, pattern generation, partnering with teams like timing, physical design, software, bringup, production. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.

Senior Jtag Methodology Engineer

Senior DFT Methodology Engineer

As a Field Engineer aligned with our Partnerships team you own the technical relationship between Fireworks and the Partner ecosystems, Partner field teams, ISVs building on Strategic Partners, and the SIs that deliver AI transformation programs on Strategic Partners. Founded by the team behind PyTorch and backed by AMD, Atreides, Benchmark Capital, Index Ventures, Lightspeed, NVIDIA, Sequoia Capital, and TCV, Fireworks powers production AI with hundreds of state-of-the-art open models across text, image, embedding, audio, and multimodal workloads.

Fireworks.ai Inc

AI Field Engineer - Strategic Partnerships

At Alpha and Omega Semiconductor (AOS), we design, develop and globally supply a broad range of power semiconductors, including a wide portfolio of Power MOSFET, IGBT, IPM, TVS, GaN/SiC, Power IC and Digital Power products. You will find our products in everyday applications including personal computers, graphic cards, gaming consoles, TVs, home appliances, smart phones, power tools, and more!

Alpha and Omega Semiconductor Limited

Sr. Staff GaN Product Engineer

Intuitive Surgical

Sr. Simulation & Synthetic Data Engineer

This role is ideal for an experienced engineer who enjoys owning well‑scoped features end‑to‑end, collaborating closely with peers and senior engineers, and building reliable, user‑facing systems that operate at scale. What You'll Be Doing: Design, implement, and maintain full‑stack features across frontend, backend services, and data layers, meeting defined reliability, availability, and performance expectations.

Senior Full-Stack Software Engineer

You will work with engineering, infrastructure, research, platform, legal, compliance, and executive teams to identify risks, respond to incidents, and build resilient security programs for next-generation AI infrastructure. Experience securing containerized workloads (Docker, Enroot, Kubernetes).Knowledge of high-speed fabric security like InfiniBand PKeys/MKeys.

Senior Software Engineer, Security

Monitor end-to-end manufacturing test verification from board to system level, analyze production data, identify risks, and drive corrective actions to ensure release readiness. The expected base salary ranges for this position are:136,000 USD – 212,750 USD for Level 3; and 168,000 USD – 258,750 USD for Level 4. You will also be eligible for equity and benefits .

Senior Board Product Development Engineer

The expected base salary ranges for this position are: 136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4. You will also be eligible for equity and benefits . We’re seeking a Senior VLSI Methodology Engineer to join our team and to design automation that powers library modeling, quality checks, and release for NVIDIA’s PD flows.

Game Engineer Jobs in San Jose, CA

Principal Wireless Protocol Architect/Engineer Sony Playstation Network

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Senior Principal Engineer, Data & Machine Learning Sony Playstation Network

Sr. Simulation & Synthetic Data Engineer - Remote Intuitive Surgical Inc

Senior High-Speed PCB Layout Engineer Array Labs Inc

Staff RF Design Engineer Array Labs Inc

Staff Electrical Design Engineer Array Labs Inc

Lead RF PCB Layout Engineer Array Labs Inc

Principal Electrical Design Engineer Array Labs Inc

Lead High-Speed PCB Layout Engineer Array Labs Inc

Senior Jtag Methodology Engineer Nvidia

Senior DFT Methodology Engineer Nvidia

AI Field Engineer - Strategic Partnerships Fireworks.ai Inc

Sr. Staff GaN Product Engineer Alpha and Omega Semiconductor Limited

Sr. Simulation & Synthetic Data Engineer Intuitive Surgical

Senior Full-Stack Software Engineer Nvidia

Senior Software Engineer, Security NVIDIA

Senior Board Product Development Engineer NVIDIA

Senior VLSI Methodology Engineer NVIDIA

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