EDA Design Flow Development Engineer Intel CorpEDA Design Flow Development EngineerSanta Clara, CA$141,910–$269,100 / yearBusiness group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We are seeking an experienced EDA CAD / Tool Flow Development Engineer to develop and maintain transistor-level electromigration (EM) and IR drop analysis flows for custom IPs, embedded memories, SRAMs, analog/mixed-signal interfaces, and high-performance custom macros across advanced semiconductor technologies.
Mechanical Design Engineer TechDigitalMechanical Design EngineerSan Jose, CAKey word : Sheet Metal Design, Creo, NX, GD&T, Tolerance Analysis, Electronic Enclosures, Die-Cast, EMI, Electro-Mechanical Packaging . Exchange PCB design IDF files with ECAD/hardware teams and address mechanical integrity concerns.
Analog Circuit Design Engineer Intel CorpAnalog Circuit Design EngineerSanta Clara, CA$122,440–$232,190 / yearBachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience, or Master's degree in Electrical Engineering or Computer Engineering with 2+ years of experience, or a PhD in Electrical Engineering or Computer Engineering. Position Overview: As an Analog Circuit Design Engineer, you will play a pivotal role in designing, developing, and optimizing cutting-edge analog and mixed-signal circuits that power Intel's advanced process nodes.
Physical Design Engineer - Neuromorphic Computing Intel CorpPhysical Design Engineer - Neuromorphic ComputingSanta Clara, CA$122,440–$232,190 / yearWith a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. Our Loihi series of research chips pioneered event-driven, sparse, and massively parallel neuro-inspired processing, fueling over 100 peer-reviewed publications that validate the promise of this novel approach.
Product Engineer (Analog Design Environment) Cadence Design Systems IncProduct Engineer (Analog Design Environment)San Jose, CA$114,800–$213,200 / yearThe Product Engineer will be a Technical Evangelist for our Analog Design Environment (ADE) tools and Agentic workflows related to the circuit design which provide a powerful interactive environment for configuring and managing custom analog, RF and mixed signal circuit design and simulation. In addition to engaging with customers, this role will also hold responsibility for being a customer advocate with our R&D group to suggest and create product improvement ideas and new solutions based on customer needs and concerns.
Asic Design Engineer NvidiaAsic Design EngineerSanta Clara, CAWhat you'll be doing: Drafting microarchitecture documents and implementing high-performance, and area and power-efficient RTL to meet strictly defined development targets and specifications. Collaborating closely with architects, other designers, and pre and post silicon verification teams to deliver world-class RTL builds.
Staff Electronic Design Engineer, Infotainment Tesla IncStaff Electronic Design Engineer, InfotainmentPalo Alto, CA$100,000–$288,000 / yearTesla s Infotainment EE team designs the multi-media compute platforms behind the cabin experience in every Tesla vehicle - driving high-resolution displays, immersive audio, camera and sensor fusion, inter/intra-networking, and on-vehicle AI inference. In this role, you will own next-generation infotainment motherboards end-to-end, balancing performance, power, cost, EMC, and automotive reliability to deliver a best-in-class experience worldwide.
SerDes RTL Design Engineer Advanced Micro Devices, IncSerDes RTL Design EngineerSan Jose, CaliforniaAMD SerDes Technology team is searching for a passionate and innovative RTL design engineer to develop high-performance, multi-protocol wireline transceivers in state-of-the-art CMOS processes. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
Logic Design Engineer Advanced Micro Devices, IncLogic Design EngineerSanta Clara, CaliforniaThe successful candidate will possess excellent analytical and critical thinking skills with strong attention to detail, demonstrate the initiative and ability to independently drive tasks to successful completion, and communicate effectively across teams and stakeholders. They will bring a collaborative, team-first mindset, contribute positively to a fast-paced environment, and have the ability to mentor and guide junior engineers, fostering both technical growth and team success.
Staff High Voltage Electrical Engineer, EPC Redwood Materials IncStaff High Voltage Electrical Engineer, EPCSan Francisco, CA$190,000–$252,500 / yearResponsibilities will include: Lead the design of high voltage AC electrical systems, specifically for industrial substations (69kV to 345kV) and their integration with upstream transmission lines and downstream MV distribution. Redwood is localizing a global battery supply chain that seamlessly integrates recovery, reuse, and recycling - keeping critical minerals in circulation and driving the energy transition.
Electrical PE JobotElectrical PESan Francisco, CA$135,000–$175,000 / yearInformation collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at jobot.com/legal. Lead the design and development of electrical systems including power distribution, emergency and standby power (UPS, generators), lighting, fire alarm, and telecom systems for mission critical healthcare and pharmaceutical facilities.
High Speed Digital Design Engineer Tesla IncHigh Speed Digital Design EngineerPalo Alto, CA$100,000–$228,000 / yearThe Energy Electrical Engineering team designs the eyes, ears, and brains of Tesla's Vehicle charging & Optimus charging and residential/industrial energy storage products including Powerwall and Megapack. You ll design high-bandwidth data acquisition systems, real-time control processors with multi-gigabit interfaces, signal integrity-critical PCBs, and the digital backbones.
Senior Analog Design Engineer DustPhotonics LtdSenior Analog Design EngineerSan Jose, CA$120,000–$180,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Strong knowledge of analog/mixed‑signal circuits such as op‑amps, bandgap, regulators, comparators, equalization circuits, PLL/DLL, and phase interpolators.
Senior Design Engineer (MOSFET / IGBT) Alpha & Omega SemiconductorSenior Design Engineer (MOSFET / IGBT)Sunnyvale, CAAt Alpha and Omega Semiconductor (AOS), we design, develop and globally supply a broad range of power semiconductors, including a wide portfolio of Power MOSFET, IGBT, IPM, TVS, GaN/SiC, Power IC and Digital Power products. In this role, you will work closely with the marketing, packaging, product engineering, and integration groups to design, develop, and launch new products and next generation platforms.
NewIntegrated Circuit - Packaging Architect Engineer Advanced Micro Devices, IncIntegrated Circuit - Packaging Architect EngineerSan Jose, CaliforniaSuccessful candidate would collaborate with product design teams and technology development partners to understand future product needs and define a packaging roadmap that includes architecture, process definition, Design for Manufacturing (DFM) and Design for Yield (DFY) guidelines. Responsibilities: The Role : Advanced packaging technology leader driving packaging architecture across client, server, gaming and GPU products.
Principal PCB Physical Design Engineer Advanced Micro Devices IncPrincipal PCB Physical Design EngineerSanta Clara, CATHE ROLE: As a Principal CAD PCB Physical Design Engineer in the Network Technology Solutions Group, NTSG, you will be responsible for the PCB physical design and the technology development for AMD NTSG products in this expanding and strategic market for AMD. THE PERSON: As the Principal CAD PCB Physical Design Engineer, you will lead the design and development of AMD NTSG next-generation networking and server products.
Software Engineer - Switch Design Super Micro Computer, Inc.Software Engineer - Switch DesignSan Jose, CA$128,000–$142,000 / yearAbout Supermicro: Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. Job Summary: Supermicro is seeking a Software Engineer - Switch Design to design and development of high-performance networking software for our next-generation data center platforms.
Sr. Software Development Engineer (Applied ML)-Hardware Product Design Apple IncSr. Software Development Engineer (Applied ML)-Hardware Product DesignSunnyvale, CAYou'll join the Data Science and Visualization (DataViz) team in Hardware Engineering at Apple, working day-to-day in close partnership with Apple's Advanced Development Lab (ADL) to bring machine learning into the heart of their machining and prototyping workflows. Hands-on experience designing or extending agentic AI systems (multi-step, tool-using workflows where models plan, act, and recover) and the evaluation frameworks that keep them reliable - including ground truth that is contested, expensive, or partial, and small labeled datasets.
Senior Staff PCB Layout Design Engineer D-MatrixSenior Staff PCB Layout Design EngineerSanta Clara, CAPower Delivery Optimization: Work with Power Engineers to implement complex PDN strategies, including multi-phase VRM layouts and optimized decoupling capacitor placement for high-TDP ASICs. You will own the layout of high-complexity, high-layer-count PCBAs (20+ layers), ensuring that 112G/224G SerDes signals remain pristine and that thousands of Amps are delivered across the board with minimal loss.
Principle Design Verification Engineer SerDes/PHY Astera Labs IncPrinciple Design Verification Engineer SerDes/PHYSan Jose, CA$207,000–$230,000 / yearYou''ll partner directly with PHY analog/mixed-signal designers, digital architects, and SoC integration teams to verify multi-Gbps SerDes blocks that ship into the world''s most advanced AI platforms, including UALink, UCIe, PCIe Gen 6/Gen 7, and Ethernet-based connectivity products. Astera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity.
Design Verification Engineer, Staff Astera Labs IncDesign Verification Engineer, StaffSan Jose, CA$160,000–$195,000 / yearUsing your expertise in SystemVerilog, UVM, and problem-solving skills, youll contribute to the functional verification of cutting-edge designs supporting PCIe Gen 6/7, CXL, UALink, UCI, Ethernet, and DDR4/DDR5 protocols. Youll be responsible for the full verification lifecycle-from planning to test development to debugging and coverage closure-while collaborating with RTL designers and system validation teams.
Distinguished Engineer, Digital IC Design Marvell TechnologyDistinguished Engineer, Digital IC DesignSanta Clara, CaliforniaHighlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. As a Distinguished Engineer, you will be one of the most influential technical leaders in the organization—shaping the architecture of next-generation, high-performance scale up architectures witch ASICs that will set the pace for the entire semiconductor industry.
Timing Design Engineer Apple IncTiming Design EngineerCupertino, CAYou will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. Key responsibilities include timing sign-off, STA and sign-off flow development, ownership of IP and block level timing constraints both for regular and custom timing requirements from synthesis to sign-off to achieve sign-off quality timing constraints.
Senior RF Systems Engineer Applied MaterialsSenior RF Systems EngineerSanta Clara, CA$161,000–$221,000 / yearThe engineer will work cross-functionally with Computer-Aided Engineering (CAE), Systems Engineering, Mechanical Engineering, Electrical Engineering, Product Support, Manufacturing, Suppliers, and Global Customers to define and execute RF technology roadmaps supporting both new product introductions and sustaining engineering initiatives. The ideal candidate is comfortable moving between detailed technical problem solving and strategic technology planning, thrives in a fast-paced NPI environment, and can influence cross-functional teams to deliver innovative RF solutions that provide meaningful customer value.
Engineer, SIG Electrical Design Micron Technology IncEngineer, SIG Electrical DesignSan Jose, CA$150,545–$191,000 / yearPosition requires: Developing, designing, and verifying electronics for use in semiconductor test equipment; Designing PCBs (Printed Circuit Boards) and electronic systems including oversight of board layout and artwork; Designing digital circuits and logic such as FPGAs (Field Programmable Gate Arrays), communication buses like PCIe Express, and memory interfaces like DDR (dual data rate DRAM memory); Conducting power supply subsystem design and analog circuit design; Performing signal and power integrity analysis and simulation using tools such as hyper lynx; Working with the manufacturing and NPI teams to ensure compliance with DFM (Design for Manufacturability and DFT (Design for Testability) requirements; Debugging and analyzing electronics using laboratory tools including oscilloscopes, digital multi-meters, power supplies, probes, logic analyzers and other lab measurement equipment; Designing, developing, and building SSD test equipment; Performing design of experiments and writing reports with specific knowledge around SSD test equipment based on PCIe protocols; and. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Principal RF Design Engineer 6 Kratos DefensePrincipal RF Design Engineer 6San Jose, CA$140,000–$200,000 / yearKratos Defense & Security Solutions, Inc. (NASDAQ:KTOS) develops and fields transformative, affordable technology, platforms, and systems for United States National Security related customers, allies, and commercial enterprises. Design RF & microwave amplifier assemblies, analog control circuits, power supplies and power conditioning circuitry, and some basic digital circuitry for command-&-control and fault sensing & reporting.
Wireless MAC Design Engineer Apple IncWireless MAC Design EngineerSunnyvale, CACome join Apple's wireless silicon development effort, with its emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically coordinated engineering team. Develop MAC layer design for wireless communication SoCs, including creating microarchitecture and other documents based on system-level requirements, and writing area- and power-efficient RTL that is scalable.
ASIC/FPGA Design Engineer IV, TS/SCI Clearance Lockheed Martin CorpASIC/FPGA Design Engineer IV, TS/SCI ClearanceSunnyvale, CA$123,500–$217,695 / yearJoin Our Team as an ASIC & FPGA Engineer where you will support over 50 different programs and research and development (R&D) efforts, affecting technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions. • Proactively monitor and manage team member workloads, tracking progress against assigned tasks and labor capacity, while collaborating with project engineers and managers as needed to ensure clear communication regarding the teams execution.
Design Verification Engineer - Interface IP Etched.ai IncDesign Verification Engineer - Interface IPSan Jose, CAKey Responsibilities • End to end ownership of one or more of the following IP subsystems: PCIe, Ethernet, CPU (arc/arm), low power peripherals, sensors • Understand vendor IP configurations and handle handshake with internal IP team • Develop and maintain UVM/SystemVerilog-based verification environments to ensure functional correctness, performance, and compliance with IP specifications • Collaborate with integration and SoC DV teams to validate seamless interaction of external IPs within the broader chip architecture • Drive coverage closure and sign-off by defining metrics, analyzing gaps, and ensuring comprehensive verification across corner cases and stress scenarios. Benefits • Medical, dental, and vision packages with generous premium coverage • $500 per month credit for waiving medical benefits • Housing subsidy of $2k per month for those living within walking distance of the office • Relocation support for those moving to San Jose (Santana Row) • Various wellness benefits covering fitness, mental health, and more • Daily lunch + dinner in our office.
Sr Hardware Design Engineer CiscoSr Hardware Design EngineerSan Jose, California$154,900–$225,300 / yearThe applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $154,900.00 - $259,100.00 Non-Metro New York state & Washington state: $136,500.00 - $228,300.00 * For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Join the Cisco Low End Enterprise and Small Business switch team in developing the next generation switches for simplified and easy-to-use cloud connected edge Networks customers.
Contract Product Design FEA Engineer Iconma LLCContract Product Design FEA EngineerCupertino, CAOur Client, a Consumer Products and Software Services company, is looking for a Contract Product Design FEA Engineer for their Cupertino, CA location. MS in Mechanical Engineering, Applied Mechanics, or similar discipline required along with 3+ years of relevant experience.
Sr. ASIC Design Verification Engineer Cisco Systems IncSr. ASIC Design Verification EngineerSan Jose, CA$165,000–$241,400 / yearCollaborate with designers, architects, and software teams to debug issues during post-silicon bring-up and integration Ensure comprehensive verification coverage through code and functional coverage implementation and review Minimum Qualifications: Bachelor''s degree in electrical/computer science/computer engineering/related degree and 7+ years of related experience or Master''s in electrical/computer science/computer engineering/related degree and 4+ years of related experience, or PhD in electrical/computer science/computer engineering/related degree + 1 year of related experience. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $165,000.00 - $277,600.00 Non-Metro New York state & Washington state: $146,700.00 - $247,000.00 * For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
NewASIC Design Engineer, STA CiscoASIC Design Engineer, STASan Jose, California$155,000–$222,600 / yearThe applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $155,000.00 - $256,000.00 Non-Metro New York state & Washington state: $138,100.00 - $227,900.00 * For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and café, social interest groups, and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide.
Design Verification Engineer - Internal IP Etched.ai IncDesign Verification Engineer - Internal IPSan Jose, CABenefits Medical, dental, and vision packages with generous premium coverage $500 per month credit for waiving medical benefits Housing subsidy of $2k per month for those living within walking distance of the office Relocation support for those moving to San Jose (Santana Row) Various wellness benefits covering fitness, mental health, and more Daily lunch + dinner in our office. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents.
Contract Product Design FEA Engineer IconmaContract Product Design FEA EngineerCupertino, CA$106.94–$111.94 / hourOur Client, a Consumer Products and Software Services company, is looking for a Contract Product Design FEA Engineer for their Cupertino, CA location. MS in Mechanical Engineering, Applied Mechanics, or similar discipline required along with 3+ years of relevant experience.
Lead Compliance Engineer Heron PowerLead Compliance EngineerScotts Valley, CaliforniaWorking experience of UL1741, UL 347a , IEC 62109-1, IEC 62109-2, IEC 62040, IEC 62477, UL 9540, UL 1998, UL 840, UL 2891, UL5500, IEEE 1547, IEEE 2800. Then, in collaboration with the design engineering team, will demonstrate Heron's products meet or exceed all requirements, achieve all certifications, and successfully enter target markets.
(Mid/Sr/Staff/Princ) Layout Design Engineer (SerDes) Thrive Recruitment Agency(Mid/Sr/Staff/Princ) Layout Design Engineer (SerDes)Sunnyvale, CaliforniaIn this position you will play a key role in contributing to the development of advanced mixed-signal layout for low-power, high-speed, SERDES, sensors, PLL and other macros to be used in numerous products from high performance data center SOCs to low-power consumer SOCs. Tasks include planning and implementing block-level floor-planning, power distribution network, clock and signal routing, analog and mixed-signal transistor level layout.
(Mid/Sr/Staff/Princ) Layout Design Engineer (FinFETs/5/7/12/16nm) Thrive Recruitment Agency(Mid/Sr/Staff/Princ) Layout Design Engineer (FinFETs/5/7/12/16nm)Sunnyvale, CaliforniaIn this position you will play a key role in contributing to the development of advanced mixed-signal layout for low-power, high-speed, SERDES, sensors, PLL and other macros to be used in numerous products from high performance data center SOCs to low-power consumer SOCs. Tasks include planning and implementing block-level floor-planning, power distribution network, clock and signal routing, analog and mixed-signal transistor level layout.
Senior Principal Engineer, Hardware Application Engineering - Board & System Design Inabia Software & Consulting Inc.Senior Principal Engineer, Hardware Application Engineering - Board & System DesignSanta Clara, CAFull timeThe organization is seeking a Senior Principal Engineer specializing in Board and System Hardware Design to serve as a senior technical authority supporting customer hardware platforms built around advanced networking and AI infrastructure solutions. This is a hands-on individual contributor role requiring deep expertise in board architecture, PCB design, power delivery, thermal management, system bring-up, and productization of high-performance computing and networking platforms.
NewSystems Integration Engineer Base Power IncSystems Integration EngineerSan Carlos, CAWe are looking for a Systems Integration Engineer to help design and integrate the next generation of Base Power's residential battery storage, inverter, and microgrid interconnect device (MID) systems. BS/MS in Electrical Engineering (or related field) with 3+ years of hardware development experience, ideally in energy storage or power systems.
Electrical Engineer PilgrimElectrical EngineerRedwood City, CaliforniaLocated in Redwood City, our team pairs mechanical and electrical engineering with chemistry and biology to bring critical technologies out of the lab and into the hands of operators in the field. You'll work across PCB design, mixed-signal circuits, sensing and power management, board bring-up, and system integration - taking boards from prototype all the way to deployed systems.
(Mid/Sr/Princ) Analog/Mixed Signal Engineer (SerDes) Thrive Recruitment Agency(Mid/Sr/Princ) Analog/Mixed Signal Engineer (SerDes)Sunnyvale, CaliforniaUtilize knowledge general concepts of high-performance analog design and compare various topologies that best fit the Analog/Mixed-Signal solutions architecture to support AI application requirements. · Experience with architecture, design, and production expertise in the following areas: · High-speed data converter architectures and circuits.
(Mid/Sr/Princ) Analog/Mixed Signal Engineer (FinFets) Thrive Recruitment Agency(Mid/Sr/Princ) Analog/Mixed Signal Engineer (FinFets)Sunnyvale, CaliforniaUtilize knowledge general concepts of high-performance analog design and compare various topologies that best fit the Analog/Mixed-Signal solutions architecture to support AI application requirements. · Experience with architecture, design, and production expertise in the following areas: · High-speed data converter architectures and circuits.
Senior Engineer, Product Engineering (Manufacturing) Analog DevicesSenior Engineer, Product Engineering (Manufacturing)San Jose, CaliforniaDE performing mechanical and chemical de-processing, parallel polishing, utilizing high-resolution scanning electron microscope (SEM) and focused ion beam (FIB) and related techniques such as passive voltage contrast (PVC), Energy-dispersive X-ray spectroscopy (EDX), and in-situ nanoprobing to characterize and interpret the microstructure and material properties of the semiconductor device. DE performing failure analysis of analog/mixed signal integrated circuits by conducting fault isolation using techniques such as OBIRCH, EMMI, X-Ray and Thermal Hotspot and leveraging principles of semiconductor device physics and transistor level analog circuit.
Mixed-Signal Validation Engineer LightmatterMixed-Signal Validation EngineerMountain View, CA$186,000–$210,000 / yearThe company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. We are particularly looking for someone with expertise in architecting mixed-signal circuits to enable high-speed AMS circuits, with a strong preference for someone with experience in photonic circuits.
(Mid/Sr/Princ) Analog/Mixed Signal Engineer Thrive Recruitment Agency(Mid/Sr/Princ) Analog/Mixed Signal EngineerSunnyvale, CaliforniaUtilize knowledge general concepts of high-performance analog design and compare various topologies that best fit the Analog/Mixed-Signal solutions architecture to support AI application requirements. · Experience with architecture, design, and production expertise in the following areas: · High-speed data converter architectures and circuits.
Principal Engineer, RFIC Samsung SemiconductorPrincipal Engineer, RFICSan Jose, CA$214,060–$341,940 / yearCare for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support.
Senior Engineer, Product Engineering (Mfg.) Analog Devices IncSenior Engineer, Product Engineering (Mfg.)San Jose, CA$156,853–$164,910 / yearDE performing mechanical and chemical de-processing, parallel polishing, utilizing high-resolution scanning electron microscope (SEM) and focused ion beam (FIB) and related techniques such as passive voltage contrast (PVC), Energy-dispersive X-ray spectroscopy (EDX), and in-situ nanoprobing to characterize and interpret the microstructure and material properties of the semiconductor device. Must also possess the following (quantitative experience requirements not applicable to this section): Demonstrated Expertise (DE) analyzing manufacturing statistics using Klarity ACE, Galaxy Examinator, and PDF Solutions Exensio to perform correlation analysis between fab process data and yield, and pareto analysis to identify the top failing events.
Sr. Staff EMC Engineer Rivian Automotive IncSr. Staff EMC EngineerPalo Alto, CA$213,000–$266,000 / yearRivian may use your Candidate Personal Data for the purposes of (i) tracking interactions with our recruiting system; (ii) carrying out, analyzing and improving our application and recruitment process, including assessing you and your application and conducting employment, background and reference checks; (iii) establishing an employment relationship or entering into an employment contract with you; (iv) complying with our legal, regulatory and corporate governance obligations; (v) recordkeeping; (vi) ensuring network and information security and preventing fraud; and (vii) as otherwise required or permitted by applicable law. Rivian may share your Candidate Personal Data with (i) internal personnel who have a need to know such information in order to perform their duties, including individuals on our People Team, Finance, Legal, and the team(s) with the position(s) for which you are applying; (ii) Rivian affiliates; and (iii) Rivian's service providers, including providers of background checks, staffing services, and cloud services.
Mixed-Signal Digital Architecture Validation Engineer Lightmatter IncMixed-Signal Digital Architecture Validation EngineerMountain View, CA$186,000–$210,000 / yearThe company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. We are hiring a Mixed-Signal Digital Architecture Validation Engineer to partner with the internal engineering team at Lightmatter to deliver groundbreaking products to market.