div>Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets.
- BS in Electrical Engineering or a related field plus minimum 4 years of industry experience in analog and/or mixed-signal circuit design (or MS plus minimum 2 years of industry experience).
Santa Clara, CA30+ days ago
p>Business group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).
Job Details:
Job Description:
We are seeking a highly experienced and motivated Principal Analog Design Engineer to lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications.
p>Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $97,100 - $171,235. This is an Avionics Circuit Design Engineer role where you will work on the development, integration, and production of a sophisticated state-of the-art electronics product in a world class Integrated Product Development environment.
Sunnyvale, California30+ days ago
p style="min-height:1.5em">Taara is seeking a Senior Photonic Circuits Design Engineer to work on next-generation photonic and electronic integrated modules as part of the R&D team developing cutting-edge wireless optical communication systems based on integrated optical phased arrays. The successful candidate will own photonic circuit architecture, photonic spectral filter design, and photonic switch design within the very-large-scale photonic integrated circuits (PICs) designed at Taara.
Sunnyvale, CA30+ days ago
p>The CMOS Mixed-Signal Circuit Design Engineer contributes to the development of advanced mixed signal circuits for low-power and high performance PLLs, PVT sensors and I/O's to be used in numerous products from high performance data center SoCs to low power consumer SoCs. We specialize in developing advanced mixed signal circuits for low power, high-speed, Fin-FET mixed-signal and analog IPs that are used in numerous products from high performance data center SoCs to low power consumer SoCs.
Santa Clara, CA14 days ago
p>What we need to see: BSEE (or equivalent experience)/MS or PhD degree preferred in Electrical or Computer Engineering with 6+ years of experience with modeling and simulation digital and analog circuits and systems and associated power delivery networks. If you are looking for a significant and exciting role in improving the netlist and timing quality of our designs and if you are a strong self-starter and highly motivated individual who loves to collaborate and find solutions to hard technical problems, join us today!
Santa Clara, CA30+ days ago
If you are looking for a challenging and exciting role in improving the netlist and timing quality of our designs and if you are a self-starter and highly motivated individual who loves to collaborate and find solutions to hard technical problems, join us today! Drive the design and physical implementation of digital and/or mixed-signal analog circuit IPs for current and voltage sensing, and common Security attacks detection and protection using custom and automated tools.
Santa Clara, CA30+ days ago
If you are looking for a significant and exciting role in improving the netlist and timing quality of our designs and if you are a strong self-starter and highly motivated individual who loves to collaborate and find solutions to hard technical problems, join us today! We are now looking for a motivated Circuit Design Engineer in Power Modeling and Simulation to join our dynamic and growing Circuits Solutions Group.
Santa Clara, CA30+ days ago
If you are interested in a challenging and exciting role to improve the power delivery of our designs, loves to collaborate and find solutions to hard technical problems, join us today! Widely considered to be one of the technology world's most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package.
Santa Clara, CA30+ days ago
If you are looking for a challenging and exciting role in improving the netlist and timing quality of our designs and if you are a self-starter and highly motivated individual who loves to collaborate and find solutions to hard technical problems, join us today! • Drive the design and physical implementation of digital and/or mixed-signal analog circuit IPs for current and voltage sensing, and common Security attacks detection and protection using custom and automated tools.
p>Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $97,100 - $171,235. As a leading technology innovation company, Lockheed Martin's vast team works with partners around the world to bring proven performance to our customers' toughest challenges.
Santa Clara, CA3 days ago
p>You will be partnering with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel advanced CMOS process technologies. Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly.
ul>Bachelor's degree in electrical engineering with 20+ years of industry experience or master's degree in electrical engineering with 18+ years of experience strongly preferred. Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
Deep knowledge of ADC/DAC architectures and knowing which are suitable for given applications Deep knowledge of band-gaps, bias, op-amps, switched-cap circuits, LDOs, feedback and compensation techniques Proven expertise in the following areas: Significant knowledge of low noise design techniques Significant knowledge of high precision techniques in presence of device mismatch Experience in C / Matlab / Verilog modeling Strong device physics knowledge as it applies to analog IC designs Proven working experience in using spectrum analyzers, oscilloscopes, signal generators, etc. to validate analog designs Extensive experience working with production test engineers to firm up test plans and design for testability details. Bachelors of Science in Electric Engineering with 10+ years of relevant experience preferredDo you have a proven track record of taking chips to production in the following areas?
From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Collaborate closely with signal integrity/power integrity (SI/PI), thermal, and mechanical engineering teams to refine and optimize product package designs, test vehicles, and mock-up designs for product feasibility.
Sunnyvale, CA30+ days ago
p>In this role, the engineer will work closely with other members of the Analog and Digital Design groups, and other functions such as Clinical, Electrical Systems Engineering, Firmware Development, ATE, and Manufacturing. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines.
Sunnyvale, California30+ days ago
United States > Minneapolis : 800 Nicollet Mall, United States > Scottsdale : 8300 E. Pacesetter Way, United States > Sylmar : 15900 Valley View Court, United States > Texas > Plano : 6901 Preston Road . Continuous sitting for prolonged periods (more than 2 consecutive hours in an 8 hour day), Keyboard use (greater or equal to 50% of the workday)
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Cupertino, CA30+ days ago
p>You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best-in-class power, performance, and area (PPA). Experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.
em> Expertise in analog/digital simulator (HSPICE, Verilog, XA, Finesim) Expertise in scripting language (Perl, Python, C++) Familiarity with Cadence design, LVS/SRC tools The US base salary range that Micron Technology estimates it could pay for this full-time position is: $116,000.00 - $246,000.00 a year Additional compensation may include benefits, bonuses and equity. Proactively design and verify products to optimize all manufacturing function and provide the best cost, quality, root-cause analysis, reliability, time-to-market, and customer satisfaction Minimum Qualification: 7+ years on transistor level Analog and digital logic IC design experience using CMOS!
Redwood City, California30+ days ago
ITAR Requirements: - To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
- Hands-on experience laying out high-performance platforms including compute (SoCs, FPGAs, MCUs), storage (DDR, SSDs), high-speed interfaces (PCIe, SPI, JESD204B), RF components (PAs, LNAs, switches).
Santa Clara, CA30+ days ago
Apply transistor level integrated circuits analog IP requirements and architecture principles to study module circuit specifications. Complete layout design, conduct full-chip simulation verification, and perform layout problem analysis and positioning.
p>Job Responsibility: Analog / SERDES Circuit Design · Architect, design, and simulate analog circuit blocks that comprise the AFE, including: o Transmit (TX) circuits: line drivers, pre‑drivers, output stages o Receive (RX) circuits: front‑end amplifiers, CTLE, PGA, slicers o Clocking circuits: PLLs, DLLs, clock distribution, jitter filtering · Translate system‑ and PHY‑level requirements into robust block‑level specifications.
Examples of Core Technical Expertise · High‑speed TX and RX circuit design · Linearity, distortion, and noise analysis · Jitter generation, tolerance, and clock integrity · PLL / DLL and clocking architectures · PVT variation and automotive robustness · Advanced CMOS processes for high‑speed analog.
From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving channel behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
li>Knowledge of all facets of high speed I/O design but specifically should include DLL / PLL / FFE / CTLE / DFE, output drivers , ODT, Duty cycle correction (DCC), Training/calibration to improve timing, high speed power design and low power design. 5+ years of experience working with system on chip architecture, high-speed serial interfaces, and analog mixed-signal circuit design using advanced CMOS technology nodes.
Santa Clara, CA30+ days ago
This role will develop new tools, improve and maintain existing ones, and promote their use across various departments to achieve rapid tapeout schedules, better design quality, and efficient AI integration within our flows! What you'll be doing:
We need someone who will architect, develop, and collaborate with our software development teams to implement new in-house tools that support mixed-signal project, cell specification, and circuit deliverable tracking.
Enabling the movement towards advanced chip design, KLA''s Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. BBP flagship products include the 29xx and 39xx series which leverage Broadband Plasma technology to capture a wide range of defects with ultimate sensitivity at the optical inspection speeds needed for inline defect monitoring.
Deep expertise in integrated photonic devices-including both passive and active components-with a strong focus on electro-optic phase shifters and modulators (e.g., in thin-film lithium niobate, BTO, doped silicon, or III-V materials such as InP, GaAs, AlGaAs, InGaAsP); experience with high-speed operation (10 GHz bandwidth and beyond) is a strong plus. Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact.
Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation.
Products may include switching regulators, hot-swap eFuse, half-bridge driver and power management ICs for fast growing markets such as networking, server, telecom, notebook/server core voltage, graphic card core regulator, point-of-load (PoL) and power modules. Required Skills:
• Understand analog and mixed signal circuits including amplifiers, comparators, oscillator, references, LDO, POR, charge bumps, HV level shifts, drivers, current sensor etc.
You will translate complex technical strategy into clear direction for executives, senior engineering leaders, and strategic stakeholders, and support high‑level customer and partner conversations by articulating Ciscos AI architecture approach and lessons learned from operating CIRCUIT at scale. You will define the long-term architecture for Ciscos enterprise AI platform, encompassing agentic systems, multi-agent orchestration, LLM integration, search and AI convergence, retrieval and memory frameworks, evaluation and reliability systems, human‑in‑the‑loop controls, and scalable data pipelines.
San Jose, California30+ days ago
For more information on MPS’ benefits please view our company website at www.monolithicpower.com. Products may include switching regulators, hot-swap eFuse, haft-bridge driver and power management ICs for fast growing markets such as networking, server, telecom, notebook/server core voltage, graphic card core regulator, point-of-load (PoL) and power modules.
p>Knowledge of ARM architecture and AMBA protocol specifications Familiarity with PCIe or CXL transaction layer protocols Experience with low-power design techniques (clock gating, power gating, voltage scaling) Proficiency in scripting languages: Python, Perl, Tcl, or Shell scripting Exposure to formal verification tools for equivalence checking and property verification Familiarity with AI-assisted design tools and modern EDA technologies Experience mentoring junior engineers and leading design teams Strong technical writing skills for design specifications and documentation Excellent communication and collaboration skills in cross-functional environments. RTL Design & Microarchitecture:
• Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements.
Sunnyvale, CA30+ days ago
p>PCB Layout Design Engineer would be responsible to develop various PCB layout designs for existing and new architecture-based ECUs, and collaborate with PCBA and ECAD engineers, run simulations, create PCB layouts, participate in design direction meetings, and create a collaborative environment with internal and external team members. The ECU hardware design team's mission is to ensure our products are designed to target the growing needs of our customers while ensuring robust, well-designed hardware which meets GM specifications and testing requirements from early hardware through the production design.
Santa Clara, CA30+ days ago
Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
Santa Clara, California30+ days ago
p/>We are looking for qualified Analog circuit design engineers who have a good understanding of analog circuit and CMOS Image Sensor. As an Analog Circuit Design Engineer, you will:
- Work on detailed transistor level design of analog and mixed signal circuits for CMOS image sensors.
Santa Clara, CA30+ days ago
System level timing budgets, specs and analysis • In-depth understanding of deep submicron CMOS FinFET process and circuit design issues • Familiarity with device reliability, ESD and Latch-Up requirements • Lead layout development and understand all ESD/Latch-Up, reliability rules • Broad circuit design and implementation knowledge with significant depth • Working Knowledge of package substrate, board design and power delivery is a plus. What youll be doing: • Mixed-Signal/Analog circuit build for High Speed Memory I/O Interfaces • Solve challenge of circuit development in deep submicron CMOS FinFET processes • Take designs through productization and be involved in all stages of development • Work with multi-functional teams to optimize the designs.
p>The role will be focusing mostly on critical of LV/HV electronics, battery electronics systems and power electronics circuit design validation using electrical hardware design, control, and firmware skills to improve design for reliability engineering products in industrial and residential products. This role follows the reliability lifecycle of the product from concept to design, development, manufacturing, and field operation to design-in confirmation and grows exceptional reliability at every stage.
ChargePoint (NYSE: CHPT) is at the center of this revolution, powering one of the world's leading EV charging networks and a comprehensive set of hardware, software and mobile solutions for every charging need across North America and Europe. - Lead the electrical circuit design and development of complex boards incorporating high-performance processors, memory, networking interfaces, and analog sensors.
It is Siemens Healthineers' policy to comply fully and completely with all United States export control laws and regulations, including those implemented by the Department of Commerce through the Export Administration Regulations (EAR), by the Department of State through the International Traffic in Arms Regulations (ITAR), and by the Treasury Department through the Office of Foreign Assets Control (OFAC) sanctions regulations.". What You will do: Develop schematics comprised of FPGAs, SoCs, memories, communications devices, analog devices, ADCs, DACs, motion control devices, feedback sensors, power supplies.
San Jose, California29 days ago
Learn more at www.analog.com and on LinkedIn and X. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.
p>Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
p>InvenSense's motion tracking, audio and location platforms, and services can be found in many of the world's largest and most iconic brands including smartphones, tablets, wearables, drones, gaming devices, internet of things, automotive products, and remote controls for smart TVs. Strong skills in designing various analog/mixed-signal blocks including:
• MEMS sense amplifiers (precision switched-capacitor OPAMP) • Analog-to-Digital Converter (ADC) • Bandgap references • Charge pumps • Oscillator circuits.
Python, TCL, Perl) for design and testing is required • Evidence of exceptional ability as a lead digital IC designer • BS in Electrical Engineering • Preferred qualifications: • Familiarity with embedded digital system design is a plus • Experience with the RISC-V architecture, design and implementation • Familiarity with FPGA programming for chip testing and IP verification / emulation • Experience in digital design for medical applications for safety. We are developing a novel optical interconnect for interfacing with the brain and seeking an experienced lead digital IC designer to take a leading role in developing digital IPs and digital ASICs in our custom ICs.
Palo Alto, CA30+ days ago
The ideal candidate will demonstrate a strong understanding of microcontroller design and wireless systems, coupled with expertise in developing next-generation vehicle wireless platforms, including 5G cellular, WiFi, Bluetooth (BT), and GNSS technologies. Along with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire:
- Medical plans > plan options with $0 payroll deduction.
This is a customer-facing role that sits at the intersection of analog circuit design, design automation technology, and customer design workflows, and plays a key role in scaling next-generation analog design automation flows. We are looking for a Product Engineer to drive the development and customer adoption of Analog Design automation flows in Virtuoso, including AI Driven optimization, parasitic-aware design, and layout-driven design methodologies.