3,158 Results for

Circuit Design Engineer Jobs in Fremont, CA

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New!

Menlo Park, CA5 days ago

$150,000–$200,000 Per Year

Our platform enables enhanced visibility and mapping of orbital environments, helping operators better manage assets in low Earth orbit, particularly for small satellite and constellation-based deployments. Information collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at jobot.com/legal.

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Sunnyvale, CA4 days ago

Full-time

The ideal candidate will have strong experience in complex PCB design using Allegro, miniaturization for dense form factors, and cross-functional collaboration with EE/ME and suppliers and a proven ability to lead multi-board layouts from kick-off through tape-out while mitigating risks and ensuring high-yield builds. With delivery centers and offices across North America and India, we take pride in building long-term relationships and delivering excellence through innovation, collaboration, and integrity.

New!

Sunnyvale, CA5 days ago

$95,000–$200,000 Per Year

Information collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at jobot.com/legal. We are seeking an experienced Manufacturing Test Development Engineer to design, develop, and deploy manufacturing test solutions for complex, high‑performance hardware systems, from PCB and PCBA through full system‑level test.

Saratoga, CA30+ days ago

Full-time

If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking chips.

Saratoga, CA30+ days ago

Full-time

The candidate will be part of Design Group responsible for defining, specifying, architecting, executing and productizing leading-edge Networking devices. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking.

New!

Burlingame, CA5 days ago

$61–$65 Per Year
Full-time

The ideal candidate will have strong experience in RF hardware design, RF simulation, and RF system validation and a proven ability to deliver robust RF designs, optimize performance, and resolve complex RF issues across component, board, and system levels. With delivery centers and offices across North America and India, we take pride in building long-term relationships and delivering excellence through innovation, collaboration, and integrity.

santa clara, CA21 days ago

Full-time

with 8+ years of experience in high-speed serial links and deep knowledge of analog CMOS/BiCMOS designs in deep sub-micron process technologies. Hands-on circuit design experience of SerDes blocks like Equalizers, PLL, Phase-Interpolators, CDR, etc. for 28Gbps+ data rates.

santa clara, CA30+ days ago

What you'll be doing: As a senior team member, you will collaborate closely with other System/Software Architects, Power Integrity /Packaging experts and Product and Process engineers to understand product challenges and quantify energy efficiency improvements of integrated power delivery solutions. If you are looking for a challenging and exciting role in improving the power delivery of our designs and if you are a self-starter and highly motivated individual who loves to collaborate and find solutions to hard technical problems, join us today!

santa clara, CA30+ days ago

Ways to stand out from the crowd: Proven ownership and hands-on experience across the entire silicon design flow, from micro-architecture and RTL design to back-end execution, including Custom/Semi-Custom Circuit Design, Synthesis, Auto Place and Route, STA, and PVerf. Collaborate with cross-functional teams to improve the power, performance, area and reliability of Nvidia's next generation products through custom circuit solutions and detailed transistor-level analysis.

Santa Clara, CA30+ days ago

If you are interested in a challenging and exciting role to improve the power delivery of our designs, loves to collaborate and find solutions to hard technical problems, join us today! Widely considered to be one of the technology world's most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package.

Santa Clara, CA20 days ago

If you are looking for a challenging and exciting role in improving the netlist and timing quality of our designs and if you are a self-starter and highly motivated individual who loves to collaborate and find solutions to hard technical problems, join us today! Drive the design and physical implementation of digital and/or mixed-signal analog circuit IPs for current and voltage sensing, and common Security attacks detection and protection using custom and automated tools.

Santa Clara, CA30+ days ago

If you are looking for a significant and exciting role in improving the netlist and timing quality of our designs and if you are a strong self-starter and highly motivated individual who loves to collaborate and find solutions to hard technical problems, join us today! We are now looking for a motivated Circuit Design Engineer in Power Modeling and Simulation to join our dynamic and growing Circuits Solutions Group.

san jose, CA30+ days ago

Qualification: BS in Electrical Engineering or a related field plus minimum 4 years of industry experience in analog and/or mixed-signal circuit design (or MS plus minimum 2 years of industry experience). Responsibilities: Design analog/mixed-signal circuits such as wireline transmitters/receivers, equalizers (CTLE/DFE), PLLs, CDRs, ADCs, DACs, voltage regulators, and bandgap references.

Sunnyvale, CA21 days ago

$97,100–$171,235 Per Year

Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $97,100 - $171,235. This is an Avionics Circuit Design Engineer role where you will work on the development, integration, and production of a sophisticated state-of the-art electronics product in a world class Integrated Product Development environment.

Santa Clara, CA30+ days ago

$220,920–$311,890 Per Year

Business group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). Job Details: Job Description: We are seeking a highly experienced and motivated Principal Analog Design Engineer to lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications.

Sunnyvale, California30+ days ago

Taara is seeking a Senior Photonic Circuits Design Engineer to work on next-generation photonic and electronic integrated modules as part of the R&D team developing cutting-edge wireless optical communication systems based on integrated optical phased arrays. The role requires extensive experience in photonic design and layout—including chip-level ownership of photonic circuit design for commercial foundry tapeouts—and deep expertise in spectral filter design and communication link budgets.

Sunnyvale, CA30+ days ago

$155,000–$185,000 Per Year

The CMOS Mixed-Signal Circuit Design Engineer contributes to the development of advanced mixed signal circuits for low-power and high performance PLLs, PVT sensors and I/O's to be used in numerous products from high performance data center SoCs to low power consumer SoCs. We specialize in developing advanced mixed signal circuits for low power, high-speed, Fin-FET mixed-signal and analog IPs that are used in numerous products from high performance data center SoCs to low power consumer SoCs.

San Jose, California15 days ago

Working knowledge of digital design flow (Verilog, RTL synthesis, logic simulation, place and route), scripting languages (Perl, Python, or C++), and Verilog‑A basics, with strong written and verbal communication skills. The Non-Volatile Engineering (NVEG) NAND Flash design and verification team at Micron Technology develops advanced memory solutions that deliver leading die size, performance, reliability, and power efficiency.

santa clara, CA30+ days ago

As part of the Digital IP Team, work with other team members on the new process design challenges, have the chance to create novel low power and high performance circuits, and develop in-house design and verification flows for SRAM design that would be used on all the NVIDIA products. The base salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.

Santa Clara, CA30+ days ago

Central Engineering is the center hub providing advanced silicon IP to be used by all the other fast growing business units including Data Center, Enterprise, Optics, Custom Computing, Storage and Networking. Marvell is developing state of the art complex chips and hardware for Data Center applications and you will be exposed to leading edge technologies and have the opportunity be part of this high growth and innovative environment.

Milpitas, CA30+ days ago

$141,300–$240,200 Per Year

Enabling the movement towards advanced chip design, KLA''s Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. These tasks will require working with other engineering groups such as Mechanical, Optical, Software, Systems and Manufacturing engineering teams, ensuring design, integration and qualification at subsystem and system levels.

Santa Clara, CA30+ days ago

Apply transistor level integrated circuits analog IP requirements and architecture principles to study module circuit specifications. Complete layout design, conduct full-chip simulation verification, and perform layout problem analysis and positioning.

Cupertino, CA30+ days ago

You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best-in-class power, performance, and area (PPA). Experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.

Sunnyvale, CA11 days ago

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Collaborate closely with signal integrity/power integrity (SI/PI), thermal, and mechanical engineering teams to refine and optimize product package designs, test vehicles, and mock-up designs for product feasibility.

Sunnyvale, CA30+ days ago

$148,700–$297,300 Per Year

In this role, the engineer will work closely with other members of the Analog and Digital Design groups, and other functions such as Clinical, Electrical Systems Engineering, Firmware Development, ATE, and Manufacturing. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines.

Sunnyvale, California26 days ago

United States > Minneapolis : 800 Nicollet Mall, United States > Scottsdale : 8300 E. Pacesetter Way, United States > Sylmar : 15900 Valley View Court, United States > Texas > Plano : 6901 Preston Road . In this role, the engineer will work closely with other members of the Analog and Digital Design groups, and other functions such as Clinical, Electrical Systems Engineering, Firmware Development, ATE, and Manufacturing.

San Jose, CA30+ days ago

$116,000–$246,000 Per Year

Expertise in analog/digital simulator (HSPICE, Verilog, XA, Finesim) Expertise in scripting language (Perl, Python, C++) Familiarity with Cadence design, LVS/SRC tools The US base salary range that Micron Technology estimates it could pay for this full-time position is: $116,000.00 - $246,000.00 a year Additional compensation may include benefits, bonuses and equity. Proactively design and verify products to optimize all manufacturing function and provide the best cost, quality, root-cause analysis, reliability, time-to-market, and customer satisfaction Minimum Qualification: 7+ years on transistor level Analog and digital logic IC design experience using CMOS!

San Jose, CA30+ days ago

Design next-generation RF integrated circuits that enable ultra-high-speed interconnects for modern data centers. Work on cutting-edge mmWave and sub-THz ICs and contribute directly to Point2's core product architecture.

Santa Clara, CA30+ days ago

Ways to stand out from the crowd: • Experience with ML/DL algorithms with frameworks such as TensorFlow, PyTorch, Spark is a plus • Working with multiple levels and teams across organizations (engineering/research, product, sales and marketing teams) • Prior experience in CMOS layout drawing, including schematic-to-layout translation and DRC/LVS compliance, is a definite plus • Effective verbal/written communication, and technical presentation skills • Proven continuous learning and sharing findings across the team. • Responsible for translating the requirements into a data science problem, architect and build solutions • In charge for testing and release of models that integrate with existing machine learning and visualization tools within the organization • Responsible for analyzing the datasets, raise and validate hypotheses, extract relevant features and build models on top of them • Optimize the models and algorithms until they reach the desired QOR.

San Jose, CA30+ days ago

Remote

$191,500–$263,300 Per Year

Job Responsibility: Analog / SERDES Circuit Design · Architect, design, and simulate analog circuit blocks that comprise the AFE, including: o Transmit (TX) circuits: line drivers, pre‑drivers, output stages o Receive (RX) circuits: front‑end amplifiers, CTLE, PGA, slicers o Clocking circuits: PLLs, DLLs, clock distribution, jitter filtering · Translate system‑ and PHY‑level requirements into robust block‑level specifications. Examples of Core Technical Expertise · High‑speed TX and RX circuit design · Linearity, distortion, and noise analysis · Jitter generation, tolerance, and clock integrity · PLL / DLL and clocking architectures · PVT variation and automotive robustness · Advanced CMOS processes for high‑speed analog.

Fremont, CA30+ days ago

$161,000–$210,000 Per Year

Through comprehensive and robust analysis of large, ever-expanding datasets obtained from existing quantum processors and test devices, you will extract relevant empirical calibrations to improve the accuracy of our processor design and the performance of subsequent generations of processors. Utilize techniques and best practices in statistical analysis and machine learning to accurately calibrate various processor design parameters, leveraging the large datasets generated from measurements on our quantum processors and dedicated monitoring devices.

San Jose, CA8 days ago

$163,000–$253,000 Per Year

Knowledge of all facets of high speed I/O design but specifically should include DLL / PLL / FFE / CTLE / DFE, output drivers , ODT, Duty cycle correction (DCC), Training/calibration to improve timing, high speed power design and low power design. 5+ years of experience working with system on chip architecture, high-speed serial interfaces, and analog mixed-signal circuit design using advanced CMOS technology nodes.

santa clara, CA30+ days ago

Prior experience with script-based photonic component GDS layout and tapeout, especially experience with commercial silicon photonics foundries. Design and numerical modeling of heterogeneously integrated passive and active photonic components and circuits based on silicon and III-V materials.

Santa Clara, CA30+ days ago

Work as part of a global circuits team alongside custom circuit designers to drive timing analysis and closure of custom circuit macros (digital, semi-custom and mixed-signal analog). Knowledge of deep sub-micron process nodes and hands-on experience in modeling and converging timing in these nodes with strong scripting skills for flow automation; experience with TCL, Python is a plus.

Santa Clara, CA30+ days ago

This role will develop new tools, improve and maintain existing ones, and promote their use across various departments to achieve rapid tapeout schedules, better design quality, and efficient AI integration within our flows! What you'll be doing: We need someone who will architect, develop, and collaborate with our software development teams to implement new in-house tools that support mixed-signal project, cell specification, and circuit deliverable tracking.

Santa Clara, CA24 days ago

The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. You will be directly responsible for the full life-cycle of tool development including data storage design, UI design, testing, development, deployment, and maintenance.

santa clara, CA30+ days ago

n Prior experience with script-based photonic component GDS layout and tapeout, especially experience with commercial silicon photonics foundries \n Prior experience with demonstrated integrated optoelectronic device and circuit design and fabrication \n \nWorking Conditions\n\n Desk work, in office \n \nSafety Requirements\n \nAll employees are required to follow the site EHS procedures and Coherent Corp. D. degree or Masters +3 years of experience in optical engineering, physics, and electrical engineering \n Prior experience with solid-state physics, integrated photonics, and opto-electronics \n Prior experience with high speed electronic and photonic components testing more than 60GHz.

Santa Clara, CA30+ days ago

D. degree or Masters +3 years of experience in optical engineering, physics, and electrical engineering Prior experience with solid-state physics, integrated photonics, and opto-electronics Prior experience with high speed electronic and photonic components testing more than 60GHz Prior experience with RF and photonics numerical simulation principle and tools, such as FDTD, ADS, HFSS, COMSOL, Cadence, etc. Prior experience with script-based photonic component GDS layout and tapeout, especially experience with commercial silicon photonics foundries Prior experience with demonstrated integrated optoelectronic device and circuit design and fabrication.

santa clara, CA30+ days ago

What you will be doing: As a Silicon Circuit Characterization engineer for NVIDIA's family of chips and products, you will participate in silicon bringup & post-silicon characterization of new silicon to optimize performance, power, yield, and quality to define the world's fastest products. Working the Silicon Solutions Engineering Team at NVIDIA, you will be responsible for productizing NVIDIA's chips into groundbreaking consumer, professional, server, mobile, and automotive solutions.

San Jose, CA30+ days ago

$136,500–$253,500 Per Year

Applied Mathematics (any of the following is a plus) Optimization: linear, nonlinear, convex, integer, stochastic, variational; robust/multi-objective; derivative-free/global methods (e.g., CMA-ES, Bayesian optimization). Rare-event and reliability analysis (a plus): importance sampling, subset simulation, cross-entropy methods, extreme value/tail modeling, yield estimation.

Santa Clara, CA30+ days ago

$141,910–$269,100 Per Year

Minimum Qualifications: MS degree in Electrical Engineering, Physics, or a similar discipline with 5+ years of experience in a related field with years of relevant industry experience in the required skills section below OR PhD Electrical Engineering, Physics, or a similar discipline and 3+ years of experience in a related field with years of relevant industry experience in the required skills section below. • Experience designing, simulating, and testing complex PICs, including link budget analysis, electrical power budgets, back-reflection budgets, Monte Carlo models, and other performance indicators.

San Jose, CA12 days ago

$91,000–$232,000 Per Year

Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation.

Milpitas, CA30+ days ago

$117,800–$200,300 Per Year

Enabling the movement towards advanced chip design, KLA''s Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. BBP flagship products include the 29xx and 39xx series which leverage Broadband Plasma technology to capture a wide range of defects with ultimate sensitivity at the optical inspection speeds needed for inline defect monitoring.

Santa Clara, California30+ days ago

Perform the block level and transistor level layout design and optimization of sensor array readout circuits using CAD tools like Cadence Virtuoso and Calibre. Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors and successfully bring new products from initial concept through release.

Santa Clara, CA30+ days ago

System level timing budgets, specs and analysis • In-depth understanding of deep submicron CMOS FinFET process and circuit design issues • Familiarity with device reliability, ESD and Latch-Up requirements • Lead layout development and understand all ESD/Latch-Up, reliability rules • Broad circuit design and implementation knowledge with significant depth • Working Knowledge of package substrate, board design and power delivery is a plus. What youll be doing: • Mixed-Signal/Analog circuit build for High Speed Memory I/O Interfaces • Solve challenge of circuit development in deep submicron CMOS FinFET processes • Take designs through productization and be involved in all stages of development • Work with multi-functional teams to optimize the designs.

Santa Clara, CA30+ days ago

The ideal candidate should have a minimum of MS in Electrical Engineering with 8+ years of experience in high-speed serial links and deep knowledge of analog CMOS/BiCMOS designs in deep sub-micron process technologies. *** represents the connected world, offering innovative and customer-centric information technology experiences, enabling Enterprises, Associates, and the Society to Rise.

Santa Clara, CA30+ days ago

represents the connected world, offering innovative and customer-centric information technology experiences, enabling Enterprises, Associates, and the Society to Rise. We thrive on change that is powered by the intelligent symphony of technology and humans designing meaningful and sustainable experiences.

New!

San Jose, California4 days ago

Help with designs, develops, tests, and debugs software tools, flows, and methodologies used in design automation and by teams in the design of hardware products, process design, or manufacturing. Responsibilities include capturing user stories/requirements, writing both functional and test code, automating build and deployment, and/or performing unit, integration, and end-to-end testing of the software tools.

mountain view, CA30+ days ago

The company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lead the discussions with multi-functional teams (system, digital, analog, photonics) to create and drive block-level specifications, mixed-signal implementations, and behavioral modeling.

San Jose, California18 days ago

ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.

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Circuit Design Engineer Jobs in Fremont, CA

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New College Grad - Design Engineer, Circuit Design Micron

Senior SRAM Circuit Design Engineer NVIDIA Corp

Senior Staff Hardware Design Engineer - PCB Board Level Circuit Design Simulation Test Marvell Technology Inc

Sr. Electrical Design Engineer (PCBA, analog/digital circuit design) KLA Corp

Analog Circuit Design Engineer SmartSens Technology

SerDes Circuit Design Engineer Apple Inc

Integrated Circuit Package Design Engineer Google LLC

Principal Engineer, Integrated Circuit Design Abbott Laboratories

Principal Engineer, Integrated Circuit Design Abbott

Staff Engineer Circuit Design Micron Technology Inc

RFIC Design Engineer - mmWave & Sub‑THz Integrated Circuits (Multiple Positions) POINT2 TECHNOLOGY INC

Applied Machine Learning Engineer, Circuit Design - New College Grad 2026 NVIDIA Corp

Analog Mixed Signal Circuit Design NXP Semiconductors NV

Data Scientist Quantum Integrated Circuit Design Calibration Rigetti Computing Inc

Staff Engineer, High-Speed I/O Analog-Mixed Circuit Samsung Semiconductor

Integrated Circuit Engineer - Heterogeneous Photonics Coherent Corp

Senior Custom Circuits Timing Engineer NVIDIA Corp

Senior Circuit Methodology Engineer NVIDIA Corp

Senior Software Engineer, CAD Tool Development - Circuits NVIDIA Corp

Integrated Circuit Engineer - Heterogeneous Photonics II-VI Incorporated

Integrated Circuit Engineer - Heterogeneous Photonics II-VI Optical Systems, Inc.

Senior Circuit Characterization Engineer NVIDIA Corp

Principal Software Engineer - Circuit Simulation R&D Cadence Design Systems Inc

Senior Photonic-Integrated-Circuit Engineer Intel Corp

Technical Staff Engineer - Analog Design (SRAM Design) Microchip Technology Inc

Electrical Design Engineer (PCB Design, FPGA Design) KLA Corp

Sr. Analog Design Engineer Omnivision

Senior Mixed Signal Design Engineer NVIDIA Corp

Analog Design Engineer Yantran LLC

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Design Automation Engineer Altera Semiconductor

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