Design Verification Engineer 47BillionDesign Verification EngineerSan Jose, CAFull timeWe are seeking DV engineers to verify complex internal IP blocks such as compute engines, accelerators, and custom logic within SoC environments.
Verification Engineer VortexlinkVerification EngineerSaratoga, CAFull timeSpecialized Verification Strategy: Develop verification infrastructure and test cases for ASICs in the area of network fabrics, leveraging your extensive experience in networking. Key Responsibilities.
DFT Engineer VBeyond CorporationDFT EngineerSanta Clara, CAFull timeGenerating collaterals for Test Timing and Place and Route. Job Description: Familiarity with the Siemens suite of DFT tools.
NewSecurity Engineer III - Contract TalentBurst, Inc.Security Engineer III - ContractCupertino, CAVulnerability & Patch Management: Monitor and track patching cycles, aging vulnerabilities, and vulnerability reports, coordinating remediation efforts with relevant engineering teams. Tooling & Platform Monitoring: Actively monitor compliance and governance tools (e.g., Compass, Verdad, Plato) for WPC (Worldwide Privacy & Compliance) operations, flagging issues and ensuring tool health.
Sr. SW Test Engineer Visa Technology and Operations LLCSr. SW Test EngineerFoster City, CA$109,700–$170,200 / yearMasters, MBA, JD, MD)Minimum 3 years hands-on development experience • Excellent verbal and written communication skills to work well across teams • Experience with Agile Methodologies, Tools (Jira, Confluence) • Experience with Unit, Acceptance, Performance, Non-functional test, Certification test lifecycle, BDD/TDD methodology • Experience testing software at API level using SOAP UI, Postman, REST Client etc. Open VisaNet leverages state of the art Open Software technologies to achieve these goals on commodity hardware, such as Go, Scala, Apache Kafka, Docker, Kubernetes, Aerospike, Elasticsearch etc. and involves collaboration with exceptional group of software engineers, systems performance engineers, security specialists, DevOps engineers, payment experts, infrastructure and solution architects.
Electrical Engineer CollaberaElectrical EngineerBerkeley$85–$90 / hourTemporaryContractorPartner closely with Systems Engineering, Mechanical Engineering, Firmware, Software, Manufacturing, and Test teams. Drive PCB layout development and review for signal integrity, power integrity, manufacturability, and reliability.
Senior iOS Engineer BC ForwardSenior iOS EngineerSan Francisco, CA$71–$71.59 / hourFull timeThe ideal candidate will have strong experience in native iOS development, iOS frameworks, and SDK integrations and a proven ability to design, build, optimize, and publish performant iOS applications. With delivery centers and offices across North America and India, we take pride in building long-term relationships and delivering excellence through innovation, collaboration, and integrity.
Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpDesign Verification Engineer Silicon EngineeringSunnyvale, CA$135,000–$155,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Verification Engineer InterSources Inc.Verification EngineerSan Jose, CADeveloped test plans, constrained-random verification environments, and generated test cases, regressions, and coverage reports. The selected engineer will: Led verification efforts for complete FPGA designs in high-end router products.
Sr. ASIC Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpSr. ASIC Design Verification Engineer Silicon EngineeringSunnyvale, CA$170,000–$240,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Principal Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpPrincipal Design Verification Engineer Silicon EngineeringSunnyvale, CA$210,000–$310,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Verification Engineer - Aeromechanical (Design & Test) PivotalVerification Engineer - Aeromechanical (Design & Test)Palo Alto, California$115,000–$145,000 / yearDemonstrates a proactive safety mindset by embedding safety into daily operations, identifying and mitigating risks through assessments and training, encouraging open dialogue on safety concerns, and continuously improving protocols to ensure a safe work environment. Actively seeks and values diverse stakeholder perspectives, builds cross-functional relationships, and fosters trust through empathetic, fact-based communication—committing to shared decisions for the greater good.
Systems Test & Verification Engineer Sr. Lockheed Martin CorpSystems Test & Verification Engineer Sr.Sunnyvale, CA$89,300–$157,550 / yearPay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $89,300 - $157,550. Desired Skills: Desired skills : 3+ years of experience performing Systems Engineering and integration activities in the aerospace industry, with a focus on ground segments or satellite communications systems.
FPGA Design/Verification Engineer The Structures Company, LLCFPGA Design/Verification EngineerSunnyvale, CAAs trusted partners to major aerospace OEMs and Tier 1 suppliers, we connect professionals with opportunities to grow and excel in the aviation and aerospace industries. The Structures Company is a premier national aerospace and defense staffing agency specializing in contract, contract-to-hire, and direct hire placements.
NewPrincipal Design Verification Engineer Bright Vision TechnologiesPrincipal Design Verification EngineerSanta Clara, CaliforniaBright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations. As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology.
Silicon Design Verification Engineer Advanced Micro Devices, IncSilicon Design Verification EngineerSan Jose, CaliforniaCreate and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
Verification Engineer Advanced Micro Devices IncVerification EngineerSan Jose, CAAs a member of the front-end design/integration team, you will work closely with the architecture, IP design, PD teams, and product engineers to achieve first pass silicon success. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
IP Verification Engineer Advanced Micro Devices IncIP Verification EngineerSan Jose, CAProficient in IP level ASIC verification • Expert in Verilog, System Verilog, Object Oriented programming • Expert in developing UVM based verification frameworks and testbenches • Scripting and automation of verification processes and flows • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process • Good Computer Architecture, systems knowledge • Comfortable in python / perl and editing / maintaining scripts • Exposure to leadership or mentorship is an asset • Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out • Experience with PCIe, CXL, NVMe or ethernet protocols • Strong communication skills and the ability to work independently as well as in a cross-site team environment. • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified • Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases • Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers • Build the directed and random verification tests • Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality.
Design verification Engineer ApolisDesign verification EngineerSan Jose, CA$65–$70 / hourA bachelor’s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a Master's Degree in Electrical or Computer Engineering with at least 8 years of experience in ASIC or a related discipline. Key Skill: SV/UVM, AXI expertise, NOC/Crossbar, Performance.
Senior SoC Verification Engineer Microsoft CorpSenior SoC Verification EngineerMountain View, CA$119,800–$234,700 / yearRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. To achieve this goal, the Silicon IP & Custom Products (SCIPS) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.
ASIC Verification Engineer Cisco Systems IncASIC Verification EngineerSan Jose, CAOur group is responsible for working on the Silicon One family of chips, where we build some of the most complex ASIC chips using cutting-edge technologies and the latest industry tools and techniques. Cisco Common ASIC Group is looking for a Senior ASIC Verification Engineer to drive existing projects and engage in new development of our next generation switching systems.
Sr. Design Verification Engineer Credo Semiconductor, Inc.Sr. Design Verification EngineerSan Jose, CA$130,000–$160,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. You'll develop and execute verification plans, build scalable reusable testbenches, write SV-UVM sequences, debug issues, and collaborate closely with RTL designers and firmware/application engineering teams.
NewPrincipal ASIC Design Verification Engineer Bright Vision TechnologiesPrincipal ASIC Design Verification EngineerSanta Clara, CaliforniaAs we continue to grow, we’re looking for a skilled Principal Design Verification Engineer – UAL & PCIe Subsystems to join our dynamic team and contribute to our mission of transforming business processes through technology. Bright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations.
System Test and Verification Engineer Stf Lockheed Martin CorpSystem Test and Verification Engineer StfSunnyvale, CA$109,200–$192,510 / yearPay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $109,200 - $192,510. Desired Skills: 5+ years of experience performing Systems Engineering and integration activities in the aerospace industry, with a focus on ground segments or satellite communications systems.
Sr. Staff ASIC Verification Engineer Recogni IncSr. Staff ASIC Verification EngineerSunnyvale, CAResponsibilities: Your responsibilities will be wide-ranging and and run the gamut of working closely with design engineers to stay abreast of the specification and implementation of ASIC blocks, developing comprehensive test and coverage strategies, implementing the verification environment and tests using object-oriented tools, in particular SystemVerilog and UVM, handling bug tracking and coverage convergence and developing scripts and methodologies for the front-end ASIC flow. This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to deliver the high-performance multi-chip silicon solutions that are at the heart of Tensordyne's vertically integrated, generative AI inference acceleration systems for data centers.
Sr. ASIC Verification Engineer Recogni IncSr. ASIC Verification EngineerSunnyvale, CAResponsibilities: Your responsibilities will be wide-ranging and and run the gamut of working closely with design engineers to stay abreast of the specification and implementation of ASIC blocks, developing comprehensive test and coverage strategies, implementing the verification environment and tests using object-oriented tools, in particular SystemVerilog and UVM, handling bug tracking and coverage convergence and developing scripts and methodologies for the front-end ASIC flow. This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to deliver the high-performance multi-chip silicon solutions that are at the heart of Tensordyne's vertically integrated, generative AI inference acceleration systems for data centers.
NewMixed Signal IP Verification Engineer Intel CorpMixed Signal IP Verification EngineerSanta Clara, CA$122,440–$232,190 / yearA Bachelor's or BS degree and/or equivalent knowledge in a specialized field, with at least 3 years of relevant experience, OR A Master's degree and/or equivalent knowledge in a specialized field, with at least 2 years of relevant experience, OR PhD and/or equivalent knowledge in a specialized field, with at least 1 year of relevant experience, Experience listed above should be a combination of the following: Verification methodologies such as OVM and UVM. Business group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).
IP Design Verification Engineer Intel CorpIP Design Verification EngineerSanta Clara, CA$141,910–$200,340 / yearBusiness group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel''s product and foundry businesses.
Platform Verification Engineer - Embedded Systems WaabiPlatform Verification Engineer - Embedded SystemsSan Francisco, CA$133,650–$222,000 / yearWith offices in Toronto, San Francisco, Dallas, and Pittsburgh, Waabi is growing quickly and looking for diverse, innovative and collaborative candidates who want to impact the world in a positive way. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information.
NewSr. Software System Verification Engineer ShifamedSr. Software System Verification EngineerLos Gatos, CaliforniaSupira Medical, a clinical-stage Shifamed Portfolio Company, is developing a low-profile, high continuous flow percutaneous ventricular assist device (pVAD) to provide temporary mechanical circulatory support in high risk percutaneous coronary interventional (HRPCI) procedures as well as patients suffering from cardiogenic shock. Founded in 2009 by serial entrepreneur Amr Salahieh, Shifamed LLC is a privately held medical device innovation hub focused on the development of novel medical products to address clinical needs in the rapidly evolving fields of cardiology and ophthalmology.
ASIC Verification Engineer Axiado CorpASIC Verification EngineerSan Jose, CAAxiado has also won numerous industry awards for our ground-breaking products and technological innovations, including being named one of Fast Companys 2025 Top 10 Most Innovative Companies in Security, winning the 2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Alliances 2025 Start-Up to Watch award. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that combines advanced hardware security, AI driven resilience and efficiency, and real-time platform management.
Platform Verification Engineer - Software Systems WaabiPlatform Verification Engineer - Software SystemsSan Francisco, CA$133,650–$222,000 / yearWith offices in Toronto, San Francisco, Dallas, and Pittsburgh, Waabi is growing quickly and looking for diverse, innovative and collaborative candidates who want to impact the world in a positive way. We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information.
SR Design Verification Engineer Advanced Micro Devices IncSR Design Verification EngineerSanta Clara, CAOur distributed services platform expands AMD's data center product portfolio with a high‑performance DPU and software stack deployed at scale across major cloud and enterprise environments, including Goldman Sachs, IBM Cloud, Microsoft Azure, and Oracle. The ideal candidate brings hands‑on verification expertise, excels in debugging intricate architecture/RTL issues, and is comfortable leading verification efforts across IP, subsystem, and SoC levels.
Design Verification Engineer Advanced Micro Devices IncDesign Verification EngineerSanta Clara, CAOur distributed services platform expands AMD's data center product portfolio with a high‑performance DPU and software stack deployed at scale across major cloud and enterprise environments, including Goldman Sachs, IBM Cloud, Microsoft Azure, and Oracle. The ideal candidate brings hands‑on verification expertise, excels in debugging intricate architecture/RTL issues, and is comfortable leading verification efforts across IP, subsystem, and SoC levels.
CPU Formal Verification Engineer Intel CorpCPU Formal Verification EngineerSanta Clara, CA$105,650–$149,150 / yearMinimum Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related specialized field with 1+ years of experience OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related specialized field with: 1+ years of experience in formal verification. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings.
SoC Design Verification Engineer Advanced Micro Devices IncSoC Design Verification EngineerSan Jose, CADevelop/Maintain tests for functional verification and performance verification at the core and SOC level • Build testbench components to support the next generation IP • Maintain or improve current test libraries to support IP level testing • Responsible for closing verification quality metrics like pass rates, code coverage and functional coverage • Provide technical support to other teams. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
NewSr. Design Verification Engineer DustPhotonics LtdSr. Design Verification EngineerSan Jose, CA$130,000–$160,000 / yearp>Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. You'll develop and execute verification plans, build scalable reusable testbenches, write SV‑UVM sequences, debug issues, and collaborate closely with RTL designers and firmware/application engineering teams.
Power Management & Memory IP Design Verification Engineer, AI Hardware Tesla IncPower Management & Memory IP Design Verification Engineer, AI HardwarePalo Alto, CA$160,000–$414,000 / yearBy creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life. Work with physical design and RTL design to weigh trade-offs and help determine best approach for modelling or approximating voltage power inputs to simulations.
NewSenior Design Verification Engineer Advanced Micro Devices, IncSenior Design Verification EngineerSanta Clara, CaliforniaYou will develop and enhance CPU-level testbenches used by core verification and debug teams to validate complex subsystems, working closely with globally distributed engineering teams. This role focuses on enabling high-quality CPU verification through robust infrastructure and offers exposure to advanced methodologies, including AI-driven development and debug, to improve efficiency and accelerate product delivery.
NewASIC Design Verification Engineer (Santa Clara, CA) Qualcomm IncASIC Design Verification Engineer (Santa Clara, CA)Santa Clara, CA$126,700–$190,100 / yearThe responsibility of the position involves comprehensive pre-silicon test planning for digital power IP''s, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.
Senior Design Verification Engineer MicronSenior Design Verification EngineerSan Jose, CaliforniaFraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Sr. Full Chip Physical Verification Engineer Silicon Engineering Space Exploration Technologies CorpSr. Full Chip Physical Verification Engineer Silicon EngineeringSunnyvale, CA$170,000–$230,000 / yearPREFERRED SKILLS AND EXPERIENCE: Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
ASIC Formal Verification Engineer, TPU Compute Google LLCASIC Formal Verification Engineer, TPU ComputeSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
CPU Processor Performance Verification Engineer Apple IncCPU Processor Performance Verification EngineerSanta Clara, CAAs a CPU Processor Performance Verification Engineer owning the verification of a certain area of performance features in a chip design, you will have responsibilities as follows: • Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon). The role involves pre-silicon performance verification as well as developing tests to characterize CPU performance, analyzing and profiling software/applications, correlating and comparing performance across silicon/system software version, and working with OS and compiler teams on performance debug and tuning.
Senior Design Verification Engineer Pyramid Consulting, IncSenior Design Verification EngineerSan Jose, CA$150,000–$160,000 / yearAnalyze and debug simulation failures at the RTL and gate-level, including working with gate-level netlists and SDF timing simulations. By applying to our jobs you agree to receive calls, AI-generated calls, text messages, or emails from Pyramid Consulting, Inc. and its affiliates, and contracted partners.
ASIC Design Verification Engineer, TPU GoogleASIC Design Verification Engineer, TPUSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We're the driving team behind Google's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
Sr. FPGA Verification Engineer Reliable Robotics CorporationSr. FPGA Verification EngineerMountain View, CaliforniaFPGA engineers at Reliable Robotics have a unique opportunity to work at the heart of a vertically integrated technology stack that goes all the way up to aircraft level, with a direct impact on the aircraft's capabilities and requirements. FPGA Verification Engineer, you will own the FPGA integration and test environment for multiple airborne products including their test benches & simulation, continuous integration, timing analysis, elemental analysis, and build.
NewASIC Design Verification Engineer, Technical Leader Cisco Systems IncASIC Design Verification Engineer, Technical LeaderSan Jose, CA$183,800–$263,600 / yearWho We Are: The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco's core Switching, Routing, and Wireless products for organizations globally. For quota-based incentive pay, Cisco typically pays as follows: 75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and.
NewASIC verification engineer Hewlett Packard EnterpriseASIC verification engineerSunnyvale, CaliforniaProvide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.
Senior Design Verification Engineer Altera SemiconductorSenior Design Verification EngineerSan Jose, CaliforniaAltera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging. As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design validation for Altera next generation IP's across the Altera FPGA IP product portfolios.