UNKNOWN

FEED

We are a vertically integrated manufacturing company that develops innovative products for diversified applications in the industrial, optical communications, military, life sciences, semiconductor equipment, and consumer markets. Perform simulations for signal integrity and power integrity analysis, hands-on high speed signal validation and analysis verification including material, de-embedding, and component characterization.

II-VI Optical Systems, Inc.

Principal Electrical Design Engineer

RTL Design: Author, optimize, and maintain high-quality, synthesizable SystemVerilog/Verilog RTL for complex digital blocks, control logic, clocking structures, and register files (CSRs). Front-End Flows: Drive logic synthesis (e.g., Design Compiler, Genus), Static Timing Analysis (STA via PrimeTime/Tempus), and run static quality checks (Lint, SpyGlass, JasperGold CDC).

YEAR

Broadcom Inc

Lead ASIC Design Engineer

This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you'll be doing: As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.

Visualize your future . . . We Do 
NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people and our technologies, support and fund industry research around the world, and consistently deliver high-quality products. NVIDIA's culture promotes and inspires a team of world-class employees to be at the top of their game. We've created an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow. . . today. We invite you to explore the opportunities available at NVIDIA to see what your future may hold.

NVIDIA Corp

ASIC Design Engineer - New College Grad 2026

You will be in a unique position to have ownership of a wide-ranging list of hardware system development aspects, including schematics, PCB layout and mechanical design, component selection and collaborating with operations in AVL management, EVT/DVT/PVT testing and certification. Our mission, through the creation of custom silicon, hardware and software, is to enable multimodal Generative AI inference acceleration at scale, with safe, sustainable, high-performance systems for our hyperscaler and neocloud data center customers.

Tensordyne

Hardware Design Engineer

ea_via_bold

This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you will be doing: Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development.

Nvidia

Senior Asic Floorplan Design Engineer

This position involves working with the latest technology to continue driving next generation AI/ML ecosystems through our PCIe Switch Products - and managing mega datacenters, while leading world class performance, through our Enterprise Storage Products. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.

Physical Design Engineer

High-quality, high-performance Verilog/SystemVerilog RTL implementation based on a design specification - may also include areas such as asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations and pipelining, multi-threaded designs, and integrating third-party IP. Working with cross functional teams such as Verification Engineering, Software/Firmware Engineering, Emulation Engineering, and Validation Engineering to support any issues that may arise on the RTL design.

Broadcom Corporation

RTL IC Design Engineer

IC Design Engineer

This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots and self-driving cars that can perceive and understand the world.

NVIDIA

ASIC Design Engineer - New College Grad 2027

Improve Power, Performance, and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.

Senior Asic Design Engineer - Clocks IP

Job Description: We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Responsibilities Include: Participate in large complex design implementations using the latest technology nodes; lead one or more disciplines in design closure as part of the design team.

Asic Design Engineer

As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software, DFT, and more. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.

Senior SOC Design Engineer

What you'll be doing: As a member of the GPU Design Methodology team, you will document and deliver design guidelines that will help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and specifications. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

Senior Asic Design Engineer - Agentic AI

Sign-off & Verification: Own the final sign-off process, including Static Timing Analysis (STA), IR drop analysis (static and dynamic), Electromigration (EM), and Physical Verification (DRC/LVS/ERC). Cross-Functional Collaboration: Work at the interface of digital and analog design, facilitating the integration of custom analog mixed-signal blocks into the digital fabric.

Unconventional AI

AI Silicon, Physical Design Engineer

Bolt is committed to building a diverse and inclusive environment in which we recognize and value each other’s differences as well as fostering a culture that promotes its core values: Professionalism, Integrity, and Respect. This range represents the anticipated base pay for this role based in California; the final offer may vary based on qualifications, experience, and location.

Bolt Graphics

RTL Design / Microarchitecture Engineer

RESPONSIBILITIES: Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts. Job Description: Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs.

Package Design Engineer

For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/com-missioned roles) is expected to be the annual range listed below. Partner with physical-design teams: review synthesis/timing reports, rewrite RTL to close critical paths, and consult on floor-planning for congestion/routability.

Palo Alto Networks Inc

Senior ASIC Design Engineer

In this position, you will get the chance to build complex chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

Circuit Design Engineer Jobs in Santa Clara, CA

Principal Electrical Design Engineer II-VI Optical Systems, Inc.

Lead ASIC Design Engineer Broadcom Inc

ASIC Design Engineer - New College Grad 2026 NVIDIA Corp

Hardware Design Engineer Tensordyne

Senior Asic Floorplan Design Engineer Nvidia

Physical Design Engineer Broadcom Inc

RTL IC Design Engineer Broadcom Corporation

IC Design Engineer Broadcom Inc

ASIC Design Engineer - New College Grad 2027 NVIDIA

Senior Asic Design Engineer - Clocks IP Nvidia

Asic Design Engineer Broadcom Corporation

Senior SOC Design Engineer Nvidia

Senior Asic Design Engineer - Agentic AI Nvidia

AI Silicon, Physical Design Engineer Unconventional AI

RTL Design / Microarchitecture Engineer Bolt Graphics

Package Design Engineer Broadcom Corporation

Senior ASIC Design Engineer Palo Alto Networks Inc

CPU Design Methodology Engineer NVIDIA Corp

Package Design Engineer Broadcom Inc

Senior ASIC Design Engineer - Clocks IP NVIDIA Corp

Similar Job Searches

See More Jobs

Stand out to leading employers.