Senior Power Electronics Design Engineer, Magnetics AmperesandSenior Power Electronics Design Engineer, MagneticsSan Francisco, California$175,000–$205,000 / yearDesign isolated and non-isolated converter stages using advanced topologies such as multi-level converters, cascaded H-bridges, Dual Active Bridge (DAB) and ensuring robust protection and safety compliance for MV/LV systems. We’ve built a new class of intelligent, software-defined power infrastructure products leveraging a decade of advanced medium voltage Solid State Transformer research that’s now ready for commercial deployment.
Sr. RF Design Engineer Teledyne TechnologiesSr. RF Design EngineerMountain View, CA$90,800–$121,100 / yearThese markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research. Actual compensation for successful candidates is carefully determined based on several factors including, but not limited to, location, local regulations (such as minimum wage), education/training, work experience, key skills, and type of position.
Senior Power Electronics Design Engineer AmperesandSenior Power Electronics Design EngineerSan Francisco, California$175,000–$205,000 / yearYou will be responsible for designing isolated and non-isolated converter stages, implementing advanced topologies such as multi-level converters, cascaded H-bridges, Dual Active Bridge (DAB) and ensuring robust protection and safety compliance for MV/LV systems. We’ve built a new class of intelligent, software-defined power infrastructure products leveraging a decade of advanced medium voltage Solid State Transformer research that’s now ready for commercial deployment.
Sr. Staff Engineer, ASIC Design Ayar LabsSr. Staff Engineer, ASIC DesignSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Create clear documentation of their designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff.
Senior Electrical Design Engineer (EE) Job PitchSenior Electrical Design Engineer (EE)Redwood City, CaliforniaFounded by ex-Apple Product and Engineering leaders , Level is redefining the smart home with technology that is simple, intuitive, useful, and invisible . This partnership strengthens our ability to deliver world-class smart home experiences while maintaining the vision and design excellence that have always set us apart.
NewProduct Design Engineer, FEA HarkProduct Design Engineer, FEASan Jose, CaliforniaYou'll be the analytical backbone of Hark's mechanical engineering team — using FEA and coupled simulation methods to validate design decisions, predict failure modes, and drive structural, thermal, and dynamic performance from the earliest stages of development through production release. This is a hands-on role where simulation directly shapes design: you'll work closely with product design engineers, industrial designers, and reliability teams to ensure that what we build is not just beautiful, but durable, precise, and manufacturable at scale.
Senior Optical Transceiver Test/Design Engineer Coherent CorpSenior Optical Transceiver Test/Design EngineerFremont, CAWe are a vertically integrated manufacturing company that develops innovative products for diversified applications in the industrial, optical communications, military, life sciences, semiconductor equipment, and consumer markets. Coherent provides a comprehensive career development platform within an environment that challenges employees to perform at their best, while rewarding excellence and hard-work through a competitive compensation program.
System Design Test Engineer Yantran LLCSystem Design Test EngineerCupertino, CAThis position is a great fit for someone who is passionate about designing hardware, and working cross-functionally with teams across Apple (design, firmware, software, operations, etc). Test fixture hardware design and integration with test instruments, implementation of product testing on new Apple products from prototype to mass production.
Physical Design Engineer The PJF GroupPhysical Design EngineerSan Jose Bay Area, CAWe're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers advanced System-on-Chip solutions across multiple emerging technologies. Profile of preferred candidate includes 10 + years of hands-on experience, custom ASIC, strong communication skills, experience with multiple tape outs from inception, small company experience.
Senior EMC Design Engineer, Air Dominance And Strike ANDURIL INDUSTRIESSenior EMC Design Engineer, Air Dominance And StrikeCosta Mesa, CA$146,000–$194,000 / yearTo ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind: No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. This third-party service provider provides risk-intelligence services that may include analysis of sanctions and watchlists, adverse media, public-record information, and other lawful open-source or commercial data sources.
Mechanical Design Engineer with Creo Pyramid, IncMechanical Design Engineer with CreoSan Jose, CA$45–$50 / hourFull timeKeywords for Candidate Search-("Mechanical Design Engineer" OR "Mechanical Engineer") AND (Creo OR NX) AND ("Electronic Enclosures" OR Chassis OR Rackmount OR Networking OR Switches OR Routers OR Servers) AND ("Sheet Metal" or Sheet) AND (GD&T or "Tolerance Analysis") Our client is a leading IT Industry and we are currently interviewing to fill this and other similar contract positions. By applying to our jobs you agree to receive calls, AI-generated calls, text messages, or emails from Pyramid Consulting, Inc. and its affiliates, and contracted partners.
Senior Software Engineer, Design Review Tool Anduril Industries IncSenior Software Engineer, Design Review ToolCosta Mesa, CA$191,000–$253,000 / yearYou''ll turn ambiguous customer problems into durable architecture and work directly with hardware engineers on a tool where software accuracy has tangible, real-world consequences - on problems at the intersection of graphics, geometry, product engineering, and platform architecture. To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind: No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process.
Phone System Design Engineer - Power Modeling Apple IncPhone System Design Engineer - Power ModelingCupertino, CAYou will publish system level power estimates for various customer usage scenarios to drive battery life and thermal design discussions, own system-level power validation, analyze next-generation hardware with various cross-functional teams across Apple, perform hands-on lab investigations, and debug power-related issues to identify power-saving opportunities. Position may require some international travelBachelors in Electrical Engineering or equivalent 5+ years of industry experience Knowledge in system architecture power and performance metrics for computer (CPU, GPU, memory, radio) technologies, battery powered devices, and power electronics.
PLL IC Design Engineer - TeraWave Blue Origin Enterprises LPPLL IC Design Engineer - TeraWaveSan Francisco, CA$230,398–$322,556.85 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing (CDL drivers only), vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
RFIC Design Engineer (RFIC Engineering) SpaceXRFIC Design Engineer (RFIC Engineering)Irvine, CACircuit design skills, and experience performing analysis and simulation of both linear and non-linear circuits such as phase-locked loops, vector modulators/demodulators, oscillators, mixers, filters, low noise and power amplifiers. To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Staff Product Design Engineer uraStaff Product Design EngineerSan Francisco, CaliforniaProject Experience : 10+ years of experience as a consumer product design engineer who loves working on highly creative, fast-paced, and collaborative teams alongside Industrial Designers, Hardware Engineers, and UX Designers. Driven, Technical Leadership: Able to drive tasks independently, act as a leader and mentor across multiple organizations, organize, escalate and communicate issues and needs clearly.
Principal RFIC Design Engineer - TeraWave Blue Origin Enterprises LPPrincipal RFIC Design Engineer - TeraWaveSan Diego, CA$213,331–$298,663.05 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Principal Modem PHY IP Design Verification Engineer - Terawave Blue Origin Enterprises LPPrincipal Modem PHY IP Design Verification Engineer - TerawaveCA$269,175–$376,843.95 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Package Design Methodology Engineer NVIDIA CorpPackage Design Methodology EngineerSanta Clara, CADemonstrated experience applying AI/ML techniques in engineering workflows - this could include using LLMs for code generation and debugging, building ML-assisted design analysis tools, or integrating AI-assisted flows into EDA environments. This role is a rare opportunity to craft production-grade EDA tooling that operates at the bleeding edge of packaging technology, where no commercial solution exists yet and the problems you solve become the new industry baseline.
Principal Modem PHY IP Design Engineer - Terawave Blue Origin Enterprises LPPrincipal Modem PHY IP Design Engineer - TerawaveCA$269,175–$376,843.95 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Senior Design Engineer (MOSFET / IGBT) Alpha and Omega Semiconductor LimitedSenior Design Engineer (MOSFET / IGBT)Sunnyvale, CAAt Alpha and Omega Semiconductor (AOS), we design, develop and globally supply a broad range of power semiconductors, including a wide portfolio of Power MOSFET, IGBT, IPM, TVS, GaN/SiC, Power IC and Digital Power products. In this role, you will work closely with the marketing, packaging, product engineering, and integration groups to design, develop, and launch new products and next generation platforms.
Principal Package Design Engineer Renesas Electronics CorpPrincipal Package Design EngineerSan Jose, CA$195,000–$240,000 / yearAt Renesas Electronics, we are a global leader in microcontrollers, analog, power, and SoC products, delivering trusted embedded design innovation that shapes the way we live, work, and connect. As the industry pivots toward AI/ML hardware, high-performance computing, automotive innovation, and advanced power architectures (including SiC and GaN), semiconductor packaging has evolved from a protective enclosure into a primary driver of system performance.
ASIC Design Engineer - New College Grad 2026 NVIDIA CorpASIC Design Engineer - New College Grad 2026Santa Clara, CAThis position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you'll be doing: As a key member of the GPU Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
Senior ASIC Design Engineer - Agentic AI NVIDIA CorpSenior ASIC Design Engineer - Agentic AISanta Clara, CAWhat you'll be doing: As a member of the GPU Design Methodology team, you will document and deliver design guidelines that will help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and specifications. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
PCB Design Layout Engineer NVIDIA CorpPCB Design Layout EngineerSanta Clara, CAWhat you'll be doing: Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units at NVIDIA (Data Center, GPU Desktop, Notebook, Automotive, Professional, Deep Learning, and AI). We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing.
Hardware Design Integrity Engineer Arista Networks IncHardware Design Integrity EngineerSanta Clara, CA$130,000–$225,000 / yearWork closely with sw & customer teams on high pressure escalations from the field, including reading logs, identifying the bug, determining the best fix with minimal interruption to the field, delivering the final solution, determining if any other systems are susceptible, and implementing measures to prevent the issue from occurring again. Working closely with cross-functional teams including software, product management, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, and signal integrity to deliver state-of-the-art products that drive network performance and reliability.
Senior ASIC Floorplan Design Engineer NVIDIA CorpSenior ASIC Floorplan Design EngineerSanta Clara, CAThis position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC from early architecture development phase through physical design phase, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you will be doing: From the early chip definition phase you will partner closely with a wide variety of multi-disciplinary teams starting including product managers, chip architects, ASIC design, physical design, packaging teams among others to craft the chip floorplan that optimizes cost/area, performance, and power for a target market.
Physical IC Design Engineer Broadcom IncPhysical IC Design EngineerSan Jose, CA$143,800–$230,000 / yearThis position involves working with the latest technology to continue driving next generation Artificial Intelligence and Machine Learning ecosystems through our PCIe Switch Products - and managing mega datacenters, while leading world class performance, through our Enterprise Storage Products. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Sr. ASIC Design Engineer Micron Technology IncSr. ASIC Design EngineerSan Jose, CA$168,000–$336,000 / yearWhat's Encouraged Daily: As a Senior ASIC Design Engineer and domain expert, you will perform logic design across the full ASIC lifecycle from specifications and microarchitecture to design, integration, synthesis, timing, linting, and CDC. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
ASIC Design Engineer Broadcom IncASIC Design EngineerIrvine, CA$127,100–$203,400 / yearJob Description: We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
Senior Hardware System Design Engineer Broadcom IncSenior Hardware System Design EngineerSan Jose, CA$120,000–$192,000 / yearThe ideal candidate will play a key role in the entire hardware development cycle, from concept to NPI production, with a specific emphasis on system design, including schematics, PCB layout, signal and power integrity, system bring-up, and customer support. Join Our Team: If you are a passionate and self-driven individual with a knack for solving complex hardware design challenges, we invite you to apply and become a key member of our innovative team at Broadcoms Core Switching Group.
Applied Research Engineer, Chip Design NVIDIAApplied Research Engineer, Chip DesignUs, CaliforniaLarge language models, coding agents, and agentic AI are transforming how chips get designed, and this role puts you at the frontier — applying the latest and greatest AI to NVIDIA's real ASIC design flows and pushing past the limits of what's currently possible. Domain and technical expertise in front-end ASIC (design, verification, timing) combined with project experience applying agentic AI to chip design and optimization problems, with a track record of driving ideas from conception through experimentation to production.
Sr. Staff Hardware Design Engineer TensordyneSr. Staff Hardware Design EngineerSunnyvale, CaliforniaYou will be in a unique position to have ownership of a wide-ranging list of hardware system development aspects, including schematics, PCB layout and mechanical design, component selection and collaborating with operations in AVL management, EVT/DVT/PVT testing and certification. Our mission, through the creation of custom silicon, hardware and software, is to enable multimodal Generative AI inference acceleration at scale, with safe, sustainable, high-performance systems for our hyperscaler and neocloud data center customers.
Senior SOC Design Engineer NvidiaSenior SOC Design EngineerSanta Clara, CAAs a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software, DFT, and more. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.
Principal RFIC Design Engineer - TeraWave Blue OriginPrincipal RFIC Design Engineer - TeraWaveSan Diego, California$213,331–$298,663.05 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Mechanical Design Engineer - Data Center Hardware Arista Networks IncMechanical Design Engineer - Data Center HardwareSanta Clara, CA$120,000–$180,000 / yearWe leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Implement the selected design using Creo 3D CAD and provide all the necessary drawings, critical to function dimensions and 3D files to allow the design to be prototyped and manufactured.
EMC Design - Product Compliance Engineer Arista Networks IncEMC Design - Product Compliance EngineerSanta Clara, CA$150,000–$190,000 / yearWe leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. The pay range provided reflects base pay only and in addition certain roles may also be eligible for discretionary Arista bonuses and equity.
Staff Hardware Design Engineer TensordyneStaff Hardware Design EngineerSunnyvale, CaliforniaYou will be in a unique position to have ownership of a wide-ranging list of hardware system development aspects, including schematics, PCB layout and mechanical design, component selection and collaborating with operations in AVL management, EVT/DVT/PVT testing and certification. Our mission, through the creation of custom silicon, hardware and software, is to enable multimodal Generative AI inference acceleration at scale, with safe, sustainable, high-performance systems for our hyperscaler and neocloud data center customers.
Principal FPGA / RTL Design Engineer - Signal Processing Silvus TechnologiesPrincipal FPGA / RTL Design Engineer - Signal ProcessingIrvine, California$165,000–$250,000 / yearFrom pure line-of-sight to extreme non-line-of-sight, Silvus radios form a self-healing, self-forming mesh network, enabling secure and reliable connectivity, including video and high-bandwidth data. Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields.
Senior Asic Design Verification Infrastructure And Tools Engineer - GPU NvidiaSenior Asic Design Verification Infrastructure And Tools Engineer - GPUSanta Clara, CAThis position offers the opportunity to have a big impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to artificial intelligence to self-driving cars and supercomputers. NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in tools and automation to drive efficiency and collaboration among our High Speed IO engineering teams.
Senior Hardware System Design Engineer Broadcom CorporationSenior Hardware System Design EngineerSan Jose, CA$120,000–$192,000 / yearThe ideal candidate will play a key role in the entire hardware development cycle, from concept to NPI production, with a specific emphasis on system design, including schematics, PCB layout, signal and power integrity, system bring-up, and customer support. Join Our Team: If you are a passionate and self-driven individual with a knack for solving complex hardware design challenges, we invite you to apply and become a key member of our innovative team at Broadcom's Core Switching Group.
Asic Design Engineer Broadcom CorporationAsic Design EngineerIrvine, CA$108,000–$172,800 / yearJob Description: We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Responsibilities Include: Participate in large complex design implementations using the latest technology nodes; lead one or more disciplines in design closure as part of the design team.
Package Design Engineer Broadcom CorporationPackage Design EngineerSan Jose, CARESPONSIBILITIES: Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts. Job Description: Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs.
Physical IC Design Engineer Broadcom CorporationPhysical IC Design EngineerSan Jose, CAThis position involves working with the advanced nodes to continue driving next generation Artificial Intelligence and Machine Learning ecosystems through our PCIe Switch Products, while leading world class performance, through our Enterprise Products. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
Lead Hardware Design Validation Engineer - Memory Subsystem NVIDIALead Hardware Design Validation Engineer - Memory SubsystemUs, CaliforniaOur work opens up new universes to explore, enables amazing creativity and discovery and powers what were once science fiction inventions from artificial intelligence to autonomous cars. Widely considered to be one of the technology world’s most desirable employers, NVIDIA is an industry leader with groundbreaking developments in High-Performance Computing, Artificial Intelligence and Visualization.
Senior Electrical Engineer, EMI/EMC Design for Fastwater Staffing HIKINEXSenior Electrical Engineer, EMI/EMC Design for Fastwater StaffingCosta Mesa, CAThe ideal candidate will be responsible for designing, testing, and validating electromagnetic compatibility (EMC) and electromagnetic interference (EMI) solutions for electronic products. Identify program EMI/EMC risks and define strategies for reducing risk through the definition of modeling, simulation, or experimental activities.
Hardware Design Engineer TensordyneHardware Design EngineerSunnyvale, CaliforniaYou will be in a unique position to have ownership of a wide-ranging list of hardware system development aspects, including schematics, PCB layout and mechanical design, component selection and collaborating with operations in AVL management, EVT/DVT/PVT testing and certification. Our mission, through the creation of custom silicon, hardware and software, is to enable multimodal Generative AI inference acceleration at scale, with safe, sustainable, high-performance systems for our hyperscaler and neocloud data center customers.
Senior Hardware Design Engineer The Panther GroupSenior Hardware Design EngineerTorrance, CAIn this hands-on role, you'll design, develop, test, and troubleshoot high-speed digital and mixed-signal hardware used in cutting-edge video, multimedia, networking, fiber optic, and medical products. You'll own projects from concept through production, working closely with cross-functional engineering teams to deliver reliable, high-performance products.
R&D Engineer IC Design 5 Broadcom CorporationR&D Engineer IC Design 5San Jose, CAThe ideal candidate will have a proven track record of completing multiple successful ASIC design and verification cycles-from architecting testbenches (networking background preferred) to achieving full verification closure. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
Mid Level ASIC Design Engineer TensordyneMid Level ASIC Design EngineerSunnyvale, CAAs a member of Tensordyne's ASIC team, you will be responsible for the microarchitecture and design implementation of a high-performance and low-power convolutional neural network accelerator ASIC.This ASIC's design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to form an end-to-end vision perception module that achieves record-breaking computational performance at low power. Your responsibilities will be wide-ranging and run the gamut of microarchitecture design and documentation, Verilog RTL implementation, selecting and integration 3rd-party IP blocks, working closely with design verification engineers, running frontend synthesis and working with a backend team on place-and-route guidance and timing closure.