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Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units at NVIDIA (Information Network, GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI). We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing.

Visualize your future . . . We Do 
NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people and our technologies, support and fund industry research around the world, and consistently deliver high-quality products. NVIDIA's culture promotes and inspires a team of world-class employees to be at the top of their game. We've created an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow. . . today. We invite you to explore the opportunities available at NVIDIA to see what your future may hold.

NVIDIA

PCB Design Layout Engineer

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Large language models, coding agents, and agentic AI are transforming how chips get designed, and this role puts you at the frontier — applying the latest and greatest AI to NVIDIA's real ASIC design flows and pushing past the limits of what's currently possible. Domain and technical expertise in front-end ASIC (design, verification, timing) combined with project experience applying agentic AI to chip design and optimization problems, with a track record of driving ideas from conception through experimentation to production.

Applied Research Engineer, Chip Design

High-quality, high-performance Verilog/SystemVerilog RTL implementation based on a design specification - may also include areas such as asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations and pipelining, multi-threaded designs, and integrating third-party IP. Working with cross functional teams such as Verification Engineering, Software/Firmware Engineering, Emulation Engineering, and Validation Engineering to support any issues that may arise on the RTL design.

Broadcom Corporation

RTL IC Design Engineer

Improve Power, Performance, and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL. Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.

Nvidia

Asic Design Engineer - Clocks IP

This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you will be doing: Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development.

Senior Asic Floorplan Design Engineer

This position involves working with the latest technology to continue driving next generation AI/ML ecosystems through our PCIe Switch Products - and managing mega datacenters, while leading world class performance, through our Enterprise Storage Products. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.

IC Design Engineer

As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software, DFT, and more. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.

Senior SOC Design Engineer

This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.

ASIC Design Engineer - New College Grad 2026

Our work opens up new universes to explore, enables amazing creativity and discovery and powers what were once science fiction inventions from artificial intelligence to autonomous cars. Widely considered to be one of the technology world’s most desirable employers, NVIDIA is an industry leader with groundbreaking developments in High-Performance Computing, Artificial Intelligence and Visualization.

Lead Hardware Design Validation Engineer - Memory Subsystem

This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. If you love solving complex signal integrity challenges and thrive on bridging the gap between design intent and manufacturing reality, we want to hear from you.

Signal Integrity and PCB Design Engineer

This position offers you a unique opportunity to craft and to influence the design and development of the next generation GPU and SoC, allowing you to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Working with architects, design leads, physical design leads and package leads, you will develop and to craft and optimize floorplans during early chip development.

ASIC Floorplan Design Engineer - New College Grad 2026

Senior ASIC Floorplan Design Engineer

Demonstrated experience applying AI/ML techniques in engineering workflows — this could include using LLMs for code generation and debugging, building ML-assisted design analysis tools, or integrating AI-assisted flows into EDA environments. This role is a rare opportunity to craft production-grade EDA tooling that operates at the bleeding edge of packaging technology, where no commercial solution exists yet and the problems you solve become the new industry baseline.

Package Design Methodology Engineer

Demonstrated experience applying AI/ML techniques in engineering workflows — this could include using LLMs for code generation and debugging, building ML-assisted design analysis tools, or integrating AI-assisted flows into EDA environments. Interposers are one of the most technically demanding layers in advanced semiconductor packaging — a silicon bridge connecting multiple dies with thousands of micro-bumps, routing signals at densities that push the limits of current EDA.

Senior Physical Design Interposer Engineer

ASIC Design Engineer – Clocks IP

As a member of the GPU Design Methodology team, you will document and deliver design guidelines that will help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and specifications. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

Senior ASIC Design Engineer - Agentic AI

and/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.

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