In lieu of a degree, minimum of 10 years' of prior related experience 6 years experience using VHDL/Verilog 6 years experience with and understanding of AMD Xilinx FPGA architectures 3 Years of professional experience with Xilinx Vivado 3 years experience performing timing closure, optimizing FPGA resource utilization 3 years experience debugging down to the hardware level, using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools Preferred Additional Skills: FPGA development and Verification Vendor tool suites: Xilinx ISE, Xilinx Vivado, Xilinx Vitis, Microchip Libero, Mentor Graphics ModelSim/Questa, Synopsis Synplicity Version Control tools such as GIT, SVN, CVS. Experience with advanced verification environments such as UVM & OVM Experience using System Verilog for verification Build FPGAs with difficult timing and/or difficult routing constraints Develop FPGA requirements and specifications FPGA Device Selection and supporting the Pinout on a new CCA Design High speed memory interfaces and/or high speed SERDES interfaces Analog to Digital (AD) and Digital to Analog (DA) interfaces Experience with AXI streaming and control buses Possess the ability to interface with Hardware, Software, and Systems Engineering Self-motivated individual with the ability to work and communicate effectively within a development group Bring-up of advanced FPGA products such as SoC, MPSoC, RFSoC, ACAP, etc.