146 Results for

Signal Processing Engineer Jobs in Cupertino, CA

Jobs

Fremont, CA

$121,000–$230,500 / year

In this role, you will create efficient, hardware-friendly algorithms that run directly on custom SoCs, enabling real-time processing with constraints on power, latency, area, and throughput.

We are seeking a talented Signal Processing Engineer to design, develop, and optimize advanced digital signal processing (DSP) algorithms for on-chip and embedded implementation.

30+ days ago

Palo Alto, California

This is a critical role focused on modeling and understanding time-series signals coming from IoT devices equipped with various sensors (IMU, acoustic, pressure, temperature, etc) that drive intelligent automation across physical infrastructure systems. Our platform processes visual, spatial, and temporal data from billions of real-world events—captured through edge devices, mobile sensors, and large-scale cloud infrastructure—to deliver intelligent, real-time decisions.

19 days ago

Sunnyvale, CA

Full time

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

San Leandro, California

p>SirenOpt is looking for a Staff Electrical Engineer – FPGA / MPSoC & Digital Signal Processing Systems to lead the architecture, design, implementation, and validation of high-performance programmable logic, embedded processing, and FPGA-based digital signal processing systems powering our next-generation metrology platform.

Bring up new boards in the lab, troubleshoot issues independently, and debug hardware/firmware interactions using oscilloscopes, logic analyzers, signal generators, power supplies, and related lab equipment.

20 days ago

San Leandro, CA

$160,000–$240,000 / year

p>SirenOpt is looking for a Staff Electrical Engineer - FPGA / MPSoC & Digital Signal Processing Systems to lead the architecture, design, implementation, and validation of high-performance programmable logic, embedded processing, and FPGA-based digital signal processing systems powering our next-generation metrology platform.

30+ days ago

Sunnyvale, CA

Drive the front-end design flow, including synthesis, Static Timing Analysis (STA), Clock Domain Crossing (CDC), and Logical Equivalency Checking (LEC) to ensure robust, sign-off quality designs.

15 days ago

Sunnyvale, CA

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. You"ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

30+ days ago

Sunnyvale, CA

We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

Sunnyvale, CA

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

Redwood City, California

$150,000–$300,000 / year

div>

$150,000 - $300,000 a year

Compensation & Benefits

Our hiring and compensation strategy is simple: find uncommonly good people and pay them uncommonly well.

We offer high flexibility between salary and equity-based compensation.

Interview Process

We will conduct interviews via Google Meet with the potential for an onsite visit; the typical process takes around 3-5 weeks to complete from start to finish.

30+ days ago

Palo Alto, CA

$20–$50 / hour

p>Consider before submitting an application:

This position is expected to start August or September 2026 and continue through fall term (ending approximately December 2026) or continuing into Winter/Spring 2027 if available and there is opportunity to do so. Our year-round program places the best students in positions where they will grow technically, professionally, and personally through their experience working closely with their Manager, Mentor, and team.

30+ days ago

Sunnyvale, CA

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Architect, design, and implement Digital Signal Processing (DSP) algorithms for high-speed optical communication systems, while driving the long-term technical roadmap for signal processing and communication architectures by staying current with academic and industry trends.

30+ days ago

San Jose, CA

$140,100–$182,100 / year

You will be a key member of an integrated product development team that includes marketing, program management, mechanical engineering, product engineering, package engineering, test engineering, applications engineering, manufacturing, operations, quality and reliability, and senior management. The Design Engineer will implement designs such as control systems, signal sources and circuits for products supporting diverse product segments such as Mobile Infrastructure, Defense and Aerospace, Broadband Infrastructure and 5G networks among others.

30+ days ago

San Jose, CA

$159,000–$347,000 / year

p>Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

30+ days ago

Santa Clara, CA

$156,853–$160,000 / year

Expertise in programming using Python, perl, scilab and Cshell; Experience with EDA tools such as Cadence Virtuoso, Cadence Simvision, Cadence Layout in circuit design; Experience in RTL level functional block behavioral verification; Experience in using Hspice, Spectre to build-up analog circuit test bench to perform transistor level simulation on analog/mixed-signal circuits. Job Title: Analog Mixed-Signal Design EngineerJob Duties: Design, develop, and characterize embedded analog circuits, such as high speed I/O, SerDes, FIFO, CDR, PLL, etc.

22 days ago

San Jose, California

Design, simulation and measurement of high speed ICs in at least 3 areas below: High Speed Serial Links utilizing serializers, deserializers, and data converters, voltage regulators, output drivers, phase locked loops, clock transmission/propagation, Opamps, programmable gain amplifiers, and equalization. Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.

14 days ago

San Jose, California

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Architect and design high-speed analog and mixed-signal circuits, including:

Transmit drivers (linear and/or PAM-based).
We are seeking an experienced Analog / Mixed-Signal IC Design Engineer to design and deliver high-performance Driver and TIA circuits in BiCMOS and advanced semiconductor nodes.

30+ days ago

Mountain View, CA

$186,000–$210,000 / year

The company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.

We are hiring a Mixed-Signal Digital Architecture Validation Engineer to partner with the internal engineering team at Lightmatter to deliver groundbreaking products to market.

30+ days ago

Santa Clara, CA

p>The team works at the intersection of EDA tools, semiconductor process technology, and circuit design, partnering closely with: • Analog and mixed-signal IC design teams • Silicon photonics engineers • Foundry partners • EDA vendors • Device modeling and TCAD specialists. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.

30+ days ago

San Jose, California

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Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets.

BS in Electrical Engineering or a related field plus minimum 4 years of industry experience in analog and/or mixed-signal circuit design (or MS plus minimum 2 years of industry experience).

20 days ago

Santa Clara, CA

Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.

Experience with architecture, design, and production expertise in the following areas:

Architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs,ADC etc.

30+ days ago

Santa Clara, CA

$141,910–$269,100 / year

p>Business group: The Central Engineering Group (CEG) is Intels data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).

Position Overview The Aerospace, Defense & Government (ADG) Senior Analog/Mixed Signal Application Engineer specializing in Analog Mixed-Signal Design provides critical technical support to Intel Foundry Services customers on PDKs, design methodologies, and implementation flows.

30+ days ago

Santa Clara, CA

p>• Develop analog and mixed-signal architectures and circuits in CMOS or BiCMOS processes • Analyze technology, architecture, circuit design, and parametric design trade-offs to meet aggressive technical performance specifications • Perform transistor-level design and simulation using industry leading EDA tools • Lead comprehensive design reviews • Supervise Analog Circuit Physical Design Layout and edit layouts • Collaborate with Digital Design Engineers, CAD, Systems Engineering, Test Engineering and Applications teams to ensure DFT, DFM features and achieve rapid silicon bring-up and time to production release • Work closely with the verification team to define the verification matrix • Have the ownership of the top-level schematic and run all the top-level analog simulation • Participate in top-level AMS verification.

Proven track record at each stage of the following:

• Circuit architecture development and technical feasibility studies • Writing detailed block-level specifications and review documents • Detailed design and simulation of one or more of the following: • Oscillators • ADCs • DACs • Temperature sensors • Integer and Fractional-N PLLs • Digital PLLs • Low-noise op-amps • Regulators • Bandgap circuits in CMOS or BiCMOS processes • Subthreshold circuits and architecture.

30+ days ago

Sunnyvale, California

The role requires extensive experience in ASIC design and layout—including top-level ownership of ASIC tape-outs at leading commercial foundries—and deep expertise in either or both of these two categories: high-precision AMS circuits and high-speed wireline/silicon photonics interface circuits.

Demonstrated deep design expertise in one or both of the following categories:

High-precision designs: Analog-to-digital and digital-to-analog converters, bandgap references, voltage regulators, amplifiers, and other supporting circuitry.

28 days ago

Santa Clara, CA

$174,530–$261,400 / year

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

30+ days ago

Cupertino, CA

Engage with cross-functional analog, digital, DV, firmware, software, SoC architecture, technology, packaging, silicon validation, production test, manufacturing, and other teams to implement the new circuits and sub-systems and drive them into production.

Experience in working with product and production test engineers to develop and validate test plans, optimize production testing, and debug sources of low-DPPM parametric yield loss is highly valued.

30+ days ago

San Jose CA, California

Ensure power integrity for sensitive ADC and high-speed SerDes subsystems. Define FPGA-centric system architectures for high-throughput data processing platforms.

30+ days ago

Santa Clara, CA

$168,000–$264,500 / year

p>As a member of our Mixed Signal Design Validation team, you will be responsible for the bring-up and characterization of high-speed mixed-signal circuits, in addition to performing system validation of electro-optical transceivers. More recently, GPU deep learning ignited modern AI - the next era of computing - with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world.

30+ days ago

Santa Clara, CA

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.

27 days ago

Sunnyvale, CA

$155,000–$185,000 / year

p>The CMOS Mixed-Signal Circuit Design Engineer contributes to the development of advanced mixed signal circuits for low-power and high performance PLLs, PVT sensors and I/O's to be used in numerous products from high performance data center SoCs to low power consumer SoCs. We specialize in developing advanced mixed signal circuits for low power, high-speed, Fin-FET mixed-signal and analog IPs that are used in numerous products from high performance data center SoCs to low power consumer SoCs.

30+ days ago

Santa Clara, CA

$136,000–$218,500 / year

This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence! The base salary range is $136,000 USD - $218,500 USD for Level 3, and $168,000 USD - $264,500 USD for Level 4. You will also be eligible for equity and benefits.

30+ days ago

Sunnyvale, CA

$140,000–$190,000 / year

p>PREferred SKILLS AND EXPERIENCE:

• Master's degree or PhD in electrical engineering, computer engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity • 5+ years of electronic product experience designing hardware from concept through production; strong emphasis on full life-cycle development of new hardware products and not small incremental updates to legacy hardware • 5+ years of experience architecting, implementing, and debugging cutting edge DSP based SERDES products (i.e. 56Gbps, 112Gbps, 224Gbps) working across package and PCB • 5+ years of experience specifying, analyzing, debugging, and working with high speed, high bandwidth memory interfaces • 5+ years of experience designing, implementing, and debugging power delivery networks for large processors, FPGAs, SoC, or ASICs with complex power requirements • Thorough understanding of wireline transceiver concepts, architectures, and circuits • Strong understanding of computers and programming languages (Python, C/C++) • Demonstrated ability to work in a highly cross-functional role • Experience with low loss laminates, high volume PCB manufacturing, and high-speed connectors • Experience debugging and resolving EMI/EMC de-sense problems • Passion for working in dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit to deliver best in class products.

BASIC QUALIFICATIONS:

• Bachelor's degree in electrical engineering, computer engineering, or physics • 5+ years of industry experience designing circuits, electronic products, or hardware • 2+ years of experience using one of the 3D EM simulation tools and high-speed digital channel simulators (CST, HFSS, ADS etc.) • 2+ years of research or industry experience with high-speed digital design or power integrity.

30+ days ago

Milpitas, CA

$117,800–$200,300 / year

p>We are looking for a Mixed-Signal Electrical Engineer capable of taking ownership of complex PCBAs including: designing, simulating, and validating high-performance analog, digital circuits and power supplies for our cameras!

Doctorate (Academic) Degree and 0 years related work experience; Master's Level Degree and related work experience of 3 years; Bachelor's Level Degree and related work experience of 5 years.

30+ days ago

Santa Clara, CA

p>What we need to see:

• MS and/or PhD in Electrical and Computer Engineering (or equivalent experience) with minimum 2 years of work experience MS and/or PhD in Electrical and Computer Engineering (or equivalent experience) with minimum 2 years of work experience.

• Familiarity with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro.

30+ days ago

San Jose CA, California

Oscilloscopes, function generators, spectrum analyzers, network analyzers. Minimum 5+ years of experience in analog or mixed-signal circuit design (PhD graduates may qualify with less experience).

30+ days ago

Mountain View, CA

The Role: The Senior Signal Integrity Engineer at General Motors plays a crucial role in ensuring the performance and reliability of high-speed hardware designs within the ECU Electrical team. Our vision is a world with Zero Crashes, Zero Emissions and Zero Congestion and we embrace the responsibility to lead the change that will make our world better, safer and more equitable for all.

30+ days ago

Santa Clara, CA

p>Lead and drive the creation of validation test plan and test scripts for DDR I/O associated with LPDDR, GDDR, and HBM memory interfaces, ensuring all necessary required analog and digital circuits are covered.

Work closely with multi-functional teams, including Mixed signal design, PISI team, hardware, firmware, and Memory qualification engineer, to resolve issues and improve the performance for memory interfaces.

30+ days ago

Sunnyvale, CA

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Lead the development of next-generation memory interfaces and evaluate high-speed interface IP, considering Input/Output Physical Layer (IO PHY), physical design, and SI/PI requirements.

30+ days ago

Santa Clara, CA

MS/PhD in Electrical Engineering and 10+ years of demonstrated experience in high-speed and low-power design on advanced CMOS technologies in the following areas: Analog Front Ends (TX Driver, TIA, CTLE, VGA), Data Converters, Voltage Regulators, Clock Generation and Distribution, DLLs, custom high-speed digital circuits. Design and develop high-speed and low-power analog mixed-signal circuits in advanced CMOS technologies, with a focus on SerDes (Serializer/Deserializer) die-to-die communication, and high-speed wireline design in general.

30+ days ago

Sunnyvale, CA

The hardware validation team ensures that this equipment operates properly electrically, functions as intended, meets quality requirements, and exhibits the level of reliability expected by customers.

As a hardware validation engineer, you will qualify networking hardware like switches, smart-network interface cards, custom cables, and other specialized hardware for Google"s data centers.

21 days ago

Mountain View, CA

By leveraging cutting-edge automation and academic research collaborations, we solve critical hardware challenges to ensure the performance and robustness of Google"s flagship devices. Collaborate cross-functionally with Architecture, Silicon, and Product Design teams to resolve complex electrical design trade-offs.

30+ days ago

Santa Clara, CA

$122,440–$232,190 / year

p>Business group:

The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). Applies various strategies, tools, and methods for mixed signal designs including analog behavior modeling and circuit simulation to write RTL and optimize mixed signal logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.

30+ days ago

Palo Alto, CA

$145,000–$165,000 / year

Our application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Actual compensation may vary outside of these ranges and is dependent on various factors including but not limited to a candidate's qualifications including relevant education and training, competencies, experience, geographic location, and business needs.

30+ days ago

Fremont, CA

p>Google"s Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display.

Design, develop, and debug multi-site ATE test programs (Advantest V93000 or Teradyne UltraFLEX) focusing on high-efficiency parallel testing for digital and AMS blocks.

21 days ago

Sunnyvale, CA

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving channel behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

San Jose, CA

Remote

$183,800–$263,600 / year

Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio.

Bachelor''s degree in Electrical Engineering and 8+ years of relevant signal and power integrity experience, or Master''s degree in Electrical Engineering and 6+ years of relevant signal and power integrity experience, or PhD in Electrical Engineering and 3+ years of relevant signal and power integrity experience.

7 days ago

San Jose, CA

$120,000–$180,000 / year

p>Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform.

Strong knowledge of analog/mixed‑signal circuits such as op‑amps, bandgap, regulators, comparators, equalization circuits, PLL/DLL, and phase interpolators.

7 days ago

Santa Clara, CA

$156,853–$160,000 / year

Job Title: Analog Design Engineer Job Duties:Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso. Design the internal Discrete-time Circuits, Peripheral circuits and Timing control for a CMOS image sensor, including bias circuits, driver/level shifter, switched capacitor, logic gates and slew rate control.

22 days ago

San Jose, CA

$150,000–$180,000 / year

p>InvenSense's motion tracking, audio and location platforms, and services can be found in many of the world's largest and most iconic brands including smartphones, tablets, wearables, drones, gaming devices, internet of things, automotive products, and remote controls for smart TVs.

Strong skills in designing various analog/mixed-signal blocks including:

• MEMS sense amplifiers (precision switched-capacitor OPAMP) • Analog-to-Digital Converter (ADC) • Bandgap references • Charge pumps • Oscillator circuits.

30+ days ago

San Jose, CA

$120,000–$180,000 / year

Strong knowledge of analog/mixed‑signal circuits such as op‑amps, bandgap, regulators, comparators, equalization circuits, PLL/DLL, and phase interpolators.

4 days ago

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Signal Processing Engineer Jobs in Cupertino, CA

Signal Processing Engineer Neuralink Corp

Senior AI Engineer, Time-Series Signal Processing BrightAI Corporation

Verification Engineer, Digital Signal Processing Google

Staff Electrical Engineer – FPGA / MPSoC Systems & Digital Signal Processing SirenOpt

Staff Electrical Engineer - FPGA / MPSoC Systems & Digital Signal Processing SirenOpt Inc

RTL Design Engineer, Digital Signal Processing Google LLC

Embedded Firmware Engineer, Digital Signal Processing Google LLC

Design Verification Engineer, Digital Signal Processing Google LLC

Staff Design Engineer, Digital Signal Processing Google LLC

Radar Signal Processing Engineer (MTI/STAP) Array Labs

Internship, NVH Digital Signal Processing Engineer (Fall 2026) Tesla Inc

Staff Architect, Digital Signal Processing, Google Cloud Google LLC

Staff RF/Mixed Signal/Analog Design Engineer Qorvo Inc

Principal Analog Design Engineer - Mixed-Signal PHY (Clocking / High-Speed I/O) Micron Technology Inc

Analog Mixed-Signal Design Engineer Omnivision Technologies

Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid) Cisco Systems

Senior/Principal Analog & Mixed Signal Design Engineers Lumilens

Mixed-Signal Digital Architecture Validation Engineer Lightmatter Inc

Principal Analog/Mixed Signal CAD Engineer Marvell Technology Inc

Analog/Mixed-Signal Circuit Design Engineer SK hynix America

Analog/Mixed-Signal Design Engineer, Principal Marvell Technology Inc

Senior Analog / Mixed Signal Application Engineer Intel Corp

Principal Analog Mixed-Signal Design Engineer SiTime Corp

Principal Analog/Mixed-Signal ASIC Engineer Taara

Principal Analog Mixed-Signal IC Design Engineer Marvell Technology Inc

Mixed-Signal IC Design Engineer Apple Inc

Senior Electrical Engineer (FPGA / High-Speed / Mixed-Signal) Zealogics.com

Mixed Signal Design Validation Engineer NVIDIA Corp

Senior Mixed Signal Design Engineer NVIDIA Corp

CMOS Mixed-Signal Circuit Design Engineer Analog Bits, Inc.,

Senior Mixed-Signal Design Engineer NVIDIA Corp

Sr. Signal and Power Integrity Engineer, Satellites Starlink Space Exploration Technologies Corp

Mixed-Signal Electrical Design Engineer KLA Corp

Signal and Power Integrity Engineer NVIDIA Corp

Senior Analog & Mixed-Signal Electronics Engineer Zealogics.com

Senior Signal Integrity Engineer General Motors Co

Senior Mixed Signal Design Validation Engineer NVIDIA Corp

Signal and Power Integrity Engineer Google LLC

Principal High-Speed Analog Mixed Signal Design Engineer Marvell Technology Inc

Hardware Validation Engineer, Networking and Signal Integrity, Platforms Google LLC

Staff Signal and Power Integrity Engineer Google LLC

Mixed Signal Logic Design Engineer Intel Corp

Senior Analog / Mixed-Signal IC Design Engineer PsiQuantum Corp

Senior CMOS Test and Validation Lead, Analog Mixed-Signal, Raxium Google LLC

Technical Lead, Custom Digital Circuit Design, Mixed Signal Google LLC

ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote) Cisco Systems Inc

Senior Analog Design Engineer Credo Semiconductor, Inc.

Analog Design Engineer Omnivision Technologies

Analog Design Engineer - Sr Staff TDK Corp

Senior Analog Design Engineer DustPhotonics Ltd

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