2,521 Results for

Signal Processing Engineer Jobs in Santa Clara, CA

Jobs

Livermore, CA

$125,000–$165,000 / year

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9 days ago

Cupertino,, California

$52–$55 / hour
Contractor

We are seeking a skilled Test Engineer III to support regulatory Acoustics Software Requirements Specifications (SRS) testing for the Hearing Test Feature and Hearing Aid Feature. The specific compensation for this position will be determined by a number of factors, including the scope, complexity and location of the role as well as the cost of labor in the market; the skills, education, training, credentials and experience of the candidate; and other conditions of employment.

30+ days ago

Belmont, CA

Full time

p tabindex="0"> As a Principal 5G Location Algorithms Engineer, you will design, implement, and optimize advanced signal processing and location estimation algorithms to determine the real-time position of devices in the physical world.

30+ days ago

Mountain View, CA

p>While specific benefits vary, here are some of the ways we strive to take care of our eligible team members globally: Comprehensive health, life, and disability insurance | Commute subsidy | Employee stock ownership | Competitive retirement/pension plans | Generous vacation and personal days | Support for new parents through leave and family-care programs | Office food snacks | Mental Health and Wellbeing programs and support | Employee Resource Groups | Global Employee Assistance Program | Training and development programs | Volunteering and donation matching program. You will design, build, and operate the online services that receive ad interaction events from mobile SDKs and other partners, process terabytes of data at scale — including enrichments, transformations, and privacy operations — and deliver signals to external and internal partners in real time.

2 days ago

Foster City, CA

$123,000–$190,900 / year

p>As a Senior Data Engineer, you will play a critical role in designing and delivering scalable, high-quality data solutions that enable intelligent decision-making across Global Data Engineering capabilities. Visa is a world leader in payments technology, facilitating transactions between consumers, merchants, financial institutions and government entities across more than 200 countries and territories, dedicated to uplifting everyone, everywhere by being the best way to pay and be paid.

4 days ago

San Francisco, CA

$228,960–$315,360 / year

We’re looking for machine learning engineers with experience applying state-of-the-art machine learning and modeling techniques, including natural language processing, anomaly detection, optimization, and time series forecasting, across different product areas. You’ll lead experimentation with new modeling approaches and strategies, collaborate closely with engineers on ingesting signals and productionizing models, and help build the next wave of cash flow based underwriting.

2 days ago

Mountain View, CA

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Masters Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python

OR Bachelors Degree in Computer Science or related technical field AND 12+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.

2 days ago

San Francisco, CA

p>Youll be a small, high-impact team of one with a large surface area, partnering closely with leaders across Engineering, Platform, Finance, and Product — from building cost data pipelines and reporting, to defining cost guardrails for new architectures, to helping forecast the impact of product and infrastructure bets, and handling all Engineering vendor negotiations, licensing, and contracts.

As a Staff FinOps Engineer, you will own the technical backbone that powers Amplitudes cost visibility across major vendors (cloud hosting, observability, AI/ML, and core SaaS), and partner directly with Engineering, Finance, and Product to turn that visibility into real savings and better decisions.

2 days ago

Santa Clara, CA

$120,000–$235,000 / year

What is needed is calibrated uncertainty at the signal level, a principled way to weight evidence depending on conditions, and the ability to detect when a signal has drifted out of its reliable operating range. A model at 92% precision on todays proxy attempt patterns can sit at 74% within two quarters, not because the model degraded, but because the attack surface shifted and the training distribution did not.

2 days ago

Foster City, CA

$123,000–$190,900 / year

Preferred Qualifications • 2 years or more with an Advanced Degree (Masters/PhD in Computer Science) • Proficiency in implementing and fine-tuning AI models using popular frameworks (e.g., TensorFlow, PyTorch, scikit-learn) • Exposure to leading-edge areas such as Machine Learning, Deep Learning, Stream Computing and MLOps.

Translate complex business challenges into clear engineering roadmaps, user requirements, and technical specifications that enable breakthrough innovation across payment flows, fraud intelligence, data products, and real‑time commerce platforms.

7 days ago

Fremont, CA

$121,000–$230,500 / year

In this role, you will create efficient, hardware-friendly algorithms that run directly on custom SoCs, enabling real-time processing with constraints on power, latency, area, and throughput.

We are seeking a talented Signal Processing Engineer to design, develop, and optimize advanced digital signal processing (DSP) algorithms for on-chip and embedded implementation.

30+ days ago

San Jose, CA

As a Staff Engineer Digital Signal Processing on our Research & Development team, you''ll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT.

30+ days ago

Palo Alto, California

This is a critical role focused on modeling and understanding time-series signals coming from IoT devices equipped with various sensors (IMU, acoustic, pressure, temperature, etc) that drive intelligent automation across physical infrastructure systems. Our platform processes visual, spatial, and temporal data from billions of real-world events—captured through edge devices, mobile sensors, and large-scale cloud infrastructure—to deliver intelligent, real-time decisions.

19 days ago

Sunnyvale, CA

Full time

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

San Leandro, California

p>SirenOpt is looking for a Staff Electrical Engineer – FPGA / MPSoC & Digital Signal Processing Systems to lead the architecture, design, implementation, and validation of high-performance programmable logic, embedded processing, and FPGA-based digital signal processing systems powering our next-generation metrology platform.

Bring up new boards in the lab, troubleshoot issues independently, and debug hardware/firmware interactions using oscilloscopes, logic analyzers, signal generators, power supplies, and related lab equipment.

20 days ago

Sunnyvale, CA

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

Sunnyvale, CA

Drive the front-end design flow, including synthesis, Static Timing Analysis (STA), Clock Domain Crossing (CDC), and Logical Equivalency Checking (LEC) to ensure robust, sign-off quality designs.

15 days ago

San Leandro, CA

$160,000–$240,000 / year

p>SirenOpt is looking for a Staff Electrical Engineer - FPGA / MPSoC & Digital Signal Processing Systems to lead the architecture, design, implementation, and validation of high-performance programmable logic, embedded processing, and FPGA-based digital signal processing systems powering our next-generation metrology platform.

30+ days ago

Sunnyvale, CA

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. You"ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

30+ days ago

Sunnyvale, CA

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

Redwood City, California

$150,000–$300,000 / year

div>

$150,000 - $300,000 a year

Compensation & Benefits

Our hiring and compensation strategy is simple: find uncommonly good people and pay them uncommonly well.

We offer high flexibility between salary and equity-based compensation.

Interview Process

We will conduct interviews via Google Meet with the potential for an onsite visit; the typical process takes around 3-5 weeks to complete from start to finish.

30+ days ago

Palo Alto, CA

$20–$50 / hour

p>Consider before submitting an application:

This position is expected to start August or September 2026 and continue through fall term (ending approximately December 2026) or continuing into Winter/Spring 2027 if available and there is opportunity to do so. Our year-round program places the best students in positions where they will grow technically, professionally, and personally through their experience working closely with their Manager, Mentor, and team.

30+ days ago

Sunnyvale, CA

We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

Sunnyvale, CA

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.

30+ days ago

Santa Clara, CA

This hire will own the design and implementation of the real‑time signal‑processing subsystem that converts physics‑based channel descriptions into received signals for large numbers of emulated devices, across systems of potentially thousands of interconnected GPUs. You will work with the propagation engine and RAN stack teams to orchestrate the end‑to‑end simulation pipeline, ensuring that propagation updates, channel application, and stack execution remain synchronised across hundreds or thousands of GPUs.

30+ days ago

Sunnyvale, CA

Full time

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Architect, design, and implement Digital Signal Processing (DSP) algorithms for high-speed optical communication systems, while driving the long-term technical roadmap for signal processing and communication architectures by staying current with academic and industry trends.

30+ days ago

San Jose, CA

$140,100–$182,100 / year

You will be a key member of an integrated product development team that includes marketing, program management, mechanical engineering, product engineering, package engineering, test engineering, applications engineering, manufacturing, operations, quality and reliability, and senior management. The Design Engineer will implement designs such as control systems, signal sources and circuits for products supporting diverse product segments such as Mobile Infrastructure, Defense and Aerospace, Broadband Infrastructure and 5G networks among others.

30+ days ago

San Jose, CA

$159,000–$347,000 / year

p>Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

30+ days ago

Santa Clara, CA

$156,853–$160,000 / year

Expertise in programming using Python, perl, scilab and Cshell; Experience with EDA tools such as Cadence Virtuoso, Cadence Simvision, Cadence Layout in circuit design; Experience in RTL level functional block behavioral verification; Experience in using Hspice, Spectre to build-up analog circuit test bench to perform transistor level simulation on analog/mixed-signal circuits. Job Title: Analog Mixed-Signal Design EngineerJob Duties: Design, develop, and characterize embedded analog circuits, such as high speed I/O, SerDes, FIFO, CDR, PLL, etc.

22 days ago

Sunnyvale, CA

From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Architect, design, and implement Digital Signal Processing (DSP) algorithms for high-speed optical communication systems, while driving the long-term technical roadmap for signal processing and communication architectures by staying current with academic and industry trends.

30+ days ago

San Jose, California

Design, simulation and measurement of high speed ICs in at least 3 areas below: High Speed Serial Links utilizing serializers, deserializers, and data converters, voltage regulators, output drivers, phase locked loops, clock transmission/propagation, Opamps, programmable gain amplifiers, and equalization. Acacia designs intelligent transceivers using advanced signal processing and photonic integration for the 100G, 400G and 1T bit speed fiber optic transmission market deployed in data center, metro, long-haul and ultra-long haul telecommunication networks.

14 days ago

Santa Clara, CA

p>The team works at the intersection of EDA tools, semiconductor process technology, and circuit design, partnering closely with: • Analog and mixed-signal IC design teams • Silicon photonics engineers • Foundry partners • EDA vendors • Device modeling and TCAD specialists. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.

30+ days ago

San Jose, California

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Architect and design high-speed analog and mixed-signal circuits, including:

Transmit drivers (linear and/or PAM-based).
We are seeking an experienced Analog / Mixed-Signal IC Design Engineer to design and deliver high-performance Driver and TIA circuits in BiCMOS and advanced semiconductor nodes.

30+ days ago

Santa Clara, CA

$141,910–$269,100 / year

p>Business group: The Central Engineering Group (CEG) is Intels data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).

Position Overview The Aerospace, Defense & Government (ADG) Senior Analog/Mixed Signal Application Engineer specializing in Analog Mixed-Signal Design provides critical technical support to Intel Foundry Services customers on PDKs, design methodologies, and implementation flows.

30+ days ago

San Jose, California

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Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets.

BS in Electrical Engineering or a related field plus minimum 4 years of industry experience in analog and/or mixed-signal circuit design (or MS plus minimum 2 years of industry experience).

20 days ago

Santa Clara, CA

Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.

Experience with architecture, design, and production expertise in the following areas:

Architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs,ADC etc.

30+ days ago

Santa Clara, CA

p>• Develop analog and mixed-signal architectures and circuits in CMOS or BiCMOS processes • Analyze technology, architecture, circuit design, and parametric design trade-offs to meet aggressive technical performance specifications • Perform transistor-level design and simulation using industry leading EDA tools • Lead comprehensive design reviews • Supervise Analog Circuit Physical Design Layout and edit layouts • Collaborate with Digital Design Engineers, CAD, Systems Engineering, Test Engineering and Applications teams to ensure DFT, DFM features and achieve rapid silicon bring-up and time to production release • Work closely with the verification team to define the verification matrix • Have the ownership of the top-level schematic and run all the top-level analog simulation • Participate in top-level AMS verification.

Proven track record at each stage of the following:

• Circuit architecture development and technical feasibility studies • Writing detailed block-level specifications and review documents • Detailed design and simulation of one or more of the following: • Oscillators • ADCs • DACs • Temperature sensors • Integer and Fractional-N PLLs • Digital PLLs • Low-noise op-amps • Regulators • Bandgap circuits in CMOS or BiCMOS processes • Subthreshold circuits and architecture.

30+ days ago

Mountain View, CA

$186,000–$210,000 / year

The company invented the world's first 3D-stacked photonics engine, Passage, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.

We are hiring a Mixed-Signal Digital Architecture Validation Engineer to partner with the internal engineering team at Lightmatter to deliver groundbreaking products to market.

30+ days ago

Alameda, California

p style="min-height:1.5em">Ideal candidate would take ownership of modules/blocks – specification-to-design life cycle – and document/perform: architecture exploration, transistor-level design, pre- and post-layout simulation, and Monte Carlo/SOA/reliability/aging verification. The candidate would be comfortable with ambiguity that comes with working in compact and fast-paced environments, and be willing to involve in ancillary activities, such as post-silicon bring-up/debug and validation/characterization.

30+ days ago

Santa Clara, CA

$174,530–$261,400 / year

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

30+ days ago

Cupertino, CA

Engage with cross-functional analog, digital, DV, firmware, software, SoC architecture, technology, packaging, silicon validation, production test, manufacturing, and other teams to implement the new circuits and sub-systems and drive them into production.

Experience in working with product and production test engineers to develop and validate test plans, optimize production testing, and debug sources of low-DPPM parametric yield loss is highly valued.

30+ days ago

Sunnyvale, California

The role requires extensive experience in ASIC design and layout—including top-level ownership of ASIC tape-outs at leading commercial foundries—and deep expertise in either or both of these two categories: high-precision AMS circuits and high-speed wireline/silicon photonics interface circuits.

Demonstrated deep design expertise in one or both of the following categories:

High-precision designs: Analog-to-digital and digital-to-analog converters, bandgap references, voltage regulators, amplifiers, and other supporting circuitry.

28 days ago

Cupertino, CA

Define and specify requirements for analog IP provided by external vendors Drive technical discussions with vendors and foundries Supervise IP design, characterization, and debug Review and sign off of IP design/tools/flow/collaterals, test plans, characterization reports Support Apple IP integration teams including front-end design, design verification, physical design, DFT, TE/PE, SIPI Support Apple system teams with product integration, HW/SW bring up, and debugBSEE/MSEE plus a minimum 7 years of experience in analog IC design. As a member of our dynamic group, you will have the rare and great opportunity to work on upcoming products that will delight and encourage millions of Apple's customers every day!

30+ days ago

San Jose CA, California

Ensure power integrity for sensitive ADC and high-speed SerDes subsystems. Define FPGA-centric system architectures for high-throughput data processing platforms.

30+ days ago

San Francisco, California

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This role provides the opportunity to work across a wide technical spectrum, from low‑noise, low‑level signal measurement to high‑voltage and high‑frequency electronics, including systems that generate and control thousands of volts at GHz‑range frequencies.

The full-time equivalent pay range for this position is $124,976.00 - $219,000.00/yr plus eligibility for bonus, stock and benefits.

19 days ago

Santa Clara, CA

$116,000–$189,750 / year

p>As a member of our Mixed Signal Design Validation team, you will be responsible for the bring-up and characterization of high-speed mixed-signal circuits, in addition to performing system validation of electro-optical transceivers. More recently, GPU deep learning ignited modern AI - the next era of computing - with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world.

30+ days ago

Santa Clara, CA

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

30+ days ago

Santa Clara, CA

$136,000–$218,500 / year

This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence! The base salary range is $136,000 USD - $218,500 USD for Level 3, and $168,000 USD - $264,500 USD for Level 4. You will also be eligible for equity and benefits.

30+ days ago

Sunnyvale, CA

$155,000–$185,000 / year

p>The CMOS Mixed-Signal Circuit Design Engineer contributes to the development of advanced mixed signal circuits for low-power and high performance PLLs, PVT sensors and I/O's to be used in numerous products from high performance data center SoCs to low power consumer SoCs. We specialize in developing advanced mixed signal circuits for low power, high-speed, Fin-FET mixed-signal and analog IPs that are used in numerous products from high performance data center SoCs to low power consumer SoCs.

30+ days ago

Cupertino, CA

p>If you are early in your journey towards a chip design career and wish to challenge yourself in a technical and multi-disciplinary effort, come join the Apple mixed-signal silicon design team.

In this job you will be responsible for translating custom mixed-signal circuit schematics into efficient SystemVerilog behavioral models for high level simulations.

30+ days ago

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Signal Processing Engineer Jobs in Santa Clara, CA

FSOC Embedded Controls Engineer Jobot

Test Engineer III Pinnacle Technical Resources

Principal 5G Location Algorithms Engineer GPS Company

Senior Software Engineer, Attribution Unity Software

Sr. Data Engineer Visa Technology and Operations LLC

Senior Machine Learning Engineer - Credit Plaid

Principal Software Engineer Microsoft

Staff Engineer, FinOps Amplitude

Machine Learning Engineer, Integrity HackerRank

Applications Program Analyst Visa Technology and Operations LLC

Signal Processing Engineer Neuralink Corp

Staff Engineer Digital Signal Processing Infineon Technologies AG

Senior AI Engineer, Time-Series Signal Processing BrightAI Corporation

Verification Engineer, Digital Signal Processing Google

Staff Electrical Engineer – FPGA / MPSoC Systems & Digital Signal Processing SirenOpt

Staff Design Engineer, Digital Signal Processing Google

RTL Design Engineer, Digital Signal Processing Google LLC

Staff Electrical Engineer - FPGA / MPSoC Systems & Digital Signal Processing SirenOpt Inc

Embedded Firmware Engineer, Digital Signal Processing Google LLC

Embedded Firmware Engineer, Digital Signal Processing Google

Radar Signal Processing Engineer (MTI/STAP) Array Labs

Internship, NVH Digital Signal Processing Engineer (Fall 2026) Tesla Inc

Design Verification Engineer, Digital Signal Processing Google LLC

Staff Design Engineer, Digital Signal Processing Google LLC

Senior Multi‑GPU Signal Processing and System Architecture Engineer NVIDIA Corp

Architect, Digital Signal Processing, Google Cloud Google

Staff RF/Mixed Signal/Analog Design Engineer Qorvo Inc

Principal Analog Design Engineer - Mixed-Signal PHY (Clocking / High-Speed I/O) Micron Technology Inc

Analog Mixed-Signal Design Engineer Omnivision Technologies

Staff Architect, Digital Signal Processing, Google Cloud Google LLC

Senior Analog/mixed-signal IC Design Engineer - Acacia (Hybrid) Cisco Systems

Principal Analog/Mixed Signal CAD Engineer Marvell Technology Inc

Senior/Principal Analog & Mixed Signal Design Engineers Lumilens

Senior Analog / Mixed Signal Application Engineer Intel Corp

Analog/Mixed-Signal Circuit Design Engineer SK hynix America

Analog/Mixed-Signal Design Engineer, Principal Marvell Technology Inc

Principal Analog Mixed-Signal Design Engineer SiTime Corp

Mixed-Signal Digital Architecture Validation Engineer Lightmatter Inc

Analog Mixed-Signal Design Engineer Epia Neuro

Principal Analog Mixed-Signal IC Design Engineer Marvell Technology Inc

Mixed-Signal IC Design Engineer Apple Inc

Principal Analog/Mixed-Signal ASIC Engineer Taara

Analog Mixed Signal IP Engineer Apple Inc

Senior Electrical Engineer (FPGA / High-Speed / Mixed-Signal) Zealogics.com

Senior Electrical Engineer - Mixed Signal (Instrumentation) Agilent Technologies

Mixed Signal Design Validation Engineer NVIDIA Corp

Senior Mixed Signal Design Engineer NVIDIA Corp

Senior Mixed-Signal Design Engineer NVIDIA Corp

CMOS Mixed-Signal Circuit Design Engineer Analog Bits, Inc.,

Mixed-Signal Behavioral Modeling Engineer Apple Inc

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