CPU Top-Level Design Verification Engineer Apple IncCPU Top-Level Design Verification EngineerSanta Clara, CADevelop coverage monitors and analyze coverage to ensure all the test cases in the plans are coveredMinimum BSBS in Electrical Engineering, Computer Science, or Computer Engineering preferred Computer Architecture - Strong understanding of processor design, instruction set architectures, pipeline design, cache hierarchies, and memory systems RTL development - Experience creating efficient, synthesizable RTL code with understanding of timing closure, area optimization, and power-aware design techniques SystemVerilog - Proficiency in SystemVerilog including advanced features like interfaces, assertions, and verification constructs. As a CPU Top-Level Design Verification Engineer owning the verification methodology, tools, and flow of a high performance lower power processor design, you will have the responsibilities as follows: Work closely with verification engineers and RTL designers on defining effective verification methodology for low power complex processor design.
Optical Firmware Engineer, Principal Astera Labs IncOptical Firmware Engineer, PrincipalSan Jose, CAAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Staff Sustaining Reliability Engineer Rivian and Volkswagen Group TechnologiesStaff Sustaining Reliability EngineerPalo Alto, CaliforniaRivian and Volkswagen Group Technologies may use your Candidate Personal Data for the purposes of (i) tracking interactions with our recruiting system; (ii) carrying out, analyzing and improving our application and recruitment process, including assessing you and your application and conducting employment, background and reference checks; (iii) establishing an employment relationship or entering into an employment contract with you; (iv) complying with our legal, regulatory and corporate governance obligations; (v) record keeping; (vi) ensuring network and information security and preventing fraud; and (vii) as otherwise required or permitted by applicable law. Rivian and Volkswagen Group Technologies may share your Candidate Personal Data with (i) internal personnel who have a need to know such information in order to perform their duties, including individuals on our People Team, Finance, Legal, and the team(s) with the position(s) for which you are applying; (ii) Rivian and Volkswagen Group Technologies affiliates; and (iii) Rivian and Volkswagen Group Technologies’ service providers, including providers of background checks, staffing services, and cloud services.
Antenna Design Engineer Array LabsAntenna Design EngineerRedwood City, CaliforniaITAR Requirements: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. In forging an affordable, accessible, accurate representation of Earth, our work has the potential to transform the face of dozens of fields, including autonomy, telecommunications, disaster relief, gaming, climate science, defense and construction.
Analog Design Engineer, Staff D-MatrixAnalog Design Engineer, StaffSanta Clara, CAJob scope includes schematic circuit design, system level performance analysis, design test benches for simulations and verifications, guide layout engineers on layout in deep sub-micron process nodes from 7nm and below, and to optimize design and layout to achieve low power design performance over process-voltage-temperature corners and six-sigma Monte-Carlo yield analysis. What you will Bring: Completed a BS/MS/PhD Preferred degree in Electrical Engineering and 7 + years of related professional experience in high-speed circuit design blocks such as Phase Interpolator, Clocking, PLL designs.
Sr. Staff Thermo-Mechanical Engineer MarvellSr. Staff Thermo-Mechanical EngineerSanta Clara, CABachelor's degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree. This role plays a critical part in ensuring the mechanical robustness, dimensional stability, and long term reliability of sockets, test assemblies, handlers/thermal heads and package level interfaces used in next generation high power XPU and Silicon Photonics programs.
Staff Machine Learning Engineer - Mapping General Motors CoStaff Machine Learning Engineer - MappingSunnyvale, CA$185,100–$335,300 / yearBenefit options include medical, dental, vision, Health Savings Account, Flexible Spending Accounts, retirement savings plan, sickness and accident benefits, life insurance, paid vacation & holidays, tuition assistance programs, employee assistance program, GM vehicle discounts and more. Our Mapping organization is building national-scale, next-generation mapping systems that move beyond static HD maps toward automated, ML-driven map reconstruction pipelines powered by onboard sensor data.
Staff Data Science Engineer - Hardware & Silicon Validation MarvellStaff Data Science Engineer - Hardware & Silicon ValidationSanta Clara, CACollaboration with Engineering Teams: Work closely with hardware, firmware, and validation engineers to understand data, define metrics, and translate complex data into actionable insights Automation & Efficiency: Build tools and workflows that reduce manual debugging effort and accelerate validation cycles. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
Technical Lead Product Engineer Astera Labs IncTechnical Lead Product EngineerSan Jose, CAAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
LabVIEW Software Engineer Level 4 Northrop Grumman CorpLabVIEW Software Engineer Level 4Sunnyvale, CA$142,200–$213,400 / yearBasic Qualifications: Bachelor's degree in Mechanical Engineering, Electrical Engineering, Aerospace Engineering, or a related STEM discipline with 8 years of relevant experience; Master's degree in Mechanical Engineering, Electrical Engineering, Aerospace Engineering, or a related STEM discipline with 6 years of relevant experience. Northrop Grumman Marine Systems specializes in the analysis, development, manufacture, assembly and testing of missile launching and handling systems, propulsion, and power generation systems for naval surface ships and submarines.
Senior Principal Engineer, Micro-architecture and RTL Marvell Technology IncSenior Principal Engineer, Micro-architecture and RTLSanta Clara, CAParticipate in the full design development cycle, end-to-end, from writing micro-architecture docs, RTL coding, specifications of timing, closely work with design verification teams to review test plans and execution of test, ability to bring up block tests on silicon during lab testing, and maintenance of designed blocks and reusable IPs. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
Mechanical Engineer 4 Mattson Technology IncMechanical Engineer 4Fremont, CASpecify, supervise, and perform engineering analysis of complex scope, in the following areas: Wafer transfer methods including robotics, friction, particle control, vacuum and end effectors, Mechanism design in assemblies such as slit valves, lift pins, indexers, Wafer temperature management (in both process and transfer environments) including cooling stations, pedestals, ESC. This role will be responsible Work across the multiple product lines and tool generations to aid in conceptualize, design, manage vendors, document, support manufacturing and customers with new development and CIP projects working closely with various internal departments to successfully deliver quality projects on-time and within budget.
Principal Product Engineer Astera LabsPrincipal Product EngineerSan Jose, CAAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Staff Soc RTL Engineer QuadricStaff Soc RTL EngineerBurlingame, CA$175,000–$230,000 / yearThe actual base salary offered will depend on a number of factors, including the specific level of the role, years and depth of relevant experience, technical skills and competencies, the criticality of the role to the business, internal equity, and work location. Quadric is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture.
NewPrincipal Software Integration Engineer Astera LabsPrincipal Software Integration EngineerSan Jose, CA$133,200–$185,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Optical Firmware Engineer, Principal Astera LabsOptical Firmware Engineer, PrincipalSan Jose, CA$185,000–$240,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
NewSystems Debug Engineer - Data Center HWE Apple IncSystems Debug Engineer - Data Center HWESunnyvale, CASupport early product development by setting up custom and OEM data center hardware, running functional checks, documenting results, creating triage runbooks, and enabling critical lab deployments across multiple programs. Proficient in Python and Bash (or equivalent), with experience automating infrastructure provisioning, configuration management, and validation workflows (e.g., with Ansible).MS degree with 3-5 years of relevant experience.
LabVIEW Systems Engineer Level 3 Northrop Grumman CorpLabVIEW Systems Engineer Level 3Sunnyvale, CA$114,000–$171,000 / yearBasic Qualifications: Bachelor's degree in Mechanical Engineering, Electrical Engineering, Aerospace Engineering, or a related STEM discipline with 5 years of relevant experience; Master's degree in Mechanical Engineering, Electrical Engineering, Aerospace Engineering, or a related STEM discipline with 3 years of relevant experience. Northrop Grumman Marine Systems specializes in the analysis, development, manufacture, assembly and testing of missile launching and handling systems, propulsion, and power generation systems for naval surface ships and submarines.
Performance Control Software Engineer - Platform Architecture Apple IncPerformance Control Software Engineer - Platform ArchitectureCupertino, CAYou will design and conduct performance experiments, create instrumentation and data visualizations, prototype innovative in-kernel performance control algorithms, collaborate with teams ranging from the core operating system through user-facing applications, and productize the software that controls the performance of every workload executed on hundreds of millions of Apple products around the world. As a member of our multifaceted group, you will have the unique and phenomenal opportunity to craft upcoming products that will delight and inspire millions of Apples customers every single day.
Chief Engineer Able ServicesChief EngineerSan Mateo, CAEnsure compliance of Customer SLA parameters and Change Control activities, review and approve all system changes (set-points, thresholds, alarm-points, etc.) which could impact customer operations. Resolve all electrical, mechanical and Fire Protection System issues in the facilities while minimizing risk and business impact and communicate issues to management and customers in a timely manner.
Applications Engineer Monolithic Power SystemsApplications EngineerSan Jose, California$120,000–$140,000 / yearAs part of the MPS team you will evaluate the customer's requirement regarding systems application and administering the technical, technological, and functional aspects of proposals accordingly as instructed. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers.
Hardware Compliance Regulatory Engineer Cisco Systems IncHardware Compliance Regulatory EngineerSan Jose, CA$152,400–$221,800 / yearAs part of the central hardware power engineering group, you will collaborate with various functions like Hardware Design and Test, ASIC Design and Test, Power Engineering, Signal Integrity, EMC / EMI, and Mechanical Design, expanding the breadth of your knowledge, designing power, and delivering amazing products to the market. Minimum Qualifications: Bachelor's degree in electrical engineering, electronics engineering, RF Engineering, or related field with 7+ years of experience; or master's degree with 4+ years of experience or PhD with one year of experience.
Senior RF Front-End Design Engineer ZiplineSenior RF Front-End Design EngineerSouth San Francisco, CA$160,000–$250,000 / yearYou will design wireless platforms supporting technologies including 4G LTE, 5G NR, GNSS, Wi-Fi, ADS-B, UAT, Bluetooth, ISM radios, emerging Vehicle-to-Vehicle (V2V) communications, and future air-to-ground communication systems , all operating simultaneously within extremely space- and power-constrained platforms. Our aircraft, docks, droids, and logistics infrastructure integrate numerous simultaneously operating wireless systems across licensed and unlicensed spectrum while operating in dynamic airborne environments with demanding size, weight, power, reliability, and regulatory constraints.
Staff Applications Engineer Monolithic Power SystemsStaff Applications EngineerSan Jose, CaliforniaJob Duties: Work with design engineers, field applications and marketing team to define and debug analog IC products in DC/DC converters in computing power solutions including notebooks, graphic cards and desktop, and autonomous driving/infotainment systems; provide application support and technical training for key customers and field application engineers; develop application reference circuits and system level power management solutions for computing markets; write data sheets, application/design notes and papers in professional journals and conferences to promote company products. At MPS, we cultivate creativity, are passionate about sustainability, and are committed to providing leading-edge products and innovation to our customers.
CMOS Mixed-Signal Circuit Design Engineer Analog Bits, Inc.,CMOS Mixed-Signal Circuit Design EngineerSunnyvale, CA$155,000–$185,000 / yearThe CMOS Mixed-Signal Circuit Design Engineer contributes to the development of advanced mixed signal circuits for low-power and high performance PLLs, PVT sensors and I/O's to be used in numerous products from high performance data center SoCs to low power consumer SoCs. We specialize in developing advanced mixed signal circuits for low power, high-speed, Fin-FET mixed-signal and analog IPs that are used in numerous products from high performance data center SoCs to low power consumer SoCs.
Senior Microgrid Engineer Prime ElectricSenior Microgrid EngineerSan Jose, CaliforniaThis role develops complete engineering design packages, performs electrical calculations, supports construction activities, and collaborates with project managers, field teams, vendors, and clients throughout the project lifecycle. Independently produce complete construction drawing packages, including medium- and low-voltage AC and DC one-line and wiring diagrams, grounding plans, data acquisition system (DAS) diagrams, electrical site plans, mechanical diagrams, and equipment layouts.
CPU RTL LLC Engineer Qualcomm IncCPU RTL LLC EngineerSanta Clara, CA$198,700–$298,100 / yearMinimum Qualifications: Bachelor''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Master''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Software Engineer, Compliance Validation Tesla IncSoftware Engineer, Compliance ValidationFremont, CA$120,000–$252,000 / yearWork with engineers from design, manufacturing, and quality teams to iterate on system designs and support product launches and partner with external regulatory agencies such Nationally Recognized Testing Laboratories (NRTLs) to align test planning, program timelines & project status, and proactively seek to resolve issues. Tesla is leveraging its world-class expertise in power electronics, vertical integration, firmware, and large-scale deployment to deliver reliable, scalable BESS products at residential, industrial, and utility levels.
Senior Formal Verification Engineer AuradineSenior Formal Verification EngineerSanta Clara, CA$200,000–$500,000 / yearOwn and drive formal verification for complex SoC blocks-CPUs, control processors, floating-point units, vector/SIMD engines, and datapath-heavy designs. You will apply formal methods to the hardest correctness problems in the design, working with architects, RTL, and verification teams to prove correctness exhaustively and reach coverage that simulation cannot.
Senior Electrical Engineer - Compute Hardware Applied IntuitionSenior Electrical Engineer - Compute HardwareSunnyvale, CaliforniaAt Applied Intuition, you will: Design electrical schematics for automotive, off-road, and defense (optional) applications, incorporating SoCs/MCUs, power (SMPS, Linear), memory components (eMMC, DDR, NVMe), and peripherals from concept to production. Applied Intuition is headquartered in Sunnyvale, California, with offices in Washington, D.C. San Diego; Ft. Walton Beach, Florida; Ann Arbor, Michigan; London; Stuttgart; Munich; Stockholm; Bangalore; Seoul; and Tokyo.
Principal Operational Readiness Engineer CoreWeave IncPrincipal Operational Readiness EngineerSunnyvale, CA$198,000–$264,000 / yearTo conform to U.S. Government export regulations applicable to that information, applicant must either be (A) a U.S. person, defined as a (i) U.S. citizen or national, (ii) U.S. lawful permanent resident (green card holder), (iii) refugee under 8 U.S.C. § 1157, or (iv) asylee under 8 U.S.C. § 1158, (B) eligible to access the export controlled information without a required export authorization, or (C) eligible and reasonably likely to obtain the required export authorization from the applicable U.S. government agency. Trusted by leading AI labs, startups, and global enterprises, CoreWeave combines superior infrastructure performance with deep technical expertise to accelerate breakthroughs and turn compute into capability.
Facilities Engineer Halo Industries, Inc.Facilities EngineerSanta Clara, CA$100,000–$120,000 / yearOccasionally kneel/crawl, climb (ladders, scaffolds, or other), reach/work above shoulders, grasp forcefully, write by hand, sort/file paperwork or parts, lift/carry/push/pull objects that weigh >40 pounds. · Building Systems Maintenance: Perform as well as oversee the installation, maintenance, and repair of all mechanical, electrical, and plumbing (MEP) systems, including HVAC, lighting, and fire protection.
SoC Validation Engineer - Pre-Silicon & Post-Silicon Diverse Lynx, LLCSoC Validation Engineer - Pre-Silicon & Post-SiliconSunnyvale, CAThe ideal candidate brings deep domain expertise in SoC IP subsystems - including Clock, Reset, Ethernet, I/O controllers, and related infrastructure IPs - with proven ability to develop test strategies, execute validation plans, and root-cause failures from simulation through first silicon and production. Develop comprehensive verification and validation plans for SoC-level IP subsystems including Clock Generation/Distribution (PLLs, clock muxes, dividers), Reset Architecture, Ethernet MAC/PHY, and I/O interfaces (GPIO, I2C, SPI, UART, JTAG).
NewSales Engineer Murata Electronics North AmericaSales EngineerSan Jose, CAWhy Consider This Job Opportunity The Sales Engineer position has the primary responsibility of designing-in company products with the objective of maximizing Murata’s print position and gaining customer approvals. Documents and communicates sales opportunities and necessary actions within the organization to execute strategies utilizing company tools/resources like Salesforce.com.
Mechanical Engineer, Data Center Design Engineering Meta Platforms IncMechanical Engineer, Data Center Design EngineeringMenlo Park, CAPeople who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics. Design Localization - Lead the implementation of the programmatic designs for site-specific conditions and support construction administration for self build and leases.
Principal Engineer, Silicon Validation Ayar Labs IncPrincipal Engineer, Silicon ValidationSan Jose, CA$200,000–$255,000 / yearBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Root Cause and Debug: Investigate and drive to closure all silicon failure modes, from signal integrity issues to mixed-signal anomalies, using systematic debug methodologies and close collaboration with design and firmware teams.
PCB Design & Validation Engineer CspeedPCB Design & Validation EngineerPalo Alto, CaliforniaYou will review transceiver requirements, develop validation plans, and execute them across all major subsystems: Ethernet SerDes, internal data pipeline, laser/modulator, mux/demux, and the MCU controller with EEPROM and I2C interfaces. Our executive team has a demonstrated track record of building and scaling category-defining semiconductor and infrastructure businesses at companies like Broadcom, Lumentum, Tesla, Apple, Samsung, Intel, and VMware.
System Software Engineer (Embedded) Cerebras SystemsSystem Software Engineer (Embedded)Sunnyvale, CaliforniaOur team owns a diverse range of embedded and system level components that enable the WSE to operate reliably at scale, including microcontroller firmware, wafer level monitoring logic, system administration services, and the Linux platform and BSP layers that keep the entire system running smoothly. You will help build administrative services that connect the WSE’s system software to cluster-level orchestration, collaborate closely with hardware and ASIC teams, and contribute to the robustness, visibility, and operability of our next-generation AI systems.
ML Systems Engineer ChipAgentsML Systems EngineerSan Jose, CaliforniaBuild robust evaluation harnesses and benchmarking frameworks that measure accuracy, throughput, latency, and resource utilization across various parallelism strategies. Strong systems-level debugging and profiling skills; comfort working at multiple layers of the stack from CUDA kernels to application logic.
Quality - Engineer Amphenol Thermometrics IncQuality - EngineerFremont, CAAs a global leader in MEMS (Microelectromechanical Systems) technology, we design and manufacture advanced pressure sensors that power critical applications across the medical, industrial, and transportation markets-whether it is enabling life-saving medical devices, enhancing vehicle safety and efficiency, or ensuring reliability in industrial systems. Lead root cause analysis and corrective and preventive actions (CAPA) for internal non-conformances, supplier issues, and customer complaints end-to-end using structured problem-solving methodologies (e.g., 8D, 5 Whys).
Senior Staff Verification Engineer - Pcie & Memory Subsystems MarvellSenior Staff Verification Engineer - Pcie & Memory SubsystemsSanta Clara, CAHighlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. Marvell Compute and Custom Solutions has been at the forefront of developing and delivering leading-edge data processing silicon platforms for AI, accelerated computing, cloud data center, and telecom customers.
Senior Electrical Engineer Fresh Consulting IncSenior Electrical EngineerSunnyvale, CA$75–$85 / hourWe bring together amazing UX designers, sophisticated developers, digital strategists, and top-notch engineers to help companies create fresh experiences that connect humans, systems, and machines. Fresh Consulting is a design-led, software development and hardware engineering company, offering end-to-end digital services to help companies innovate.
Reliability Design Engineer (Teradyne, San Jose, CA) Teradyne IncReliability Design Engineer (Teradyne, San Jose, CA)San Jose, CA$122,500–$196,000 / yearYou will help ensure products are ramp-ready by applying Teradyne's world-class Design for Reliability process, mitigating reliability risks early, driving rapid defect root-cause analysis and corrective action to accelerate product maturity, quality, and product reliability. The successful candidate will have minimum BSEE in Reliability Engineering, Mechanical Engineering, Electrical Engineering, or Industrial Engineering with 5 years or more reliability engineering experience in the design and manufacturing of electrical assemblies and systems engineering.
Robotics Powertrain Thermal Design Engineer, Thermal Engineering, Optimus Tesla IncRobotics Powertrain Thermal Design Engineer, Thermal Engineering, OptimusPalo Alto, CA$108,000–$264,000 / yearYou will work at the intersection of mechanical, electrical, and controls engineering, ensuring that actuators operate reliably across all mission profiles and duty cycles in a highly constrained form factor. Experience with thermal management of power electronics - PCB-level heat spreading, TIM selection, heatsink and housing interface design, junction temperature estimation.
Laser Engineer Lawrence Livermore National LaboratoryLaser EngineerLivermore, CA$175,530–$222,564 / yearPerform complex hands-on work activities on electro-optical components using techniques and methods to ensure optimal performance, which will include alignment, evaluation, calibration (offline and online), troubleshooting complex technical issues, data analysis (using computer-based data acquisition and controls), data archiving, and system documentation. In this critical role, you will be responsible for running and maintaining the advanced laser systems and support hardware for the world's largest laser with 192 beams, ensuring that all laser work is seamlessly planned, coordinated, and executed to support experiments in High Energy Density Physics, Laser Fusion and Ignition, and National Security.
Senior Test Engineer Penguin Solutions IncSenior Test EngineerNewark, CA$99,000–$134,000 / yearPenguin Solutions brings together differentiated infrastructure software, advanced memory, compute systems, end-to-end services, and industry-leading partner solutions in a full-stack AI factory platform designed to help customers deploy and scale AI workloads with speed and precision. The base pay range that the Company reasonably expects to pay for this position in California is $99,000 - $134,000; the pay ultimately offered may vary based on business considerations, including job-related knowledge, skills, experience, and education.
SoC Logic Design Engineer Intel CorpSoC Logic Design EngineerSanta Clara, CA$141,910–$200,340 / yearBachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field with 4+ years of hands-on experience in logic design, RTL development, and microarchitecture implementation, or Master's degree with 3+ years of experience in the same fields. This position resides within Intel's leading-edge silicon engineering group, which is dedicated to designing, developing, and scaling advanced semiconductor solutions for a wide range of applications.
Senior Embedded Software Application Engineer Alif Semiconductor, Inc.Senior Embedded Software Application EngineerPleasanton, CAWe are looking for self-driven and motivated Senior Application Engineer in Pleasanton, CA to help us promote and support the groundbreaking family of Ensemble Micro Controllers that has received a lot of industry attention. This policy applies to all terms and conditions of employment, including recruiting, hiring, placement, promotion, termination, layoff, recall, transfer, leaves of absence, compensation, and training.
Senior IC Packaging Engineer Axiado CorpSenior IC Packaging EngineerSan Jose, CAAxiado has also won numerous industry awards for our ground-breaking products and technological innovations, including being named one of Fast Companys 2025 Top 10 Most Innovative Companies in Security, winning the 2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Alliances 2025 Start-Up to Watch award. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that combines advanced hardware security, AI driven resilience and efficiency, and real-time platform management.
Staff Engineer, Optics and RF Cowboy SpaceStaff Engineer, Optics and RFSan Carlos, CaliforniaOur satellites operate in Low Earth Orbit to collect sunlight and enable a new class of capabilities—from powering on-orbit compute, to transmitting energy via infrared lasers (space-to-earth and space-to-space), powering on-orbit compute to delivering secure, high-bandwidth optical data. This role is heavily focused on board-level RF design and integration, working closely with electrical, PCB layout, firmware, and test engineers to deliver high-performance RF subsystems capable of operating reliably in the space environment.