Sr Packaging Engineer, Distribution Packaging Applied MaterialsSr Packaging Engineer, Distribution PackagingSanta Clara, CA$133,500–$183,500 / yearIf you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor. The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members.
Sr Packaging Engineer Applied Materials IncSr Packaging EngineerSanta Clara, CA$133,500–$183,500 / yearIf you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor. The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members.
Senior IC Packaging Development Engineer NVIDIA CorpSenior IC Packaging Development EngineerSanta Clara, CAWith competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers; we have some of the most forward-thinking and hardworking people in the world working for us and, due to unparalleled growth, best-in-class teams are rapidly growing. This will include planning & driving related R&D with multiple internal and external partners and you will be responsible for establishing advanced packaging processes needed to meet our NPI goals regarding packaging turn-around-time, reliability, and chip-package interaction.
Senior Fiber Optic Module Packaging Engineer II-VI Optical Systems, Inc.Senior Fiber Optic Module Packaging EngineerSunnyvale, CAWe are a vertically integrated manufacturing company that develops innovative products for diversified applications in the industrial, optical communications, military, life sciences, semiconductor equipment, and consumer markets. Coherent provides a comprehensive career development platform within an environment that challenges employees to perform at their best, while rewarding excellence and hard-work through a competitive compensation program.
NewSr. Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging Amazon.com IncSr. Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon PackagingCupertino, CAWe pioneered cloud computing and never stopped innovating - that's why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Signal & Power Integrity Engineer to join our hardware team and drive the SI/PI analysis and optimization of advanced packaging solutions for next-generation machine learning and data center ASICs.
Advanced Packaging Integration Engineer Applied MaterialsAdvanced Packaging Integration EngineerSanta Clara, CA$161,000–$221,000 / yearJoin the Photonics Platform Business Group at Applied Materials located in Santa Clara headquarters, work with a high caliber cross-functional research team to develop advanced packaging solutions for next-generation smart glasses and high‑performance optical interconnects. In‑depth knowledge and hands‑on experience in advanced packaging technologies, including wafer‑to‑wafer or die‑to‑wafer hybrid bonding, semiconductor processing, 2.5D/3D integration, TSV, RDL, underfill, bumping, molding, and OSAT processes.
Build and OS Packaging Technical Lead, Production Engineering Everpure, IncBuild and OS Packaging Technical Lead, Production EngineeringSanta Clara, CAIn this role, you will drive technical direction, raise engineering execution, and work closely with product, infrastructure, and release teams to improve build performance, reliability, and developer productivity. We have been named Fortune''s Best Workplaces in Technology, Fortune''s Best Workplaces in the Bay Area, and certified as a Great Place to Work!
Senior Security IP Engineer Microsoft CorpSenior Security IP EngineerMountain View, CA$119,800–$234,700 / yearRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. To achieve this goal, the SCIPS (Shared and Custom IP & Silicon) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.
Signal Integrity & Power Integrity Principal Engineer Altera SemiconductorSignal Integrity & Power Integrity Principal EngineerSan Jose, California$187,000–$270,000 / yearWe are seeking a highly experienced Signal Integrity & Power Integrity (SI/PI) Engineer with 15+ years of industry experience to lead the design, verification, and optimization of high‑speed interconnects across silicon, IC package, and board‑level architectures. With more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge.
Staff Manufacturing Engineer - Shockwave Johnson & JohnsonStaff Manufacturing Engineer - ShockwaveSanta Clara, CaliforniaPerforms productivity and costing analyses (e.g., calculate direct labor, time studies& materials costs for new and existing products), providing solutions that improve efficiency and scalability for years to come. The Staff Manufacturing Engineer is responsible for designing, developing, testing, documenting, and implementing processes, tooling, and fixtures for throughout the product lifecycle, from design to production.
Package Development/NPI Engineer MediaTek IncPackage Development/NPI EngineerSan Jose, CAThe position encompasses close collaboration with internal cross-functional teams, external partners, Foundries, OSATs, substrate vendors and customers- to deliver cutting-edge packaging solutions for automotive, datacenter/HPC, and computing applications. Collaborate with internal cross-functional partners, including, Technology, Design, Test, Quality, GSM and Manufacturing Operation, to define product requirements and execute MP readiness plans.
Signal Integrity & Interconnect Engineer - High‑Speed Channels & mmWave Packaging POINT2 TECHNOLOGY INCSignal Integrity & Interconnect Engineer - High‑Speed Channels & mmWave PackagingSan Jose, CADesign and optimize the high‑speed interconnect "highways" that enable Point2's next‑generation ultra‑high‑speed data‑center links. Work across die, package, PCB, and complex mechanical connectors to ensure flawless signal transmission at mmWave and sub‑THz frequencies.
Intern, Optical Packaging And Characterization Engineer PsiQuantumIntern, Optical Packaging And Characterization EngineerMilpitas, CAOur application, software, and industry teams work directly with leading Fortune 500 companies-including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical-to prepare quantum solutions for real-world impact. Support image processing workflows (e.g., contrast, alignment, feature extraction) using Python or similar tools and help turn results into clear tables or simple plots.
Staff Electro-Mechanical Engineer - Battery Packaging E-SpaceStaff Electro-Mechanical Engineer - Battery PackagingSaratoga, CA$120,000–$200,000 / yearWe’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life. Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet.
Distinguished Technologist Mechanical Engineer (Network Infrastructure) Hewlett Packard EnterpriseDistinguished Technologist Mechanical Engineer (Network Infrastructure)Sunnyvale, CA$163,000–$347,500 / yearThe ideal candidate is a highly experienced, hands-on engineer who combines strong technical leadership with a willingness to engage directly in product development activities, including system design, laboratory debugging, prototype evaluation, root-cause analysis, and customer issue resolution. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.
Principal/ Staff Engineer, Advanced Packaging Process Integration Applied Materials IncPrincipal/ Staff Engineer, Advanced Packaging Process IntegrationSanta Clara, CAThe SMTS will operate at the intersection of technology innovation, customer roadmaps, and ecosystem collaboration, translating emerging concepts into scalable, differentiated capabilities aligned with Applied Materials' long-term strategy. You will experiment, learn, and collaborate with some of the brightest minds in the semiconductor and display industries, partnering with our globally recognized R&D teams on state-of-the-art research and development projects.
Sr. Principal Engineer, SoC Architect Ayar LabsSr. Principal Engineer, SoC ArchitectSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Cross-Functional Collaboration Work closely with: Design and verification teams on implementation feasibility, Firmware/software teams on boot, drivers, and runtime optimization, Validation teams on bring-up and debug strategies and Product and business teams on roadmap alignment.
Sr. Staff Engineer, Quality Ayar LabsSr. Staff Engineer, QualitySan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Design and Supplier Quality Management Define necessary procedures to ensure all design and Supplier Supplier Governance: Ensure all external partners (Foundries, OSATs, CMs) are onboarded and managed according to QMS requirements.
Principle Validation And Hardware Design Engineer MarvellPrinciple Validation And Hardware Design EngineerSanta Clara, CAMarvell, a high-speed analog/mixed-signal semiconductor company, is the market leader in high-speed and optical interconnects for communication infrastructure in long-haul, metro and datacenter. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
Principle Validation and Hardware Design Engineer Marvell Technology IncPrinciple Validation and Hardware Design EngineerSanta Clara, CAMarvell, a high-speed analog/mixed-signal semiconductor company, is the market leader in high-speed and optical interconnects for communication infrastructure in long-haul, metro and datacenter. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
Global Product Support (Gps) Engineer - Advanced Packaging Applied MaterialsGlobal Product Support (Gps) Engineer - Advanced PackagingSanta Clara, CA$124,000–$171,000 / yearIf you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor. The successful candidate will serve as the primary equipment support engineer responsible for bringing the system from installation through process readiness while coordinating closely with Facilities, BESI, Applied Materials product engineering teams, and CTO process development teams.
Global Product Support (GPS) Engineer - Advanced Packaging Applied Materials IncGlobal Product Support (GPS) Engineer - Advanced PackagingSanta Clara, CA$124,000–$171,000 / yearIf you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor. The successful candidate will serve as the primary equipment support engineer responsible for bringing the system from installation through process readiness while coordinating closely with Facilities, BESI, Applied Materials product engineering teams, and CTO process development teams.
NewPackaging Compliance Analyst Ursus, Inc.Packaging Compliance AnalystFoster City, CA$47–$57.93 / hourAssist in documenting the success or failure of trial packaging, capturing its condition upon reception at the warehouse, and its feasibility for use at the production line with Packaging Engineers, MFEs, MFG, Logistics, suppliers, SSMs, and SQEs. Become fully acquainted with all information systems regarding inventory management and logistics to support reporting, including but not limited to: PFEP, Shipping Label Tracker, Packaging Compliance Tracker, and Logistics KPIs.
Senior Manufacturing and Supplier Quality Engineer Altera SemiconductorSenior Manufacturing and Supplier Quality EngineerSan Jose, CaliforniaWith more than four decades of industry‑leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. Supports San Jose (SJ) production test operations by providing quality assurance oversight for production test stand-up activities, test process readiness, and ongoing production test quality maintenance to ensure manufacturing excellence.
NVH Attribute Engineer Ursus, Inc.NVH Attribute EngineerFoster City, CA$68–$78.37 / hourRepresent NVH in packaging meetings and design gates to execute the NVH content strategy in CAD, and provide an NVH input for packaging studies. NVH development experience in thermal systems, acoustics, wind noise / aeroacoustics, with an excellent understanding of acoustics and vibration principles.
Staff Engineer, Process Systems Vaxcyte IncStaff Engineer, Process SystemsSan Carlos, CA$157,000–$183,000 / yearRequirements: Bachelor's or Master's degree in Engineering (Chemical, Mechanical, Biomedical, or related field) or Biotechnology with a minimum of 10+ years of experience in Bioprocessing/Process Engineering within the biotechnology, pharmaceutical, or biopharmaceutical industry. Vaxcyte is a clinical-stage vaccine innovation company engineering high-fidelity vaccines to protect humankind from the consequences of bacterial diseases, which have serious and costly health consequences when left unchecked.
Advanced Packaging Reliability Engineer OpenAI LLCAdvanced Packaging Reliability EngineerSan Francisco, CAFor unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In-depth knowledge of advanced packaging architectures, including 2.5D and 3.5D integration, interposers, embedded bridges, chiplets, large package substrates, HBM integration, redistribution layers, and package-level power delivery.
Senior Signal Integrity Engineer - LPU Packaging NVIDIA CorpSenior Signal Integrity Engineer - LPU PackagingSanta Clara, CADevelop and execute simulation flows for advanced packaging technologies, including 2.5D, 3D, and multi-die integration, with strong focus on channel loss, discontinuities, return path behavior, and crosstalk. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast.
Senior Physical Design Engineer/Lead Altera SemiconductorSenior Physical Design Engineer/LeadSan Jose, CaliforniaBachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline with 10+ years of industry experience in physical design, physical implementation, or SoC backend design, including the following: 10+ years of hands-on experience in digital ASIC and/or SoC physical design, including synthesis, floorplanning, place-and-route, clock tree synthesis (CTS), routing, engineering change order (ECO) implementation, and signoff. You will interface with architecture, logic design, DFT, CAD/EDA, and manufacturing teams to achieve our performance/power/area (PPA) goals, with particular emphasis on programmable logic structures, block and full-chip integration, and the unique demands of FPGA technologies (e.g., configurable logic blocks, routing fabrics, I/O rings, on-chip power domains).
Sr. Staff Thermal Engineer Lightmatter IncSr. Staff Thermal EngineerMountain View, CA$166,000–$262,000 / yearExperience in designing, modeling, testing, sourcing, and deploying advanced thermal management technologies such as TECs, heat pipes, vapor chambers, thermal interface materials, phase change materials, as well as liquid and air cooling systems. Your work will contribute to advanced package and system designs that meet power dissipation, assembly, and reliability requirements while delivering system-level solutions for leading-edge products in data centers and high-end compute segments.
Package Design Engineer - Staff Qualcomm IncPackage Design Engineer - StaffSanta Clara, CA$154,000–$252,800 / yearGeneral Summary: Qualcomm Data Center team is developing High performance, Energy efficient server solution for data center applications. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Senior Power Integrity Engineer - LPU Packaging NVIDIA CorpSenior Power Integrity Engineer - LPU PackagingSanta Clara, CA$196,000–$310,500 / yearWe have some of the most forward-thinking and hardworking people in the world working with us and our product lines are growing fast in some of the hottest state-of-the-art fields such as Artificial Intelligence, Deep Learning, Autonomous Vehicles, and Robotics. A deep understanding of board-level PDN design, including stack-up definition, plane partitioning, and VRM placement on high-layer-count accelerator boards.
NewSenior Engineer RTL Power Macro Modeling Samsung SemiconductorSenior Engineer RTL Power Macro ModelingSan Jose, CA$138,000–$206,000 / yearThe role builds these models from S-parameter models of the interconnect, calibrates them against circuit-level references, and makes them fast enough to run over long workload traces. Proven self-discipline and professional maturity to execute independent research and meet rigorous milestones with a strong sense of accountability for both personal and collective goals in a fast-paced, on-site environment.
Sr. Staff Engineer, Hardware Module Integration (Lasers) Ayar LabsSr. Staff Engineer, Hardware Module Integration (Lasers)San Jose, CaliforniaCollaborate with mechanical, system (rack/chassis) electrical, manufacturing and test teams to ensure successful product integration, both on-site and offsites in Asia. The ideal candidate is comfortable working across the full product lifecycle, including prototyping, testing, debugging, and cross-functional collaboration.
Advanced Package Engineer, Principal Astera LabsAdvanced Package Engineer, PrincipalSan Jose, CA$205,000–$255,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Advanced Package Engineer, Principal Astera Labs IncAdvanced Package Engineer, PrincipalSan Jose, CA$205,000–$255,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Senior, Packaging Design Engineer Intuitive Surgical IncSenior, Packaging Design EngineerSunnyvale, CAThis individual will use sound engineering judgement and independently drive new product development (NPD) and sustaining engineering efforts through cross functional collaboration, ensuring designs meet stringent clinical, functional, global regulatory (FDA, ISO 11607, EU), and quality requirements. The Medical Device Packaging Design Engineer is a critical engineering role responsible for the design, development, verification, and launch of next-generation mechanical packaging systems for sterile and non-sterile medical devices such as surgical instruments, disposables, and electromechanical capital equipment.
Process Engineer, Advanced Packaging Applied Materials IncProcess Engineer, Advanced PackagingSanta Clara, CA$124,000–$171,000 / yearIf you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor. The salary offered to a selected candidate will be based on multiple factors including location, hire grade, job-related knowledge, skills, experience, and with consideration of internal equity of our current team members.
Staff PCB Layout Design Engineer General MotorsStaff PCB Layout Design EngineerMountain View, CA$217,630–$245,000 / yearTen (10) years of experience as a Program Manager, Project Manager, Solution Architect, or related occupation Requires ten (10) years of experience with the following: Creating digital and analog HW PCB layout including HDI and high-power. Collaborate with test engineers to ensure that PCBA design is testable (Design for Test) and supports efficient testing processes.
Process Engineer - Advanced Packaging Applied Materials IncProcess Engineer - Advanced PackagingSanta Clara, CA$147,000–$202,500 / yearRole Responsibilities: Design, collect data, analyze, and compile results for complex process engineering experiments across multiple process modules; apply findings to establish process baseline, monitor performance and stability. If you would like to contact us regarding accessibility of our website or need assistance completing the application process, please contact us via e-mail at Accommodations_Program@amat.com, or by calling our HR Direct Help Line at 877-612-7547, option 1, and following the prompts to speak to an HR Advisor.
Senior Software Engineer — WPT Home (Full-Stack) Bellota LabsSenior Software Engineer — WPT Home (Full-Stack)Redwood City, California$225,000–$275,000 / yearOur newest product, WPTHome , is redefining how players engage with the World Poker Tour by creating a connected, engaging platform that brings the excitement and community of poker beyond the table. Real-time table state, multi-tabling performance, client perf budgets across desktop (Electron) and mobile, provably-fair gameplay, and an event pipeline doing live hand analytics.
Senior/Principal Signal Integrity Engineer-Silicon Photonics & AI Interconnects LumilensSenior/Principal Signal Integrity Engineer-Silicon Photonics & AI InterconnectsSan Jose, CaliforniaOur solutions—leveraging co-packaged optics (CPO), near-packaged optics (NPO), high-density silicon photonics, and advanced heterogeneous integration—enable massive scale-out and scale-up architectures for the world's leading AI providers. Deep expertise in very high-speed SerDes (56G, preferably 100G/200G PAM4), including channel modeling, equalization (FFE/DFE/CTLE), jitter/crosstalk analysis, eye diagrams, BER, and compliance/margining.
Optical-Electronic Packaging Engineer Lumentum Inc.Optical-Electronic Packaging EngineerSan Jose, CAWith our continual goal of making Lumentum a best place to work for our employees, we strive to offer employees competitive total compensation packages, which may include annual bonus, commission for certain sales roles, equity, and health and welfare benefits. This role focuses on advanced mechanical and thermal packaging solutions for high-density, high-power optical modules, including pluggable form factors and emerging advanced packaging architectures.
Advanced Packaging Reliability Engineer OpenAIAdvanced Packaging Reliability EngineerSan Francisco, CaliforniaFor unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In-depth knowledge of advanced packaging architectures, including 2.5D and 3.5D integration, interposers, embedded bridges, chiplets, large package substrates, HBM integration, redistribution layers, and package-level power delivery.
NewCloud Hardware Development, Packaging, Network Product Development - Optics Amazon.com IncCloud Hardware Development, Packaging, Network Product Development - OpticsCupertino, CAYou will perform high-quality design, development, validation, and sustaining engineering of IC and SOC packages for high-speed applications, working closely with design teams, manufacturing partners, and cross-functional stakeholders to deliver robust solutions at scale. Within AWS Networking the NPD (Network Product Development) organization is responsible for, designing the hardware, building the software, and owning the interconnects for the routers that power the global AWS network.
Director of Advanced IC Packaging Development Renesas Electronics CorpDirector of Advanced IC Packaging DevelopmentSan Jose, CAWith a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. This role is pivotal in enabling the AI and Datacenter revolution by developing cutting-edge Smart Power Stages, Vertical Power Stages, Power Modules and Wide Bandgap (SiC/GaN) solutions.
Executive Director of R&D Engineering for 3DIC-Advance Packaging Synopsys IncExecutive Director of R&D Engineering for 3DIC-Advance PackagingSunnyvale, CALead the global engineering organization responsible for 3DIC silicon IP and advanced packaging design, covering layout, physical design, signal integrity, power integrity, thermal modeling, and mechanical stress analysis for AI infrastructure and HPC products. Experience working effectively in highly matrixed, global organizations, influencing across EDA development, product management, go-to-market, manufacturing, and customer success teams without direct reporting authority.
Senior Member Of Technical Staff (Advanced Packaging Pathfinding) Applied MaterialsSenior Member Of Technical Staff (Advanced Packaging Pathfinding)Santa Clara, CAThe SMTS will operate at the intersection of technology innovation, customer roadmaps, and ecosystem collaboration, translating emerging concepts into scalable, differentiated capabilities aligned with Applied Materials' long-term strategy. You will experiment, learn, and collaborate with some of the brightest minds in the semiconductor and display industries, partnering with our globally recognized R&D teams on state-of-the-art research and development projects.
Senior System and Manufacturing CoDesign Architect - Power, Thermal and Packaging NVIDIA CorpSenior System and Manufacturing CoDesign Architect - Power, Thermal and PackagingSanta Clara, CAWhat you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. System-Manufacturing Co-Design: Drive improvements in product performance, performance-per-watt, and provisioning efficiency through system-manufacturing co-design, with the scope to follow the work wherever the highest-impact opportunities lead, whether that's power, thermal, or adjacent domains.
Senior System And Manufacturing Codesign Architect - Power, Thermal And Packaging NvidiaSenior System And Manufacturing Codesign Architect - Power, Thermal And PackagingSanta Clara, CAWhat you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. System-Manufacturing Co-Design: Drive improvements in product performance, performance-per-watt, and provisioning efficiency through system-manufacturing co-design, with the scope to follow the work wherever the highest-impact opportunities lead, whether that's power, thermal, or adjacent domains.