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Define and execute directed and constrained-random tests that expose corner cases in branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazard handling, load/store ordering, memory consistency, hardware prefetch behavior, and vector execution correctness. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer.

SiFive

Senior Design Verification Engineer – CPU Core Verification (Vector)

The role spans key core areas such as Frontend, Midcore, Load-Store Unit, Hardware Prefetch, and Vector Unit / vector microarchitectural interactions, and is aimed at an engineer who can independently own complex verification problems, define verification strategy early, identify microarchitectural risk, and raise verification quality across the broader CPU DV effort. Define effective verification approaches for challenging behaviors such as branch prediction, instruction fetch, issue and dispatch behavior, pipeline interactions, hazard handling, load/store ordering, memory consistency, exception and recovery behavior, hardware prefetch correctness, and vector execution correctness.

Staff Design Verification Engineer - CPU Core Verification (Vector)

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Define and execute directed and constrained-random tests that expose corner cases in branch prediction, instruction fetch, pipeline interactions, issue/dispatch behavior, hazard handling, load/store ordering, memory consistency, hardware prefetch behavior, and vector execution correctness. SiFive's unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer.

Senior Design Verification Engineer - CPU Core Verification (Vector)

Our flagship product, Bullfrog, is an autonomous precision weapon system that transforms existing weapons into highly accurate counter-drone systems - giving warfighters a scalable, cost-effective response to one of the fastest-growing threats on the modern battlefield. Founded by two former U.S. Navy electrical engineers with deep experience in robotics and software, ACS brings together AI, computer vision, precision motion, and advanced hardware to solve complex defense challenges across land, air, and maritime environments.

Allen Control Systems Inc

Software Engineer - All Levels

Founded by two former U.S. Navy electrical engineers with deep experience in robotics and software, ACS brings together AI, computer vision, precision motion, and advanced hardware to solve complex defense challenges across land, air, and maritime environments. What You'll Do: Own and maintain production network environments, spanning both on-premises infrastructure (routing, switching, firewalls, WAN/LAN, wireless) and cloud networking in AWS (VPC, subnets, security groups, VPN/Direct Connect, Transit Gateway).

Network Engineer

Senior Dynamics & Structural Analysis Engineer

Additional Locations: Business group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences. Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for CPU interfaces and to meet desired product specifications.

YEAR

Intel Corp

CPU Validation Engineer

Lead development of space architecture concepts, sub-system design, payload design, ground station design, requirements development, analysis and decomposition, hardware system design, Link budget studies, gain line up, cascade analysis, array simulation studies, concept of operations (CONOPS) development, and risk reduction. Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

CesiumAstro

Principal Communication Engineer II

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. As a CesiumAstro software team member, you will be responsible for software designs from concept through production, including product roadmaps, block diagrams, detailed design and coding, analysis, test, qualification, and in-orbit support.

Senior Embedded Software Engineer

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. As a CesiumAstro hardware team member, you will be responsible for RF hardware designs from initial concept through requirements definition, part selection, detailed design, analysis, manufacturing, testing, qualification, and in-orbit support of Cesium's products.

Staff RF Engineer

Required Skills and Experience: In addition to bringing your accomplishment of either Bachelors or Master's degree in Computer Science or Electrical/Computer Engineering (or similar field) over 5+ years of experience working in design or verification of sophisticated compute subsystems or SoCs, you will need: Solid understanding of digital hardware design and Verilog HDL. This is a wonderful and unique initiative, where we are bringing in innovative talent and expertise from across the semiconductor industry to drive how the next generation of leading compute on Arm devices are built across the industry, opening up significant potential for the future.

ARM Ltd

Senior SoC Verification Engineer

Strong preference for candidates with experience from semiconductor foundries, advanced packaging organizations (OSATs), integrated device manufacturers (IDMs), or EDA vendors, where they have contributed to physical verification, density-fill methodology development, process design kits (PDKs), or manufacturing-driven design solutions. 5+ years of hands-on experience developing, deploying, or supporting density fill methodologies for semiconductor technologies at 16nm and below, including ownership of fill rule implementation, density compliance, or manufacturability optimization.

Senior Density Fill Development Engineer

As a SoC Power Thermal Performance Validation and Optimization Engineer, you will play an essential role in ensuring Intel's products achieve optimal power, thermal, and performance benchmarks at the system-on-chip (SoC) level. In this position, you will develop and execute validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges.

Pre-si Power and Performance System Validation Engineer

Key projects will include developing and managing software for interfacing with flight hardware and test equipment in an abstract and flexible manner that can be quickly implemented into a variety of test campaigns, developing methods to store and access generated data, and equipping the test team with other software tools necessary to efficiently accomplish ambitious testing goals. Additionally, designing test solutions for flight hardware optimizing for reliability and efficiency, and developing modular, reusable test and automation software in Python (or similar languages) implemented in a variety of test applications to verify design and build quality.

Senior Test Engineer

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. You will drive root cause analysis, lead design-to-production transitions, and collaborate closely with cross-functional teams to resolve complex technical issues and continuously improve processes.

Staff Product Test Engineer

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. Level II Test Engineers play a broad role that ranges from authoring test plans and procedures to designing test PCBs, along with spending plenty of time in the lab assembling and testing cutting-edge phased array systems and components.

Electronics Test Engineer II

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces.

Senior Staff Fpga Engineer

Intel Corp.

Senior Development Engineer - Density Fill

Senior Fpga Engineer

Collaborate with Design, Software, Tools and other teams to drive the definition of testing and debug methodologies to provide the best possible coverage and customer experience for the AMD internal address and data hub subsystem. As an IP Systems Engineer, you will drive the planning, post-silicon execution, silicon bring-up and debug of processor and graphics based systems while working closely with internal teams to meet product development milestones.

Hardware Engineer Jobs in Bastrop, TX

Senior Design Verification Engineer – CPU Core Verification (Vector) SiFive

Staff Design Verification Engineer - CPU Core Verification (Vector) SiFive

Senior Design Verification Engineer - CPU Core Verification (Vector) SiFive

Software Engineer - All Levels Allen Control Systems Inc

Network Engineer Allen Control Systems Inc

Senior Dynamics & Structural Analysis Engineer Allen Control Systems Inc

CPU Validation Engineer Intel Corp

Principal Communication Engineer II CesiumAstro

Senior Embedded Software Engineer CesiumAstro

Staff RF Engineer CesiumAstro

Senior SoC Verification Engineer ARM Ltd

Senior Density Fill Development Engineer Intel Corp

Pre-si Power and Performance System Validation Engineer Intel Corp

Senior Test Engineer CesiumAstro

Staff Product Test Engineer CesiumAstro

Electronics Test Engineer II CesiumAstro

Senior Staff Fpga Engineer CesiumAstro

Senior Development Engineer - Density Fill Intel Corp.

Senior Fpga Engineer CesiumAstro

Validation Engineer 1 ObjectWin Technology

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