Senior ASIC Design Verification Engineer - Terawave Blue Origin Enterprises LPSenior ASIC Design Verification Engineer - TerawaveSan Francisco, CA$230,398–$322,556.85 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing (CDL drivers only), vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs.
Physical Design Engineer Broadcom IncPhysical Design EngineerSan Jose, CABachelor's degree in Electrical Engineering or Computer Science and 12+ years related work experience; or a Master's degree in Electrical Engineering or Computer Science and 10+ years related work experience. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
Senior Thermal Solutions Design Engineer NVIDIA CorpSenior Thermal Solutions Design EngineerSanta Clara, CAApply AI-enabled approaches and AI tools to accelerate design iteration, test planning, and characterization/validation triage (e.g., requirements/spec summarization, experiment prioritization, log/telemetry summarization, anomaly/outlier detection), improving cycle time, coverage, and traceability while validating outputs against physics, specs, and lab measurements. Experience applying modern data analytics/ML concepts to characterization data (trend analysis, outlier detection, regression/surrogate modeling, or experiment design/optimization) to reduce debug time and improve coverage.
ASIC Design Verification Engineer Palo Alto Networks IncASIC Design Verification EngineerSanta Clara, CA$106,400–$172,150 / yearYour Experience BS in EE, CE, or CS required or equivalent military experience required - MSEE preferred Minimum 3 years experience in ASIC design verification Demonstrated success in taking multiple ASIC products from concept to mass production Expertise in SystemVerilog and UVM Technical strength in the following areas is requiredDefining test plans, including comprehensive adversarial testing Developing rich functional coverage models Creating powerful and scalable test benches Implementing sophisticated self-checking infrastructure with reference models and scoreboards Developing reusable constrained-random tests Debugging failures Closing coverage Experience in the following areas is preferredNetworking and cyber security Formal property verification Silicon validation - bringup, test, debug, and regression Creating models in Python and C/C++ Writing driver code in C Skilled in writing powerful, modular, and scalable programs in Python, Perl, and UNIX shell to automate verification tasks, especially regression testing Demonstrated ownership and independence in planning, debugging complex failures, closing metrics-driven tasks, driving vendors, and reporting status Strong leadership, collaboration, and communication skills. Your Impact Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, emulation, and formal verification Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies Develop flows, methodologies, and infrastructure for emulation - Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers Define new tools and methodologies to continuously improve quality and velocity Create powerful programs in Python to automate triage, coverage closure, and metrics-driven verification.
Senior Datacenter Power Design And Modeling Engineer NvidiaSenior Datacenter Power Design And Modeling EngineerSanta Clara, CAThis role owns rack-level architecture definition and involvement, end to end power modeling and simulation for advanced Datacenter power and energy scheme, and power shelves, busbars, cable vendor management. You ensure the successful delivery of power-related engineering programs by modeling and simulation efforts, coordinating across power architects, power validation, firmware, mechanical teams, and suppliers management.
Asic Physical Design And Timing Engineer - New College Grad 2026 NvidiaAsic Physical Design And Timing Engineer - New College Grad 2026Santa Clara, CAHelp in driving frontend and backend implementation including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation. What you'll be doing: Drive Physical Design and timing analysis and closure of NVIDIA's GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level.
IC Design Engineer Broadcom CorporationIC Design EngineerSan Jose, CAAs a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
Asic Design Engineer NvidiaAsic Design EngineerSanta Clara, CAWhat you'll be doing: Drafting microarchitecture documents and implementing high-performance, and area and power-efficient RTL to meet strictly defined development targets and specifications. Collaborating closely with architects, other designers, and pre and post silicon verification teams to deliver world-class RTL builds.
Director, Product Management - Custom & Analog Design Solutions Cadence Design Systems IncDirector, Product Management - Custom & Analog Design SolutionsSan Jose, CA$178,500–$331,500 / yearDeep, hands-on understanding of analog and mixed-signal circuit design - circuit topologies, device-level design, sizing and biasing, layout and parasitics, PVT and corner behavior, and verification methodology - and a first-hand grasp of the real challenges analog teams face (long design cycles, designer ramp-up, layout closure, cross-node migration). Build deep, credible relationships with senior analog and custom circuit designers and their leadership; understand their design challenges first-hand, and earn the technical trust needed to shift entrenched methodologies and drive adoption of Cadence solutions.
High Speed IO Analog Mixed Signal Design Engineer Advanced Micro Devices, IncHigh Speed IO Analog Mixed Signal Design EngineerSan Jose, CaliforniaBe part of AMD’s analog/mixed signal IP design team responsible for the design and development of next generation IOs, high speed memory (LPDDRx, gDDRx, HBMx) and die-to-die Gbps proprietary PHY IP solutions. Hand-on design experience in multi-Gbps serial (PCIE, USB, …), parallel high BW memory interface PHY/IOs (DDR4/DDR5, HBM2/HBM3, gDDR5/gDDR6, …) and chip-to-chip links PHY IPs.
Staff High Voltage Electrical Engineer, EPC Redwood Materials IncStaff High Voltage Electrical Engineer, EPCSan Francisco, CA$190,000–$252,500 / yearResponsibilities will include: Lead the design of high voltage AC electrical systems, specifically for industrial substations (69kV to 345kV) and their integration with upstream transmission lines and downstream MV distribution. Redwood is localizing a global battery supply chain that seamlessly integrates recovery, reuse, and recycling - keeping critical minerals in circulation and driving the energy transition.
Timing Design Engineer Apple IncTiming Design EngineerCupertino, CAYou will closely interact with RTL designer to understand design intent and clock structure, with CAD to understand and develop flow, and with Physical design team to close and sign-off timing. Key responsibilities include timing sign-off, STA and sign-off flow development, ownership of IP and block level timing constraints both for regular and custom timing requirements from synthesis to sign-off to achieve sign-off quality timing constraints.
Design Verification Engineer, Staff Astera Labs IncDesign Verification Engineer, StaffSan Jose, CA$160,000–$195,000 / yearUsing your expertise in SystemVerilog, UVM, and problem-solving skills, youll contribute to the functional verification of cutting-edge designs supporting PCIe Gen 6/7, CXL, UALink, UCI, Ethernet, and DDR4/DDR5 protocols. Youll be responsible for the full verification lifecycle-from planning to test development to debugging and coverage closure-while collaborating with RTL designers and system validation teams.
NewPrincipal Design Verification Engineer- SerDes/PHY Astera Labs IncPrincipal Design Verification Engineer- SerDes/PHYSan Jose, CA$207,000–$230,000 / yearYou''ll partner directly with PHY analog/mixed-signal designers, digital architects, and SoC integration teams to verify multi-Gbps SerDes blocks that ship into the world''s most advanced AI platforms, including UALink, UCIe, PCIe Gen 6/Gen 7, and Ethernet-based connectivity products. Astera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity.
NewPrincipal Design Verification Engineer- Serdes/Phy Astera LabsPrincipal Design Verification Engineer- Serdes/PhySan Jose, CA$207,000–$230,000 / yearYou'll partner directly with PHY analog/mixed-signal designers, digital architects, and SoC integration teams to verify multi-Gbps SerDes blocks that ship into the world's most advanced AI platforms, including UALink, UCIe, PCIe Gen 6/Gen 7, and Ethernet-based connectivity products. Astera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity.
Sr. Software Development Engineer (Applied ML)-Hardware Product Design Apple IncSr. Software Development Engineer (Applied ML)-Hardware Product DesignSunnyvale, CAYou'll join the Data Science and Visualization (DataViz) team in Hardware Engineering at Apple, working day-to-day in close partnership with Apple's Advanced Development Lab (ADL) to bring machine learning into the heart of their machining and prototyping workflows. Hands-on experience designing or extending agentic AI systems (multi-step, tool-using workflows where models plan, act, and recover) and the evaluation frameworks that keep them reliable - including ground truth that is contested, expensive, or partial, and small labeled datasets.
Technical Lead Design Verification Engineer Astera LabsTechnical Lead Design Verification EngineerSan Jose, CAAstera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Technical Lead Design Verification Engineer Astera Labs IncTechnical Lead Design Verification EngineerSan Jose, CAAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Principal Design Verification Engineer Astera Labs IncPrincipal Design Verification EngineerSan Jose, CA$185,000–$230,000 / yearAstera Labs' Intelligent Connectivity Platform integrates CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Substation Protection And Control Engineer, EPC Redwood MaterialsSubstation Protection And Control Engineer, EPCSan Francisco, CA$190,000–$252,500 / yearResponsibilities will include: Lead the design of high voltage AC electrical systems, specifically for industrial substations (69kV to 345kV) and their integration with upstream transmission lines and downstream MV distribution. Redwood is localizing a global battery supply chain that seamlessly integrates recovery, reuse, and recycling - keeping critical minerals in circulation and driving the energy transition.
Senior RF Systems Engineer Applied MaterialsSenior RF Systems EngineerSanta Clara, CA$161,000–$221,000 / yearThe engineer will work cross-functionally with Computer-Aided Engineering (CAE), Systems Engineering, Mechanical Engineering, Electrical Engineering, Product Support, Manufacturing, Suppliers, and Global Customers to define and execute RF technology roadmaps supporting both new product introductions and sustaining engineering initiatives. The ideal candidate is comfortable moving between detailed technical problem solving and strategic technology planning, thrives in a fast-paced NPI environment, and can influence cross-functional teams to deliver innovative RF solutions that provide meaningful customer value.
Engineer, SIG Electrical Design Micron Technology IncEngineer, SIG Electrical DesignSan Jose, CA$150,545–$191,000 / yearPosition requires: Developing, designing, and verifying electronics for use in semiconductor test equipment; Designing PCBs (Printed Circuit Boards) and electronic systems including oversight of board layout and artwork; Designing digital circuits and logic such as FPGAs (Field Programmable Gate Arrays), communication buses like PCIe Express, and memory interfaces like DDR (dual data rate DRAM memory); Conducting power supply subsystem design and analog circuit design; Performing signal and power integrity analysis and simulation using tools such as hyper lynx; Working with the manufacturing and NPI teams to ensure compliance with DFM (Design for Manufacturability and DFT (Design for Testability) requirements; Debugging and analyzing electronics using laboratory tools including oscilloscopes, digital multi-meters, power supplies, probes, logic analyzers and other lab measurement equipment; Designing, developing, and building SSD test equipment; Performing design of experiments and writing reports with specific knowledge around SSD test equipment based on PCIe protocols; and. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Principal RF Design Engineer 6 Kratos DefensePrincipal RF Design Engineer 6San Jose, CA$140,000–$200,000 / yearKratos Defense & Security Solutions, Inc. (NASDAQ:KTOS) develops and fields transformative, affordable technology, platforms, and systems for United States National Security related customers, allies, and commercial enterprises. Design RF & microwave amplifier assemblies, analog control circuits, power supplies and power conditioning circuitry, and some basic digital circuitry for command-&-control and fault sensing & reporting.
Wireless MAC Design Engineer Apple IncWireless MAC Design EngineerSunnyvale, CACome join Apple's wireless silicon development effort, with its emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically coordinated engineering team. Develop MAC layer design for wireless communication SoCs, including creating microarchitecture and other documents based on system-level requirements, and writing area- and power-efficient RTL that is scalable.
Robot Physics Modeling Engineer, Model Based Design, Optimus Tesla IncRobot Physics Modeling Engineer, Model Based Design, OptimusPalo Alto, CA$140,000–$300,000 / yearWelcome to Tesla's Optimus Robotics Team, the epicenter of innovation, where we're not just designing humanoid bi-pedal robots like the Tesla Bot; we're creating a revolution in automation for repetitive tasks and pioneering wheeled robots for manufacturing and autonomous logistics. Analysis skills including statics, multibody dynamics, vibration, kinematics, stress, fatigue and thermal analyses; proficency in multibody dynamics modeling and simulation of robotics systems preferred.
Control Systems Engineer Lawrence Livermore National LaboratoryControl Systems EngineerLivermore, CA$146,340–$222,564 / yearFunction independently with minimal direction, taking significant responsibility and using advanced knowledge and judgment to establish objectives, prioritize parallel tasks, allocate resources, and collaborate in the development of innovative methods/technology to guide the completion of projects and contribute to the development of organizational goals. Advanced verbal and written communication skills with the ability to effectively prepare, present, and explain technical information, provide advice to senior management and external stakeholders, and collaborate with technical staff, managers, stakeholders, and vendors at all organizational levels.
Product Engineer StratAcuity Staffing Partners IncProduct EngineerFremont, CA$90–$95 / hourIn terms of professional development, Everforth Apex hosts an on-demand training program, provides access to certification prep and a library of technical and leadership courses/books/seminars once you have 6+ months of tenure, and certification discounts and other perks to associations that include CompTIA and IIBA. Everforth Apex also offers a HSA (Health Savings Account on the HDHP plan), a SupportLinc Employee Assistance Program (EAP) with up to 8 free counseling sessions, a corporate discount savings program and other discounts.
RF Microwave Design Engineer DAS Technology GroupRF Microwave Design EngineerSan Francisco, CA$140,000–$180,000 / yearDesign a wide range of microwave components including but not limited to filters, amplifiers, voltage-controlled oscillators, mixers, detectors and associated subassemblies used on military, and high-reliability space programs. Design and usage of LNA, SSPA, filters, and mixer, frequency multipliers, isolators, couplers, and phase locked oscillator and synthesizers.
Senior Design and Integration Engineer, Cloud TPU Google LLCSenior Design and Integration Engineer, Cloud TPUSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Join the team designing and developing the On-Chip Network of Google"s next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in datacenters.
Mechanical Product Design Engineer, Platforms Google LLCMechanical Product Design Engineer, PlatformsSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Our Mechanical Product Design Engineering team members work cross-functionally to design, build, and deploy the latest technology to support the needs of compute, storage, networking, and machine learning hardware.
NewStaff Electrical Engineer, Balance of Plant Redwood Materials IncStaff Electrical Engineer, Balance of PlantSan Francisco, CAResponsibilities will include: Perform and review balance-of-plant power system studies including load flow, short-circuit, protection coordination, DC and AC arc flash, transformer energization, motor starting, reactive power analysis, transient overvoltage, harmonic analysis, insulation coordination, grounding design, battery sizing, and auxiliary system sizing. This role is responsible for executing critical power system studies, including load flow, short-circuit, protection coordination, and arc flash analysis, while sizing major electrical equipment like transformers, switchgear, and protective relays.
Reliability Engineer, Energy Storage Redwood Materials IncReliability Engineer, Energy StorageSan Francisco, CA$122,500–$192,500 / yearRedwood is localizing a global battery supply chain that seamlessly integrates recovery, reuse, and recycling - keeping critical minerals in circulation and driving the energy transition. Deep knowledge of electronic and mechanical failure mechanisms (e.g., solder fatigue, corrosion, delamination, sealing failures, thermal expansion mismatch, material fatigue, etc.).
Supplier Quality Engineer 2 Mattson Technology IncSupplier Quality Engineer 2Fremont, CAParticipates on cross functional teams during field excursions, drawing from expertise of others and his/her own to support failure analysis, establish root cause, implement corrective action, validate the effectiveness of the applied solutions and implementation and driving corrective actions across the manufacturing, design and supply chain. Collaborates cross functionally with the NPI team, develops product performance, reliability, durability test plans during development, Alpha and Beta phases and during the product life cycle ensure the product meets its intended design and specifications.
Systems Integration Engineer Base Power IncSystems Integration EngineerSan Carlos, CAWe are looking for a Systems Integration Engineer to help design and integrate the next generation of Base Power's residential battery storage, inverter, and microgrid interconnect device (MID) systems. BS/MS in Electrical Engineering (or related field) with 3+ years of hardware development experience, ideally in energy storage or power systems.
Digital - Principal Systems/DSP Engineer Eliyan CorporationDigital - Principal Systems/DSP EngineerCAAs the Principal Systems/DSP Engineer at Eliyan, you will define and drive the DSP architecture for next-generation 224G and 448G SerDes designs powering tomorrow's chiplet-based systems with best-in-class power, area, manufacturability, and design flexibility. • Architect and evaluate clock and data recovery (CDR) algorithms and loop dynamics, including jitter tolerance analysis, bang-bang and linear CDR trade-offs, and frequency acquisition strategies.
NewStaff Electrical Engineer, Balance Of Plant Redwood MaterialsStaff Electrical Engineer, Balance Of PlantSan Francisco, CAResponsibilities will include: Perform and review balance-of-plant power system studies including load flow, short-circuit, protection coordination, DC and AC arc flash, transformer energization, motor starting, reactive power analysis, transient overvoltage, harmonic analysis, insulation coordination, grounding design, battery sizing, and auxiliary system sizing. This role is responsible for executing critical power system studies, including load flow, short-circuit, protection coordination, and arc flash analysis, while sizing major electrical equipment like transformers, switchgear, and protective relays.
Vice President of Engineering - Optical Circuit Switch (OCS) II-VI Optical Systems, Inc.Vice President of Engineering - Optical Circuit Switch (OCS)Sunnyvale, CAWe are a vertically integrated manufacturing company that develops innovative products for diversified applications in the industrial, optical communications, military, life sciences, semiconductor equipment, and consumer markets. Coherent provides a comprehensive career development platform within an environment that challenges employees to perform at their best, while rewarding excellence and hard-work through a competitive compensation program.
Asic Verification Engineer Broadcom CorporationAsic Verification EngineerSan Jose, CAThe High Speed Interconnect Product (HSIP) line of business produces the industry's lowest power and highest performance (100Gbps to 400Gbps) highly integrated physical layer transceivers (PHYs) to meet the increasing demand in AI data center, enterprise network performance and server virtualization. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
NewSenior/Staff Power Electronics Engineer Heron Power Electronics CompanySenior/Staff Power Electronics EngineerScotts Valley, CA$120,000–$200,000 / yearProficient in schematic capture, simulation tools (SPICE, PLECS, LTspice, Simulink etc.), and familiar with lab instrumentation such as oscilloscopes, network analyzers, and power analyzers. Collaborate closely with systems, mechanical, layout, firmware, reliability, and manufacturing teams to bring designs from concept to production at scale.
ASIC Verification Engineer Broadcom IncASIC Verification EngineerSan Jose, CAThe High Speed Interconnect Product (HSIP) line of business produces the industry's lowest power and highest performance (100Gbps to 400Gbps) highly integrated physical layer transceivers (PHYs) to meet the increasing demand in AI data center, enterprise network performance and server virtualization. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.
System Design Engineer (Multiple Positions) POINT2 TECHNOLOGY INCSystem Design Engineer (Multiple Positions)San Francisco, CAStrong familiarity with the operating principles of RF blocks (Mixers, Amplifiers), Analog Front-Ends (CTLE, VGA), and Digital Equalization techniques (FFE, DFE, MLSE). Develop comprehensive end-to-end system models in MATLAB/Simulink to simulate link performance, accounting for noise, non-linearity, and frequency-dependent losses.
Analog IC Layout Engineer Neuralink CorpAnalog IC Layout EngineerFremont, CA$83,000–$139,000 / yearJob Description and Responsibilities: We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces.
Electrical Engineer, Energy, Service Tooling Design Tesla IncElectrical Engineer, Energy, Service Tooling DesignHayward, CA$91,600–$195,600 / yearThis skilled and motivated individual will keep pushing this evolving energy industry forward by designing mechatronic battery lift systems, battery charge equipment user interfacing, Low voltage communication protocols, communication equipment, circuits to ensure user safety, signal conditioning, and much more. The Service Tooling Engineering team is responsible for the design to production of custom service and commissioning tooling hardware to assist in the rapid development and maintenance of Telsa's Energy storage and charging solutions.
Staff Electrical Design Engineer, Cybercab, Next Gen Battery Electronics Tesla IncStaff Electrical Design Engineer, Cybercab, Next Gen Battery ElectronicsPalo Alto, CA$192,000–$288,000 / yearTesla's Battery Electronics team is hiring an experienced Electrical Design Engineer to lead the design of high-voltage battery management PCBAs for our newest vehicles, including the Robotaxi and next-generation mass market platforms, Roadster, Semi, Cybertruck, as well as our established SX3Y lineup, residential and industrial energy storage solutions, and Optimus. Collaborating closely with mechanical design, firmware engineering, test, and manufacturing teams, you will optimize your designs for best-in-class performance and reliability while also focusing on minimizing parts count and reducing BOM costs.
Mechanical Design Engineer, Semi Charging Tesla IncMechanical Design Engineer, Semi ChargingPalo Alto, CA$109,600–$234,000 / yearThe Charging Hardware Mechanical Design team is looking for a highly skilled and motivated individual to take ownership over mechanical design of key sub-systems for our Semi Charging and Supercharging products. Modeling and design of mechanical components and assemblies including sheet metal, structural metals, high voltage distribution, plastics, environmental sealing materials, fasteners, and other components.
Mechanical Design Engineer, Optimus & AC Charging Tesla IncMechanical Design Engineer, Optimus & AC ChargingPalo Alto, CA$109,600–$234,000 / yearModeling and design of mechanical components and assemblies including sheet metal, structural metals, high voltage distribution, plastics, environmental sealing materials, fasteners, and other components. The Charging Hardware Mechanical Design team is looking for a highly skilled and motivated individual to take ownership over mechanical design of key sub-systems for AC Charging and Optimus Robot Charging.
Integration RTL Design Engineer Advanced Micro Devices, IncIntegration RTL Design EngineerSan Jose, CaliforniaFull ASIC Development Lifecycle: Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation. RTL Design & Microarchitecture: Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements.
Mechanical Design Engineer - Onsite SJC (6219) itD TechMechanical Design Engineer - Onsite SJC (6219)Milpitas, CAWe are looking for a highly motivated mechanical design engineer who can work independently or under the supervision of a Technical Leader or manager to carry out design for networking products from concept to production. • Assist with resolution of design related issues that are impacting field or manufacturing by working closely with manufacturing teams and suppliers, developing mitigation plans, and keeping management informed.
Sr. Memory Design Engineer, Terafab Tesla IncSr. Memory Design Engineer, TerafabPalo Alto, CA$88,000–$300,000 / yearYou will operate at the intersection of process technology, IP vendor ecosystems, and system-level silicon design - translating ambitious product requirements into a memory roadmap that is fast, manufacturable, and scalable across Tesla and SpaceX programs. Skills in designing power delivery networks for low power design (DVFSL), Link ECC, on-die ECC, and designing around Per-Row Activation Counting (PRAC) protocol.
Senior RTL Design Engineer Advanced Micro Devices IncSenior RTL Design EngineerSan Jose, CAKEY RESPONSIBILITIES: RTL Design & Microarchitecture: Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements. Full ASIC Development Lifecycle: Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation.