NewOSP Engineer Mountain Ltd.OSP EngineerBeaverton, ORPerforms duties such as collecting field data, preparing/organizing permit packages for submittal to the appropriate entities, maintaining complex files, keeping records, searching, and investigating information contained in files, processing departmental documents requiring specific knowledge of functional operations, posting records including accounting and continuing property records, typing correspondence and reports from rough drafts, and assisting engineers as requested. The OSP Engineer performs detailed outside plant facility engineering tasks that includes estimating, analyzing, designing, planning, budget tracking estimates against actual costs for copper and fiber cables, poles, direct buried and conduit systems.
Principal Circuit Design Engineer Microsoft CorpPrincipal Circuit Design EngineerHillsboro, ORRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Circuit Design Engineer - Library Apple IncCircuit Design Engineer - LibraryBeaverton, ORIn this highly visible role, you will be at the heart of a processor design effort, working with the custom digital circuits team and library development, making a critical impact in delivering products to market quickly. You will drive concepts of transistor level circuit design, modeling and performance analysis, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly.
Custom Circuits Design Engineer Apple IncCustom Circuits Design EngineerBeaverton, ORExperience in one or multiple of the following areas is highly desirable: Machine learning accelerators, SRAM circuits, non-volatile memories, weak / moderate inversion circuits, ultra-low power amplifiers, DC/DC converters, digital on-chip sensors, high speed clocking, time to digital converters (TDCs). - Work with power team, PD and architects to define specifications and requirements - Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation / margin verification across PVT, statistical design, functional verification and silicon bring up.
Principal Analog Circuit Design Engineer - SerDes Intel CorpPrincipal Analog Circuit Design Engineer - SerDesHillsboro, OR$220,920–$311,890 / yearBusiness group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). Job Details: Job Description: We are seeking a highly experienced and motivated Principal Analog Design Engineer to lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications.
Memory Circuit Design Engineer Intel CorpMemory Circuit Design EngineerHillsboro, OR$122,440–$232,190 / yearYou will be partnering with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel advanced CMOS process technologies. Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly.
Circuits Physical Design Engineer Apple IncCircuits Physical Design EngineerBeaverton, ORWe are looking for applicants with 2+ years of proven experience and strong understanding of the RTL2GDSII flow and concepts related to synthesis, place & route, CTS, timing convergence, layout closure. Imagine yourself at the center of our SOC design effort, collaborating with all fields, playing a strategic role of getting functional products to millions of customers quickly.
Network Planning Engineer (Telecom Circuit Design) Adex CorporationNetwork Planning Engineer (Telecom Circuit Design)Portland, ORA Network Planning Engineer’s (Telco Engineer) role will be a crucial part in evaluating, planning, and implementing a cutting-edge telecommunications network design tailored to mission-critical needs. Domain knowledge of the Telecommunications industry, including carrier services, provisioning terminology, CISCO routers and network infrastructure and IP technologies such as Pseudo Wire and Ethernet switching.
SerDes Circuit Design Engineer Apple IncSerDes Circuit Design EngineerBeaverton, ORYou will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, high-speed analog signal chain, mixed-signal calibration and algorithms) with best in class power, performance, and area (PPA). Understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters.
Hardware Design Engineer RambusHardware Design EngineerHillsboro, Oregon$106,900–$198,500 / yearRambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. Overview: Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional HW Design Engineer to join our MCG team in Hillsboro.
Senior Hardware Design Engineer (Teradyne, Tualatin, OR) Teradyne IncSenior Hardware Design Engineer (Teradyne, Tualatin, OR)Tualatin, OR$141,400–$226,200 / yearThe engineer will perform a variety of complex activities covering the design of new products, investigating customer-reported problems for root cause analysis, and implementing improvements in design, test, and/or operations. Benefits: Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.
Associate Electrical Engineer - Power System Studies Black & Veatch Holding CoAssociate Electrical Engineer - Power System StudiesTualatin, ORThe ideal candidate has a good understanding of Transmission System design concepts & analyses such as Transmission Interconnection Studies, Reactive Power Compensation, Short Circuit (Fault) Analysis, Circuit Breaker Rating Analysis and system modeling software for the same. You'll work alongside teams solving complex challenges and turning ideas into solutions that perform in the real world-gaining hands-on experience across projects, technologies, and disciplines.
Tooling Design Engineer II SigSauerTooling Design Engineer IITualatin, ORPart timePosition Summary: The Tooling Design Engineer II is responsible for designing, implementing, and maintaining assembly equipment and tooling as well as automation support fixtures to support both new product introductions as well as continuation projects. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
Design Engineer II SigSauerDesign Engineer IITualatin, ORPart timeWorking both independently and in a team environment, the Design Engineer II will collaborate with Manufacturing Engineers, Electrical Engineers, Optical Engineers, Quality Engineers, Buyers, Product Managers, Project Managers, Test Technicians, Inspectors, and Assembly staff. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
Tooling Design Engineer II Sig Sauer Inc.Tooling Design Engineer IITualatin, ORPosition Summary: The Tooling Design Engineer II is responsible for designing, implementing, and maintaining assembly equipment and tooling as well as automation support fixtures to support both new product introductions as well as continuation projects. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
Design Engineer II Sig Sauer Inc.Design Engineer IITualatin, ORWorking both independently and in a team environment, the Design Engineer II will collaborate with Manufacturing Engineers, Electrical Engineers, Optical Engineers, Quality Engineers, Buyers, Product Managers, Project Managers, Test Technicians, Inspectors, and Assembly staff. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
Principal Engineer - Analog and Mixed-Signal Physical Design Microsoft CorpPrincipal Engineer - Analog and Mixed-Signal Physical DesignHillsboro, OR$142,800–$274,800 / yearDoctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. The ideal candidate brings deep Fusion Compiler-based physical implementation expertise, strong timing closure and physical verification experience, and sufficient custom layout understanding to partner effectively with analog design and layout teams while directly executing critical implementation and debug work.
Senior Engineer Design Verification Engineering Analog DevicesSenior Engineer Design Verification EngineeringBeaverton, OregonOr in the alternative, a Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and four (4) years of experience as a Design Verification Engineer or related occupation performing IC design or validation. Requirements: Must have a Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and two (2) years of experience as a Design Verification Engineer or related occupation performing IC design or validation.
Senior Electrical Engineer - Digital Hardware & FPGA Design Teledyne Technologies IncSenior Electrical Engineer - Digital Hardware & FPGA DesignWilsonville, OROur products include advanced surveillance sensors, unmanned air and ground vehicles, sensing devices used to detect chemicals, biological agents, radiation and explosives, and a host of other solutions that help warfighters, first responders, and search-and-rescue teams do their jobs better. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.
Analog and Mixed Signal Design Engineer Intel CorpAnalog and Mixed Signal Design EngineerHillsboro, OR$164,470–$269,100 / yearPreferred Qualifications: • Experience in one or more of the following areas is preferred: • GPIOs, high speed parallel or serial IO links and their subcomponents (data path, TX, RX, etc.), clock distribution, clock conditioning, clock recovery circuits, voltage regulators, voltage reference circuits, ADCs/DACs, inductors, transmission lines, RF and millimeter-wave circuits, test of custom analog and mixed-signal circuits. Business Group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly.
Analog Layout Design Engineer IntelAnalog Layout Design EngineerHillsboro, OregonAs a critical contributor to our design ecosystem, you will drive the creation and optimization of complex layouts for analog signal circuits, ensuring that our designs meet stringent performance, area, and reliability requirements. Preferred Qualifications and Experience : Strong understanding of analog layout effects including mismatch, parasitics, IR drop, electromigration (EM), and coupling, and their impact on circuit performance.
Analog And Mixed Signal Design Engineer Intel Corp.Analog And Mixed Signal Design EngineerHillsboro, OR$164,470–$269,100 / yearPreferred Qualifications: Experience in one or more of the following areas is preferred: GPIOs, high speed parallel or serial IO links and their subcomponents (data path, TX, RX, etc.), clock distribution, clock conditioning, clock recovery circuits, voltage regulators, voltage reference circuits, ADCs/DACs, inductors, transmission lines, RF and millimeter-wave circuits, test of custom analog and mixed-signal circuits. Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly.
Digital Layout Design Engineer AppleDigital Layout Design EngineerBeaverton, ORAs a member of the layout team of the microprocessor group, you will be responsible to deliver PDV clean layout, including the following: - Designing complex custom layout for digital circuits in deep SubMicron CMOS technologies. **Minimum Qualifications** + Bachelors degree in relevant field of study plus 3 years of relevant experience **Preferred Qualifications** + We are looking for applicants experience in custom layout design of deep SubMicron CMOS circuits.
Design Engineer II SIG SAUER IncDesign Engineer IITualatin, ORWorking both independently and in a team environment, the Design Engineer II will collaborate with Manufacturing Engineers, Electrical Engineers, Optical Engineers, Quality Engineers, Buyers, Product Managers, Project Managers, Test Technicians, Inspectors, and Assembly staff. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
Tooling Design Engineer II SIG SAUER CareersTooling Design Engineer IITualatin, OregonPosition Summary: The Tooling Design Engineer II is responsible for designing, implementing, and maintaining assembly equipment and tooling as well as automation support fixtures to support both new product introductions as well as continuation projects. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
Design Engineer II SIG SAUER CareersDesign Engineer IITualatin, OregonWorking both independently and in a team environment, the Design Engineer II will collaborate with Manufacturing Engineers, Electrical Engineers, Optical Engineers, Quality Engineers, Buyers, Product Managers, Project Managers, Test Technicians, Inspectors, and Assembly staff. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
EDA Design Flow Development Engineer Intel CorpEDA Design Flow Development EngineerHillsboro, OR$141,910–$269,100 / yearBusiness group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We are seeking an experienced EDA CAD / Tool Flow Development Engineer to develop and maintain transistor-level electromigration (EM) and IR drop analysis flows for custom IPs, embedded memories, SRAMs, analog/mixed-signal interfaces, and high-performance custom macros across advanced semiconductor technologies.
Mid-level Physical Design Engineer CPU IntelMid-level Physical Design Engineer CPUHillsboro, OregonYour experience described above must be in the following: Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure. In this role, you will take on increasing ownership within the RTL-to-GDS flow, working on block-level implementation while collaborating closely with cross-functional teams.
Mid-Level Physical Design Engineer CPU Intel Corp.Mid-Level Physical Design Engineer CPUHillsboro, OR$122,440–$232,190 / yearYour experience described above must be in the following: Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure. In this role, you will take on increasing ownership within the RTL-to-GDS flow, working on block-level implementation while collaborating closely with cross-functional teams.
Senior Clock Architecture & Design Engineer Intel Corp.Senior Clock Architecture & Design EngineerHillsboro, OR$141,910–$269,100 / yearBusiness group: Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences. We are looking for a Senior Clock Architecture & Design Engineer a pivotal role in developing the clocking architecture for Intel's next-generation flagship CPUs.
Electrical Design Engineer I or II Epic AircraftElectrical Design Engineer I or IIBend, OregonThis position may be filled at either the Engineer I or Engineer II level, depending on the candidate's education, experience, technical capabilities, and level of aerospace-specific experience. Maintain accurate engineering data and documentation within applicable engineering and Product Data Management systems.
DDR Design Engineer Apple IncDDR Design EngineerBeaverton, ORAs a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.
CPU Physical Design Engineer Apple IncCPU Physical Design EngineerBeaverton, ORAs a CPU Physical Design Engineer, you will drive or participate in the following: Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals. Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level physical design.
Senior Analog Design Engineer Intel CorpSenior Analog Design EngineerHillsboro, OR$190,610–$269,100 / yearBusiness group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). In this role, you will drive the definition, design, and verification of high-performance analog blocks, IP top level designs and subsystems (floor planning, power delivery, bump maps), collaborating closely with system architects, logic designers, and layout engineers.
Senior Engineer, Digital Design Engineering Analog DevicesSenior Engineer, Digital Design EngineeringBeaverton, OregonRequirements: Must have a Master’s degree in Electrical Engineering, Electronic Engineering, Computer Science, Computer Engineering, or closely related technical field (willing to accept foreign education equivalent) and two (2) years of experience as a Digital Design Engineer or related occupation performing digital or mixed signal design and verification. Duties: Develop state-of-the-art solutions involving analog, mixed-signal, power, RF, and digital signal processing integrated circuits used in electronic equipment for a wide-range of industries, including healthcare, communications, aerospace and defense, instrumentation, and emerging markets.
Associate Mixed Signal Design Engineer Melexis NVAssociate Mixed Signal Design EngineerBeaverton, ORAs an Associate Mixed Signal Design Engineer at Melexis, you will verify the mixed mode design (analog, digital and embedded software) for the Integrated Circuit (IC) based on the customer requirements.
Design Certification Engineer 2 - Avionics Garmin International, Inc.Design Certification Engineer 2 - AvionicsSalem, OregonFull timeThis role also manages project schedules and deliverables through leadership, teamwork, and use of communication skills and works collaboratively with project engineering teams to solve complex engineering problems. Bachelor's Degree in Electrical, Computer Science, Aerospace, or Computer Engineering or another similar technical degree AND a minimum of 1 year of relevant experience OR an equivalent combination of education and experience.
Senior Analog RFIC Design Engineer Rohde & Schwarz GmbH & Co KGSenior Analog RFIC Design EngineerHillsboro, OR$140,000–$200,000 / yearKnowledge in the design and operation of the following analog blocks: low noise high linearity amplifiers and mixers, VCOs, filters, line drivers, power amplifiers, mixed analog / custom digital circuits, basic analog building blocks (op amps, comparators, current sources, current mirrors, voltage references). Design and implement high speed (>20GHz) analog/mixed-signal circuits for data converters and RF SOCs in advanced CMOS/BiCMOS technology for integration in high performance mixed-signal SoCs.
Principal Engineer - Standard Cell Design IntelPrincipal Engineer - Standard Cell DesignHillsboro, CaliforniaJob Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, Arizona, Phoenix, US, California, Folsom, US, Oregon, Hillsboro, US, Texas, Austin Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Senior Physical Design And Timing Engineer NvidiaSenior Physical Design And Timing EngineerHillsboro, ORStrong hands-on experience taking complex blocks, IPs, or chips from RTL/netlist to tapeout through logic synthesis, floorplanning, placement, clock-tree synthesis, routing, physical optimization, signoff, and ECOs. Hands-on experience in block, sub-chip, and full-chip level Static Timing Analysis, timing-constraint development, and multi-mode, multi-corner timing closure factoring in process variations, IR drop, and Xtalk.
Senior PCB Design Engineer / level 4 Artech LLCSenior PCB Design Engineer / level 4Tualatin, OR$90–$100 / hourOrganization & Role: The Client's NBU PCB Design Engineering team is seeking a highly motivated, energetic, and technically driven Senior PCB Design Engineer to focus on the development of PCB designs for products within the division. This role operates in a dynamic and collaborative multi site development environment, working closely with cross functional engineering teams from concept through manufacturing release.
Senior Design Engineer - IP Office Microsoft CorpSenior Design Engineer - IP OfficeHillsboro, OR$119,800–$234,700 / yearRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Experienced Analog/Mixed Signal IC Design Engineer MACOM Technology Solutions Holdings IncExperienced Analog/Mixed Signal IC Design EngineerHillsboro, ORThe candidate must be able to architect, design, layout, measure and productize SiGe and silicon-based ICs and be comfortable with frequencies above 30GHz. As part of a fast-moving team, the principal design engineer will develop millimeter wave circuits for coherent applications.
Mixed Signal Logic Design Engineer Intel CorpMixed Signal Logic Design EngineerHillsboro, OR$141,910–$200,340 / yearBusiness group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). BS degree in Electrical Engineering or Computer Engineering or similar field of study with 4+ years relevant experience -OR- MS degree in Electrical Engineering or Computer Engineering or similar field of study with 3+ years relevant experience.
Senior Physical Design Engineer (CPU) IntelSenior Physical Design Engineer (CPU)Hillsboro, OregonYour experience described above must be in the following: Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Senior Physical Design Engineer (Cpu) Intel Corp.Senior Physical Design Engineer (Cpu)Hillsboro, OR$141,910–$269,100 / yearYour experience described above must be in the following: Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Control Staff Engineer 1-3 Design (for CSNW) RH2 EngineeringControl Staff Engineer 1-3 Design (for CSNW)Lake Oswego, ORA person in this position thrives in a collaborative team environment that requires critical thinking to solve complex problems and providing exceptional client service while managing a diverse workload and creating technically accurate deliverables. This position serves to work and collaborate with other CSNW (a subsidiary of RH2) team members in the planning, designing, and commissioning of control systems for water and wastewater facility projects and industrial manufacturing.
SoC Logic Design Engineer IntelSoC Logic Design EngineerHillsboro, Oregon$141,910–$232,190 / yearJob Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Oregon, Hillsboro Additional Locations: US, California, Santa Clara, US, Texas, Austin Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). Minimum Qualifications To excel in this role, you must meet the following requirements:- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field and 4+ years of relevant experience- OR Master's degree in Electrical Engineering, Computer Engineering, or a related field and 3+ years of relevant experience- OR PhD in Electrical Engineering, Computer Engineering, or a related field and 6+ months of experience.
Fpga Design Engineer (Mtd, Tualatin, OR) Teradyne, Inc.Fpga Design Engineer (Mtd, Tualatin, OR)Tualatin, OR$123,100–$196,900 / yearOur test instrumentation supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery. Teradyne's Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cutting-edge memory test solutions.
Senior Fpga Design Engineer (Mtd, Tualatin, OR) Teradyne, Inc.Senior Fpga Design Engineer (Mtd, Tualatin, OR)Tualatin, OR$154,900–$247,800 / yearOur test instrumentation supports the world's most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery. Teradyne's Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cutting-edge memory test solutions.