div>Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets.
- BS in Electrical Engineering or a related field plus minimum 4 years of industry experience in analog and/or mixed-signal circuit design (or MS plus minimum 2 years of industry experience).
Sunnyvale, California28 days ago
The role requires extensive experience in ASIC design and layout—including top-level ownership of ASIC tape-outs at leading commercial foundries—and deep expertise in either or both of these two categories: high-precision AMS circuits and high-speed wireline/silicon photonics interface circuits. Demonstrated deep design expertise in one or both of the following categories:
High-precision designs: Analog-to-digital and digital-to-analog converters, bandgap references, voltage regulators, amplifiers, and other supporting circuitry.
Cupertino, CA30+ days ago
As a team, we will be working on the leading-edge technology nodes to build elite custom analog designs used to connect our world-class products to the physical world as well as enable optimizing their performance. Solid understanding/experience in bandgaps, bias, opamps, switched-cap circuits, LDOs, low power oscillators, PLLs, VGAs, feedback and compensation techniques.
p>Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Strong knowledge of analog/mixed‑signal circuits such as op‑amps, bandgap, regulators, comparators, equalization circuits, PLL/DLL, and phase interpolators.
Santa Clara, CA8 days ago
p>Business group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).
Qualifications:
Minimum Qualifications - Bachelor''s degree in Electrical Engineering, Computer Engineering, or a related field, with 3+ years of relevant experience, or a Master''s degree with 2+ years of experience, or a PhD with no prior experience.
Santa Clara, CA30+ days ago
p>Business group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).
Job Details:
Job Description:
We are seeking a highly experienced and motivated Principal Analog Design Engineer to lead the design and validation of cutting-edge analog circuits for high-speed (112G and 224G) SerDes applications.
p>InvenSense's motion tracking, audio and location platforms, and services can be found in many of the world's largest and most iconic brands including smartphones, tablets, wearables, drones, gaming devices, internet of things, automotive products, and remote controls for smart TVs. Strong skills in designing various analog/mixed-signal blocks including:
• MEMS sense amplifiers (precision switched-capacitor OPAMP) • Analog-to-Digital Converter (ADC) • Bandgap references • Charge pumps • Oscillator circuits.
Sunnyvale, CA30+ days ago
From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Sunnyvale, CA, USA; Irvine, CA, USA.Minimum qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
p>Magics is a European fabless semiconductor company that provides high-reliability, high-performance, fault-tolerant, and radiation-hardened chips for strategic sectors such as space, nuclear energy, aerospace, and defence markets. - Design and develop advanced analog/mixed-signal integrated circuits, such as Op-Amps, ADC/DAC, LDOs, DC/DC converters, Voltage-Controlled Oscillators (VCOs) and Phase-Locked Loops (PLLs).
Santa Clara, CA30+ days ago
li>5+ years of experience with Cadence Virtuoso Layout XL tools including cell level design and top-level verification tasks including full-chip DRC, LVS and metal density/slot. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government.
li>5 yeas of relevant analog circuit design experience powering up devices such as FPGAs, CPLD (complex programmable logic device) and other components on board. Responsibilities: - Design the 48V DC/DC conversion circuits to generate multiple power supply voltages which will then be used to power circuits on the board.
ul>Design and develop advanced analog and mixed-signal circuits, including but not limited to ADCs, DACs, transimpedance amplifiers (TIAs), laser drivers, and various high-speed linear and non-linear circuits for optical modules. Lumentum is seeking a highly skilled and experienced Staff Engineer, Analog Design to contribute to the development of high-performance analog and mixed-signal integrated circuits for optical communication products.
p>Lumentum is seeking a highly experienced and technically proficient Principal Engineer, Analog Design to lead the design, development, and validation of complex analog circuits for cutting-edge optical communication products. With our continual goal of making Lumentum a best place to work for our employees, we strive to offer employees competitive total compensation packages, which may include annual bonus, commission for certain sales roles, equity, and health and welfare benefits.
Santa Clara, CA22 days ago
Job Title: Analog Design Engineer Job Duties:Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso. Design the internal Discrete-time Circuits, Peripheral circuits and Timing control for a CMOS image sensor, including bias circuits, driver/level shifter, switched capacitor, logic gates and slew rate control.
Santa Clara, CA30+ days ago
p>The team works at the intersection of EDA tools, semiconductor process technology, and circuit design, partnering closely with: • Analog and mixed-signal IC design teams • Silicon photonics engineers • Foundry partners • EDA vendors • Device modeling and TCAD specialists. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
This is a customer-facing role that sits at the intersection of analog circuit design, design automation technology, and customer design workflows, and plays a key role in scaling next-generation analog design automation flows. We are looking for a Product Engineer to drive the development and customer adoption of Analog Design automation flows in Virtuoso, including AI Driven optimization, parasitic-aware design, and layout-driven design methodologies.
li>Python Scripting: Develop and optimize Python scripts to automate lab measurements, parse large datasets, and generate validation reports. Please note that the base salary range (OR hourly rate) is a guideline, and individual total compensation may vary based on a number of factors such as qualifications, skill level, work location, and other business and organizational needs.
p>As a Mixed-Signal IP Technical Lead/Architect in the Mixed-Signal Development Group, you will be responsible for the end-to-end technical leadership of mixed-signal IPs-including IP licensing, integration, and silicon validation support-across a range of advanced SoC projects. Requirements/Qualifications:
Qualifications:
- Bachelor's degree in electrical engineering or related field with strong analog/mixed-signal background and at least 10 years of experience in analog/mixed-signal IP design, integration, and validation for SoC applications, or a Master's degree with at least 7.5 years of such experience.