NewSenior PCIe Bridge Design Verification Engineer MicrosoftSenior PCIe Bridge Design Verification EngineerHillsboro, OR$119,800–$234,700 / yearDoctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. 7+ years of related technical engineering experience OR Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience or internship experience.
Senior Quality Engineer Orchid Orthopedic SolutionsSenior Quality EngineerSilverton, ORThe Senior Quality Engineer supports the ongoing quality of Orchid's legacy products across all sites by focusing on a strong relationship with critical customers, working with project management and manufacturing engineers to support new product introductions and ongoing validation, and planning and executing training based on business needs. Uses quality tools to implement improvements including: process flowcharting, Pareto analysis, correlation and regression analysis, significance tests, design of experiments, statistical process control, gauge repeatability and reproducibility, and trend analysis techniques.
NewSenior Fabric Design Verification Engineer Microsoft CorpSenior Fabric Design Verification EngineerHillsboro, OR$119,800–$234,700 / yearRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsofts state-of-the-art computer chips, notably the Azure Cobalt.
Senior Engineer Design Verification Engineering Analog Devices IncSenior Engineer Design Verification EngineeringBeaverton, OR$119,475–$163,200 / yearOr in the alternative, a Bachelors degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and four (4) years of experience as a Design Verification Engineer or related occupation performing IC design or validation. Requirements: Must have a Masters degree in Computer Science, Computer Engineering, Electrical Engineering, Electronic Engineering, or closely related technical field (willing to accept foreign education equivalent) and two (2) years of experience as a Design Verification Engineer or related occupation performing IC design or validation.
CPU Design Verification Engineer Google LLCCPU Design Verification EngineerPortland, OR$132,000–$189,000 / yearCareers Careers Skip navigation links home home Home Homework_outline work_outline Jobs Jobs noogler_hat noogler_hat Students Students googlegoogle How we work How we work handyman handyman How we hire How we hire person_outline person_outline Your career Your career help_outline Help link feedback Send feedback more_vert Help Send Feedback Sign in Careers Careers home Homework_outline Jobsexpand_more noogler_hat Studentsexpand_more google How we work expand_more handyman How we hire expand_more person_outline Your career expand_more job details arrow_back Back to jobs search. Google is a global company and in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
IP Design Verification Engineer Intel CorpIP Design Verification EngineerHillsboro, OR$141,910–$200,340 / yearBusiness group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel''s product and foundry businesses.
NewSoC Verification Engineer Intel CorpSoC Verification EngineerHillsboro, OR$141,910–$200,340 / yearBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 4+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning. Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning.
Lead CPU Design Verification Engineer, Silicon Google LLCLead CPU Design Verification Engineer, SiliconPortland, ORXNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Portland, OR, USA; Poughkeepsie, NY, USA; Austin, TX, USA; Mountain View, CA, USA. Preferred qualifications: Master"s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Senior CPU Design Verification Engineer, Silicon Google LLCSenior CPU Design Verification Engineer, SiliconPortland, ORCareers Careers Skip navigation links home home Home Homework_outline work_outline Jobs Jobs noogler_hat noogler_hat Students Students googlegoogle How we work How we work handyman handyman How we hire How we hire person_outline person_outline Your career Your career help_outline Help link feedback Send feedback more_vert Help Send Feedback Sign in Careers Careers home Homework_outline Jobsexpand_more noogler_hat Studentsexpand_more google How we work expand_more handyman How we hire expand_more person_outline Your career expand_more job details arrow_back Back to jobs search 3839 jobs matched Senior Product Manager Google Labs Mountain View CA USA Austin TX USA 3 more 2 more bar_chart Mid Mid Experience driving progress solving problems and mentoring more junior team members deeper expertise and applied knowledge within relevant area. Apply share link Copy link email Email a friend info_outline X Note By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View CA USA Austin TX USA Portland OR USA Poughkeepsie NY USA Minimum qualifications Bachelors degree in Electrical Engineering Computer Engineering Computer Science a related field or equivalent practical experience.
CPU Debug and Power Management Verification Engineer Apple IncCPU Debug and Power Management Verification EngineerBeaverton, ORMinimum BS and 3+ years of relevant industry experience Programming skills in Perl/Python or SystemVerilogExperience in processor or power management architecture and verification Experience with system fabric protocols such as AXI In-depth knowledge in design verification environments like random constraint verification and/or UVM base testbenches Experience in system Verilog assertions or silicon bringup or UPF and low power simulation Experience in processor debug features including hardware trace is a plus Experience with advanced verification techniques such as formal verification is a plus Advanced programming skills such as object orientated programming or CPU assembly language is a plus Should be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effort Be able to create and follow detailed work schedules and work independently on the verification efforts for a block/area of the design. In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Design Verification Engineer Apple IncDesign Verification EngineerBeaverton, ORStudy design specification and create test plan Develop infrastructure in SystemVerilog/UVM to stress the design Develop and fix failures from regressions, close bugs Use LLMs to do verification efficientlyMinimum requirement of a bachelors degreeBS degree in technical subject area with minimum 3 years of proven experience or equivalent strongly preferred Strong knowledge of OOP, SystemVerilog and UVM Strong knowledge in developing scalable and portable test-benches Proven experience with verification methodologies and tools such as simulators, waveform viewer, build and run automation, coverage collection, gate level simulations Some working experience using LLMs for efficiency and quality Experience with power-aware (UPF) or similar verification methodology Knowledge of one of the scripting languages such as Python, Perl, TCL Some experience with serial protocols such as PCIe or USB, parallel protocol such as DDR is a plus but not required Knowledge of formal verification methodology is a plus but not required Knowledge of emulation for verification technologies is a plus but not required. In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment.
NewDigital Verification Engineer Lead (MTD, Tualatin, OR) TeradyneDigital Verification Engineer Lead (MTD, Tualatin, OR)Tualatin, OR$154,900–$247,800 / yearMaster’s Degree or equivalent in Electrical Engineering/Computer Engineering/Computer Science or closely related field with a minimum of 10 years of relevant work experience OR Bachelor’s Degree or equivalent in Electrical Engineering/Computer Engineering/Computer Science or closely related field with a minimum of 12 years of relevant work experience. ATTENTION APPLICANTS WITH DISABILITIES: If you’re unable to access our on-line application due to a disability you may visit one of our locations or our Corporate Office at 600 Riverpark Drive, North Reading, MA and request a paper application form.
Senior Design Verification Engineer Memory Controller IP Rambus IncSenior Design Verification Engineer Memory Controller IPHillsboro, OR$108,300–$201,100 / yearThe successful candidate will participate in pre-silicon RTL Verification activities related to Memory Controller SoftIP development, on leading-edge DDR, HBM, and GDDR DRAM controller technologies. Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing.
Senior Design Verification Engineer - Memory Controller IP RambusSenior Design Verification Engineer - Memory Controller IPHillsboro, Oregon$108,300–$201,100 / yearThe successful candidate will participate in pre-silicon RTL Verification activities related to Memory Controller SoftIP development, on leading-edge DDR, HBM, and GDDR DRAM controller technologies. Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing.
NewFormal Verification Engineer Apple, Inc.Formal Verification EngineerBeaverton, ORWe have a critical impact on getting high quality functional products to millions of customers quickly.**Description**As a formal verification engineer working the complete formal verification for single or multiple design blocks and IP's (CPU, Cellular and Connectivity IP, Audio and Image Processing IP, Neural Networks IP, Memory/DMA Controller, Security IP, Peripheral IP, Interconnects, Power management subsystems, etc.), you will be responsible for:- Working with Apple Silicon's world-class Security Enclave design engineers to develop a formal micro-architecture specification- Developing comprehensive formal verification test plan that includes unique security requirement verification- Proving properties of the design, finding design bugs, and working closely with design teams to help improve the micro-architecture.- Crafting novel and creative solutions for modelling security attacks and proving robustness of complex design micro-architectures- Developing and implementing re-usable and optimized formal models and verification code base- Architecting correct-by-construction design methodologies for improved formal verification efficiency and productivity.**Minimum
Senior ASIC Verification Engineer, Coherent High Speed Interconnect NVIDIA CorpSenior ASIC Verification Engineer, Coherent High Speed InterconnectHillsboro, ORAs a member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), complete test/coverage plans, and verify the correctness of the design. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
ASIC Verification Engineer - New College Grad 2026 NVIDIA CorpASIC Verification Engineer - New College Grad 2026Hillsboro, ORWhat you'll be doing: As a member of our verification team, you'll understand the design & implementation with focus on Memory Management unit, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), implement test/coverage plans, and verify the correctness of the design. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.
CPU Design Verification Engineer Apple IncCPU Design Verification EngineerBeaverton, ORDevelop checkers and SystemVerilog or C-base transactors to verify the designMinimum BS and 3+ years of relevant industry experience Academic and industry experience with CPU architecture Academic and industry experience with digital logic design, chip architecture and microarchitecture Programming experience in C/C++ or SystemVerilog Experience with developing testplans/testbenches, C-based transactors, and writing/debugging testsBachelor of Science or Engineering in Electrical Engineering, Computer Engineering, or Computer Science Experience in post-silicon bringup Experience with advanced verification techniques such as formal Should be a great teammate with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design. As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows: Work closely with architecture and RTL designers on verifying the functional correctness of the design.
Senior CPU Design Verification Engineer, Emulation Google LLCSenior CPU Design Verification Engineer, EmulationPortland, ORXNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA. Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
Senior Memory Controller Verification Engineer NVIDIA CorpSenior Memory Controller Verification EngineerHillsboro, ORIn this position, you will partner with the design and architecture teams to help make the right implementation choices, craft and implement verification test plans, maintain regressions, close coverage and sign off design or both functional correctness and for meeting performance expectations. At NVIDIA, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
Senior CPU Pre-Silicon Verification Engineer Intel CorpSenior CPU Pre-Silicon Verification EngineerHillsboro, OR$164,470–$311,890 / yearMinimum Qualifications: The candidate must have a Bachelors Degree in Electrical/Computer Engineering or any related field with 8+ years of relevant experience -OR- Masters in Electrical/Computer Engineering or any related field with 7+ years of relevant experience -OR- PhD in Electrical/Computer Engineering or any related field with 4+ years of relevant experience in required skills section. As part of our elite engineering organization, youll be at the forefront of semiconductor innovation working on Intels next-generation CPUs, transforming cutting-edge concepts into the silicon that drives everything from personal devices to massive data centers and emerging edge technologies.
Mixed Signal Design Verification Engineer Intel CorpMixed Signal Design Verification EngineerHillsboro, OR$141,910–$200,340 / yearThe role's responsibilities include but are not limited to: Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements. Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Staff Mechanical Engineer, Verification Biotronik, Inc.Staff Mechanical Engineer, VerificationLake Oswego, ORFull timeYou will design and execute informal development tests and formal verification testing, create custom test fixtures, and develop scalable test infrastructure to support growing product needs. Micro Systems Engineering, Inc. (MSEI) is a pioneer in developing innovative implantable medical technologies that improve-and often save-the lives of millions living with cardiovascular conditions and chronic neurologic pain.
Emulation Verification Engineer Apple IncEmulation Verification EngineerBeaverton, ORCollaborate closely with Architecture, Design, DV, Silicon Validation, Power and SW teams to bring up large SoCs on emulation platform - Develop/apply synthesizable monitors/checkers, stimulus on emulation platform - Prepare and complete the test plan and perform reviews with the multi-functional teams - Perform low power testing on emulation platform - Develop code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM - Develop random stimulus infrastructure by reusing existing UVM simulation constraintsMinimum of BS + 10 years relevant industry experience. The overall work will involve porting the design onto the Palladium platform, followed by completing the detailed Emulation testplans.
Senior Formal Verification Engineer - LPU NVIDIA CorpSenior Formal Verification Engineer - LPUORThe base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. Collaborating closely with architecture and RTL teams to specify properties, resolve complex issues in building, and influence micro-architecture decisions.
Senior Formal Verification Engineer NVIDIA CorpSenior Formal Verification EngineerOR$196,000–$310,500 / yearBS/MS/PhD or equivalent experience in CS/CE/EE • 12+ years in ASIC verification with 8+ years focused on formal verification methods • Mastery of SystemVerilog Assertions (SVA) and formal property verification • Proficient on at least one popular formal verification tool in the industry (JapserGold, VC Formal, etc.) • Good scripting skills for flow automation (tcl, python, etc.) • Good written and oral communication skills • Keen attention to details. You will employ sophisticated formal techniques to acquire sufficiently bounded proofs while working with architects, designers, and pre- & post-silicon verification teams to accomplish your tasks, as well as improve formal verification methodologies and flows.
Senior Verification Engineer, SoC NVIDIA CorpSenior Verification Engineer, SoCHillsboro, ORThe base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits. NVIDIA is seeking an exceptional Senior SoC ASIC Verification Engineer to confirm the functionality of the world's most powerful AI-enabled SoCs.
SoC Physical Design Verification Engineer Apple IncSoC Physical Design Verification EngineerBeaverton, ORAs a member of our physical design team, you will perform various types of physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield, and lithography) at the chip and block level. As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC).
Senior Physical Verification CAD Engineer Microsoft CorpSenior Physical Verification CAD EngineerHillsboro, OR$119,800–$234,700 / yearThere is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200.00 - $261,000.00 per year. Partner closely with Physical Design teams to: Enable early PV runs o Debug complex DRC/LVS/ERC/PERC issues o Identify systemic design or flow gaps and drive fixes to closure.
Physical Verification Engineer Intel CorpPhysical Verification EngineerHillsboro, OR$128,880–$245,160 / yearBusiness group: The Central Engineering Group (CEG) is Intel''s data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain.
NewFunctional Verification Application Engineer Siemens AGFunctional Verification Application EngineerWilsonville, OR$125,300–$250,600 / yearExperience level Experienced Professional Job type Full-time Work mode Hybrid (Remote/Office) Employment type Permanent Location(s) Wilsonville - Oregon - United States of America Siemens EDA is a global technology leader in Electronic Design Automation software. This role builds relationships with individual contributors and first‑line managers, assesses customer needs, and supports the development of impactful sales campaigns in partnership with account teams.
Engineering Manager - Product Verification BiampEngineering Manager - Product VerificationBeaverton, OregonAs we grow to meet our customers’ needs and evolve to address the challenges of tomorrow, one guiding principle remains the same: Biamp connects people through extraordinary audiovisual experiences. Key Competencies: Strategic thinking, people leadership, cross-cultural communication, results orientation, data-driven decision making, and process development.
Validation / Verification Eng, Sr Manager-17415 Synopsys IncValidation / Verification Eng, Sr Manager-17415Hillsboro, ORYou know that the gap between a design that works on paper and one that ships is filled with late nights debugging signal integrity issues, hunting down noise sources, and figuring out why the eye diagram looks nothing like it should. You explain circuit behavior and test results clearly to both technical and non-technical stakeholders, turning a messy set of waveforms into a two-sentence summary that a program manager can actually use.
Senior SoC HW (PnP/Functional) Validation Engineer Microsoft CorpSenior SoC HW (PnP/Functional) Validation EngineerHillsboro, ORRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. To achieve this goal, the post silicon validation team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.
Principal Engineer, Digital IC Design and Architecture Analog Devices IncPrincipal Engineer, Digital IC Design and ArchitectureBeaverton, OR$157,080–$227,460 / yearADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. Responsibilities: Digital Architecture and Design: Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabit‑speed serial interfaces and video and data routing solutions.
Test Development Engineer Milegon LLCTest Development EngineerCanby, ORPart timeThe Test Development Engineer collaborates with customer engineering teams, internal test engineers, manufacturing, and quality teams to ensure products are designed for testability and manufacturing test solutions are successfully implemented for production. This position is based in Canby, Oregon and works closely with our Test Engineering teams located in Milwaukee, Wisconsin and Tecate, Mexico to support new product introductions and production test readiness across multiple manufacturing sites.
Optical Test Engineer Teledyne Technologies IncOptical Test EngineerWilsonville, OROur products include advanced surveillance sensors, unmanned air and ground vehicles, sensing devices used to detect chemicals, biological agents, radiation and explosives, and a host of other solutions that help warfighters, first responders, and search-and-rescue teams do their jobs better. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.
NewQuality & Reliability Test Engineer Teledyne Technologies IncQuality & Reliability Test EngineerWilsonville, OROur products include advanced surveillance sensors, unmanned air and ground vehicles, sensing devices used to detect chemicals, biological agents, radiation and explosives, and a host of other solutions that help warfighters, first responders, and search-and-rescue teams do their jobs better. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.
DDR Design Engineer Apple IncDDR Design EngineerBeaverton, ORAs a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple's customers every single day. Responsibilities will include driving functional and code coverage as well as timing closure for your designs and supporting silicon bring-up, performance and power characterization.
Product Test Engineer Lattice Semiconductor CorpProduct Test EngineerHillsboro, ORRequired Skills• BS degree (Electrical, Electronics or Computer Engineering) with 8 years of industry experience, or• MS degree (Electrical, Electronics or Computer Engineering) with 6 years of industry experience• Good working knowledge of semiconductor devices and test methodologies• Experience in ATE test program development, integration and debug on Nextest Magnum, Advantest T2K or Teradyne UltraFLEX preferred.• Experience in IC characterization and/or failure analysis using various bench tools (i.e. Oscilloscope, Pattern Generators, Data Timing Generator, Multimeters, etc)• Experience with WAT/etest, wafer sort, package assembly, final test (i.e. full backend IC process)• Experience in Programmable Logic is desired• Experience in RTL Design, Design Verification an advantage• Knowledge in test, DFT methodologies (ie.
Senior Test Engineer Microsoft CorpSenior Test EngineerHillsboro, OR$119,800–$234,700 / yearRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. To achieve this goal, the Silicon Manufacturing and Product Engineering team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware.
Test Engineer MindlanceTest EngineerTualatin, ORAnalyze and address product rejections during production or customer returns, ensuring comprehensive database updates and qualification plan preparation for product evolution. As an Electronics Hardware Test Engineer, you will be involved in a wide range of activities encompassing digital and analog electronic hardware.
Test Development Engineer Milwaukee ElectronicsTest Development EngineerCanby, OregonThe Test Development Engineer collaborates with customer engineering teams, internal test engineers, manufacturing, and quality teams to ensure products are designed for testability and manufacturing test solutions are successfully implemented for production. This position is based in Canby, Oregon and works closely with our Test Engineering teams located in Milwaukee, Wisconsin and Tecate, Mexico to support new product introductions and production test readiness across multiple manufacturing sites.
Test Engineer HMI ECU Daimler Trucks North America LLCTest Engineer HMI ECUPortland, OROur evolving brand portfolio is second to none, including Freightliner Trucks, Western Star, Demand Detroit, Thomas Built Buses, Freightliner Custom Chassis, and Financial Services. By listening to the needs of today, were building to solve with cutting-edge solutions in sustainability and future driving technology across electric, hydrogen and autonomous.
Principal Embedded Software Engineer SigSauerPrincipal Embedded Software EngineerTualatin, ORPart timeDefine and drive the strategy for evaluating third-party tools and external development partnerships, guiding teams in the creation of scalable, high-performance software solutions that align with the organization’s long-term vision and objectives, while ensuring cost-effectiveness and budget adherence. Advanced knowledge of communication protocols, debugging tools, and development environments such as VS Code, along with mastery of Git for version control, collaboration, driving technical innovation, and influence of software development strategies across projects.
NewProduct Engineer - Tessent DFT Siemens AGProduct Engineer - Tessent DFTWilsonville, OR$90,000–$162,000 / yearTessent is the market and technology leader of automated tools for insertion of semiconductor design-for-test (DFT) structures, automatic test pattern generation (ATPG), embedded deterministic compression (EDT), memory built-in self-test (MBIST), logic built-in self-test (LBIST), diagnosis-driven yield analysis (DDYA), hierarchical DFT solutions such as Streaming Scan Network (SSN), and analog fault injection and test. Experience level Experienced Professional Job type Full-time Work mode Hybrid (Remote/Office) Employment type Permanent Location(s) Santa Clara - California - United States of America Wilsonville - Oregon - United States of America Company: Siemens EDAJob Title: Product Engineer - Tessent DFTJob Reference #: 514029Job Location: Wilsonville, OR, Remote - USSiemens EDA is a global technology leader in Electronic Design Automation software.
NewSenior Silicon Engineer Microsoft CorpSenior Silicon EngineerHillsboro, OR$119,800–$234,700 / yearRequired Qualifications: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
Analog/Mixed-Signal Design Engineer, Principal Marvell Technology IncAnalog/Mixed-Signal Design Engineer, PrincipalHillsboro, ORExperience with architecture, design, and production expertise in the following areas: High-speed analog architectures and circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs, TIA, Modulator drivers etc. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones.
Sr. Electrical Engineer SigSauerSr. Electrical EngineerTualatin, ORPart timeDrive manufacturability and cost optimization across electrical systems by resolving complex DFM challenges, engaging with vendors, and guiding design strategy to meet production and cost targets. Today, SIG SAUER is synonymous with industry-leading quality and innovation which has made it the brand of choice amongst the U.S. Military, the global defense community, law enforcement, competitive shooters, hunters, and responsible citizens.
Senior CPU Design Engineer NVIDIASenior CPU Design EngineerHillsboro, OregonThis position offers you the opportunity to have a real impact in a dynamic, technology-focused company, designing for product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Support hardware engineering activities including chip floor plan, power/clock distribution, chip assembly, timing closure, power and noise analysis, and back-end verification.