Design verification engineer RD solutionsDesign verification engineerSan Jose, CAFull timemost critical and large-scale challenges across the aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor industries. meaningful work and be part of an organization that truly believes when you win, we all win, and when you fail, we all learn, then we’re eager to hear from you.
Verification Engineer III (Prototype) BC ForwardVerification Engineer III (Prototype)Sunnyvale, CAFull timeThe ideal candidate will have strong experience in electrical system-level verification, test infrastructure development, and test automation and a proven ability to define verification requirements, execute comprehensive test plans, and communicate results to stakeholders . With delivery centers and offices across North America and India, we take pride in building long-term relationships and delivering excellence through innovation, collaboration, and integrity.
NewEmbedded Software Test Engineer ComriseEmbedded Software Test EngineerSan Jose, CA$65–$72 / hourTemporaryContractorFull timeIn this role, you'll develop comprehensive test strategies, execute manual and automated testing, identify and troubleshoot defects, and collaborate closely with cross-functional engineering and quality teams to ensure the delivery of high-quality products in a regulated environment. We are seeking an experienced Embedded Software Test Engineer to support the verification and validation of embedded software, firmware, and hardware-integrated products for a leading medical technology organization.
NewMechanical Design Engineer - Commercial HVAC JobotMechanical Design Engineer - Commercial HVACAlameda, CA$55–$75 / hourInformation collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at jobot.com/legal. Field Integration: Provide support during construction with activities like submittal reviews, resolving RFIs, and participating in site assessments to ensure smooth project execution.
Sr. Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning Annapurna Labs (U.S.) Inc.Sr. Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine LearningCupertino, CAAs a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of Hardware in our data centers including technologies such as AWS Inferentia which is a machine learning inference product designed to deliver high performance at low cost. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services.
NewSupplier Quality Engineer JobotSupplier Quality EngineerStockton, CA$70,000–$115,000 / yearJob Details: You'll own supplier quality for purchased products and services that feed flight hardware programs, partnering closely with Purchasing and Program Engineering to develop suppliers, manage risk, and drive continuous improvement across the supply base. Information collected and processed as part of your Jobot candidate profile, and any job applications, resumes, or other information you choose to submit is subject to Jobot's Privacy Policy, as well as the Jobot California Worker Privacy Notice and Jobot Notice Regarding Automated Employment Decision Tools which are available at jobot.com/legal.
NewRailway Engineer - Remote Teoresi GroupRailway Engineer - RemoteSan Jose, CARemoteIntegration of onboard and wayside subsystems, including signaling components, sensors, communication interfaces, and control units, into system-level testing environments (e.g., HIL/SIL). At Teoresi, we specialize in supporting companies in creating projects using cutting-edge technologies such as self-driving cars and nanotechnology for the medical field.
Physical Design Engineer Einfochips (An Arrow electronics company)Physical Design EngineerSan Jose, CA$110,000–$130,000 / yearContractorFull timeContribute to the refinement of other implementation and physical design methodologies, encompassing synthesis, place and route (PnR), electromigration and IR (EMIR), power delivery network (PDN), and logical equivalence checking (LEC). Work closely with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues across your blocks.
NewPython Test Automation Engineer EPAM SystemsPython Test Automation EngineerCupertino, CAYou will design cutting-edge robotic automation systems, build robust test frameworks, and drive quality across every layer of complex, large-scale product development. • Collaborate with hardware, firmware, and software teams to diagnose and resolve system-level issues across all layers of product development.
Test Engineer III Pinnacle Technical ResourcesTest Engineer IIICupertino,, California$65–$70 / hourContractorThe specific compensation for this position will be determined by a number of factors, including the scope, complexity and location of the role as well as the cost of labor in the market; the skills, education, training, credentials and experience of the candidate; and other conditions of employment. Successfully placed or hired candidates would only be asked for banking details after accepting an offer from us during our official onboarding processes as part of payroll setup.
NewFPGA Design & Verification Engineer (UVM)– (Hybrid – Sunnyvale, CA) Stage 4 Solutions IncFPGA Design & Verification Engineer (UVM)– (Hybrid – Sunnyvale, CA)Sunnyvale, CA$100–$125In this role, you will design, verify, and integrate ASIC/FPGA solutions for high-speed digital and DSP applications using UVM-based verification methodologies, while supporting System-on-Chip (SoC) development, FPGA platforms, automation scripting, and cross-functional collaboration to deliver complex, high-performance systems. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts.
NewSenior Design Verification Engineer Hewlett Packard EnterpriseSenior Design Verification EngineerSunnyvale, CaliforniaPlease note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world.
Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpDesign Verification Engineer Silicon EngineeringPalo Alto, CA$135,000–$155,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
NewSenior ASIC Design Verification Engineer, Silicon Google LLCSenior ASIC Design Verification Engineer, SiliconMountain View, CAAct as a key liaison, interacting with multiple subsystem design and verification leads to understand unique requirements, engage in architectural discussions, and provide customizable verification solutions that bridge different subsystems. Create and execute scalable testplans and coverage models designed to track, manage, and close requirements across multiple versions and iterations of the design.
ASIC Formal Verification Engineer, TPU Compute Google LLCASIC Formal Verification Engineer, TPU ComputeSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing with key teams working on the development of our TPUs Vertex AI for Google Cloud Google Global Networking Data Center operations systems research and much more. Careers Skip navigation links home Home work_outlinework_outline Jobs noogler_hat Students google How we work handyman How we hire person_outline Your career help_outline Help link feedback Send feedback more_vert Help Send Feedback Sign in.
Multimedia Design Verification Engineer, Silicon Google LLCMultimedia Design Verification Engineer, SiliconMountain View, CAPlan the verification of multimedia design blocks at subsystem level by understanding the design specification, and interacting with architecture and design engineers to identify important verification scenarios. Work with designers, architects, and other stakeholders to come up with detailed test plans, dependencies, and deliverables, while representing DV status throughout the development process.
CPU Design Verification Engineer Google LLCCPU Design Verification EngineerMountain View, CAGoogle is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. Minimum qualifications: Bachelor"s degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
ASIC Design Verification Engineer, TPU Compute Google LLCASIC Design Verification Engineer, TPU ComputeSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
ASIC Design Verification Engineer, Platforms and Devices Google LLCASIC Design Verification Engineer, Platforms and DevicesMountain View, CAExperience with architectural background in one or more of the following: caches hierarchies, coherency, memory consistency models, DDR/LPDDR, PCIe, packet processors, security, clock, and power controllers. You will also work on developing high performance VIPs for protocols supported by our SOCs and closely collaborate on the deployment of the verification stack across a heterogeneous set of IPs.
Design Verification Engineer, TPU Cloud Compute Google LLCDesign Verification Engineer, TPU Cloud ComputeSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
Sr. ASIC Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpSr. ASIC Design Verification Engineer Silicon EngineeringPalo Alto, CA$175,000–$280,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Principal Design Verification Engineer Silicon Engineering Space Exploration Technologies CorpPrincipal Design Verification Engineer Silicon EngineeringSunnyvale, CA$210,000–$310,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Design Verification Engineer BaiduDesign Verification EngineerSunnyvale, CaliforniaYou will help on UVM Testbench development, directed/constrained random test generation, failure analysis and resolution, coverage analysis, and flow development. Work closely with the design and systems engineering teams to review specifications and architecture, extract features, define verification plan & coverage model.
Senior Design Verification Engineer Google LLCSenior Design Verification EngineerMountain View, CAApplyshare linkCopy linkemailEmail a friendMinimum qualificationsBachelors degree in Electrical Engineering Computer Engineering Computer Science a related field or equivalent practical experience.8 years of experience with verification methodologies and languages such as UVM and SystemVerilog. Experience with different verification techniques and methodologies including formal GLS UPF based Power simulations UVM and C based testing etc. to achieve bug-free Silicon in complex SoCs.
Verification Engineer - Aeromechanical (Design & Test) PivotalVerification Engineer - Aeromechanical (Design & Test)Palo Alto, CaliforniaDemonstrates a proactive safety mindset by embedding safety into daily operations, identifying and mitigating risks through assessments and training, encouraging open dialogue on safety concerns, and continuously improving protocols to ensure a safe work environment. Actively seeks and values diverse stakeholder perspectives, builds cross-functional relationships, and fosters trust through empathetic, fact-based communication—committing to shared decisions for the greater good.
Digital Verification Engineer - 1999764 Ethan Alexander GroupDigital Verification Engineer - 1999764Campbell, CaliforniaProficiency in verification test planning, test bench architecture, assertions, problem solving and debugging. Debug/triage automated regressions, run gate level simulations, and perform coverage analysis.
Senior Design Verification Engineer, Multimedia/AI/ML, Silicon Google LLCSenior Design Verification Engineer, Multimedia/AI/ML, SiliconMountain View, CAPlan the verification of multimedia design blocks at subsystem level by understanding the design specification, and interacting with architecture and design engineers to identify important verification scenarios. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement.
Staff ASIC Design Verification Engineer Google LLCStaff ASIC Design Verification EngineerSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing with key teams working on the development of our TPUs Vertex AI for Google Cloud Google Global Networking Data Center operations systems research and much more. Were the driving force behind Googles groundbreaking innovations empowering the development of our cutting-edge AI models delivering unparalleled computing power to global services and providing the essential platforms that enable developers to build the future.
NewSenior Design Verification Engineer, Silicon Google LLCSenior Design Verification Engineer, SiliconMountain View, CAExecute gate-level simulations (GLS) and Unified Power Format (UPF)-based power simulations, performing debugging to deliver high-performance and low-power hardware. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement.
NewPrincipal Design Verification Engineer Bright Vision TechnologiesPrincipal Design Verification EngineerSanta Clara, CAFull timeBright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations. As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology.
NewPrincipal Design Verification Engineer Microsoft CorpPrincipal Design Verification EngineerMountain View, CA$142,800–$274,800 / yearThe AI Silicon Engineering (AISiE) SoC Design Verification team is seeking passionate, driven, and intellectually curious silicon verification engineers who can work with cross-discipline teams (including systems, firmware, architecture, design, validation, and product engineering) to develop environment and test cases to verify Microsoft's latest AI accelerators. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Design verification Engineer ApolisDesign verification EngineerSan Jose, CA$65–$70 / hourA bachelor’s degree in electrical or computer engineering, accompanied by a minimum of 8 years of experience in ASIC or a related field, or a Master's Degree in Electrical or Computer Engineering with at least 8 years of experience in ASIC or a related discipline. Key Skill: SV/UVM, AXI expertise, NOC/Crossbar, Performance.
Sr. Design Verification Engineer Credo Semiconductor, Inc.Sr. Design Verification EngineerSan Jose, CA$130,000–$160,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. You'll develop and execute verification plans, build scalable reusable testbenches, write SV-UVM sequences, debug issues, and collaborate closely with RTL designers and firmware/application engineering teams.
Integration and Verification Engineer, Turbogenerator Archer Aviation IncIntegration and Verification Engineer, TurbogeneratorSan Jose, CA$172,000–$216,000 / yearOur sights are set high and our problems are hard, and we believe that diversity in the workplace is what makes us smarter, drives better insights, and will ultimately lift us all to success. Archer is an aerospace company based in San Jose, California building an all-electric vertical takeoff and landing aircraft with a mission to advance the benefits of sustainable air mobility.
NewDesign Verification Engineer indie Semiconductor, Inc.Design Verification EngineerSan Jose, CAIf you''re passionate about groundbreaking technology and want to make a real impact alongside a fast-paced team that thrives on creativity and collaboration, we'd love to have you on board! As a Design Verification Engineer, you will be responsible for developing and executing comprehensive verification strategies for next-generation automotive camera video and vision processors.
Sr. Full Chip Physical Verification Engineer Silicon Engineering Space Exploration Technologies CorpSr. Full Chip Physical Verification Engineer Silicon EngineeringSunnyvale, CA$175,000–$280,000 / yearPREFERRED SKILLS AND EXPERIENCE: Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Senior Design Verification Engineer MicronSenior Design Verification EngineerSan Jose, CaliforniaFraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
ASIC Design Verification Engineer (Santa Clara, CA) Qualcomm IncASIC Design Verification Engineer (Santa Clara, CA)Santa Clara, CA$126,700–$190,100 / yearThe responsibility of the position involves comprehensive pre-silicon test planning for digital power IP''s, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives.
FPGA Design/Verification Engineer The Structures Company, LLCFPGA Design/Verification EngineerSunnyvale, CAAs trusted partners to major aerospace OEMs and Tier 1 suppliers, we connect professionals with opportunities to grow and excel in the aviation and aerospace industries. The Structures Company is a premier national aerospace and defense staffing agency specializing in contract, contract-to-hire, and direct hire placements.
NewStaff GPU Performance Verification Engineer Samsung SemiconductorStaff GPU Performance Verification EngineerSan Jose, CASamsung Semiconductor in San Jose seeks a Staff GPU Graphics Core Performance Verification Engineer to lead performance verification for next-gen GPU designs. You will collaborate with diverse teams to ensure GPU designs meet performance expectations, while also mentoring engineers and contributing to innovative methodologies.
Senior Design Verification Engineer Altera SemiconductorSenior Design Verification EngineerSan Jose, CaliforniaAltera is responsible for High-Speed Protocol IP development, which includes participating in high-level product specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and debugging. As Lead DV Engineer focusing on IP Verification & Validation, you will be responsible for carrying out design validation for Altera next generation IP's across the Altera FPGA IP product portfolios.
NewASIC verification engineer Hewlett Packard EnterpriseASIC verification engineerSunnyvale, CaliforniaProvide technical expertise and leads project teams of Electronic and VLSI engineers and internal and outsourced development partners responsible for all stages of VLSI design and development for complex products, solutions, and platforms, including design, validation, and testing. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.
CPU Processor Performance Verification Engineer Apple IncCPU Processor Performance Verification EngineerSanta Clara, CAWork closely with OS and compiler teams on system and application performance tuningMinimum BS and 10+ years of relevant industry experience Performance modeling, processor verification, or RTL design experience Experience in digital logic design, CPU architecture, and microarchitecture Experience in developing performance test plans and writing/debugging assembly tests for performance correlation and verification Programming skills in assembly, C/C++, Verilog, System Verilog, or scriptingExperience in benchmark and workload analysis and CPU performance profiling Knowledge of compiler techniques and OS for performance optimization Knowledge in developing instruction profiling tools on silicon Experience in performance modeling for advanced CPU designs Experience in silicon validation Ability to work across teams to optimize silicon performance Should be a great teammate with excellent communication and presentation skills and able to work independently on the owned unit. As a CPU Processor Performance Verification Engineer owning the verification of a certain area of performance features in a chip design, you will have responsibilities as follows: Work closely with architects and RTL designers on verifying the performance features of the design and correlating with performance models (both pre-silicon and post-silicon).
Verification Engineer Advanced Micro Devices, IncVerification EngineerSan Jose, CaliforniaAs a member of the front-end design/integration team, you will work closely with the architecture, IP design, PD teams, and product engineers to achieve first pass silicon success. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives.
IP Verification Engineer Advanced Micro Devices IncIP Verification EngineerSan Jose, CAProficient in IP level ASIC verification • Expert in Verilog, System Verilog, Object Oriented programming • Expert in developing UVM based verification frameworks and testbenches • Scripting and automation of verification processes and flows • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process • Good Computer Architecture, systems knowledge • Comfortable in python / perl and editing / maintaining scripts • Exposure to leadership or mentorship is an asset • Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out • Experience with PCIe, CXL, NVMe or ethernet protocols • Strong communication skills and the ability to work independently as well as in a cross-site team environment. • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified • Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases • Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers • Build the directed and random verification tests • Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality.
Senior Design Verification Engineer Pyramid Consulting, IncSenior Design Verification EngineerSan Jose, CA$150,000–$160,000 / yearAnalyze and debug simulation failures at the RTL and gate-level , including working with gate-level netlists and SDF timing simulations. By applying to our jobs you agree to receive calls, AI-generated calls, text messages, or emails from Pyramid Consulting, Inc. and its affiliates, and contracted partners.
ASIC Formal Verification Engineer, Google Cloud Google LLCASIC Formal Verification Engineer, Google CloudSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. You"ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Lead CPU Design Verification Engineer, Silicon Google LLCLead CPU Design Verification Engineer, SiliconMountain View, CAXNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Portland, OR, USA; Poughkeepsie, NY, USA; Austin, TX, USA; Mountain View, CA, USA. Preferred qualifications: Master"s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Verification Engineer â Silicon / Semiconductor Simple SolutionsVerification Engineer â Silicon / SemiconductorSanta Clara, Santa ClaraWe are seeking a Verification Engineer to join our silicon development team, responsible for ensuring the functional correctness and quality of complex ASIC/SoC designs. You will work closely with design, architecture, and validation teams to develop robust verification environments and drive coverage closure.
Design Verification Engineer - Machine Learning Accelerators Meta Platforms IncDesign Verification Engineer - Machine Learning AcceleratorsSunnyvale, CAWork with cross-functional leads, including product managers, systems architects, researchers, and software architects, to develop industry leading Machine Learning IP's optimized for Mixed Reality and Smart Devices and use-cases, defining verification methodologies for each of the different core IPs Define, track, and lead the execution of detailed test plans for the different modules and top levels Implement scalable test benches including checkers, reference models, assertions in System Verilog Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage Collaborate with cross-functional teams such as Design, Model, Emulation and Silicon validation teams towards ensuring design quality targets are met across pre- and post-Silicon product lifecycle Support hand-off and integration of developed subsystems/IP blocks into larger SOC environments Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry10+ years of hands-on experience in SystemVerilog/UVM methodology and C/C++ based verification 10+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments Track record of 'first-pass success' in ASIC development cycles Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience Masters in Electrical Engineering or Computer Science 5+ years of experience with Design verification/validation of machine learning applications and accelerators 5+ years of experience with Software/Hardware Co-design at firmware, ISA, and application level 5+ years of experience with low power design 5+ years of experience in verification of numerical compute based designs Experience with revision control systems like Mercurial(Hg), Git FPGA/emulation debug experienceMeta builds technologies that help people connect, find communities, and grow businesses. As a Design Verification Engineer at Meta's Reality Labs, you will work with a multidisciplinary group of researchers and engineers, and use your digital design and verifications skills to implement the testing infrastructure to validate new core IP implementations and contribute to development and optimization of state of the art machine learning algorithms.