UNKNOWN

FEED

EDUCATION AND EXPERIENCE • Bachelor's degree (B.S.) from four-year college or university in Mechanical Engineering with five or more years of related work experience, or Master’s degree preferred, or equivalent combination of education and experience. Working knowledge of statistical tools• Bias for action LANGUAGE SKILLS The ability to read, analyze, and interpret manufacturing drawings, repair specifications, test results, and technical journals.

TECO Westinghouse

Senior Mechanical Engineer, PE - Data Center

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This role provides a unique opportunity to innovate at the cutting edge of process technology, EDA tools, and PD flows through collaboration with RTL, synthesis, DFT, foundry, timing other cross functional teams to push the limits of physical design at scale. We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA's products – Datacenter AI, HPC, Networking, Robotics, Autonomous driving, gaming and more.

Visualize your future . . . We Do 
NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people and our technologies, support and fund industry research around the world, and consistently deliver high-quality products. NVIDIA's culture promotes and inspires a team of world-class employees to be at the top of their game. We've created an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow. . . today. We invite you to explore the opportunities available at NVIDIA to see what your future may hold.

NVIDIA

Senior Physical Design Methodology Engineer, Innovus Flows

At least five years of relevant, hands-on engineering experience, including direct engineering or testing experience with nuclear components or systems in nuclear power, reactor development, nuclear research, or the nuclear supply chain. Experience turning technical questions or incomplete requirements into repeatable test methods, functioning test setups, and interpretable results; background in design of experiments, root-cause analysis, uncertainty analysis, or reliability-focused testing.

Aalo Atomics

Senior Nuclear Test Engineer

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Potential project opportunities include PCB schematic capture, component placement, and board layout, FPGA design and verification, circuit simulation and analysis, or mechanical design work such as enclosures, thermal management, and manufacturability improvements. You will join one of our hardware design teams that build the controllers, I/O, and field devices behind DeltaV, our flagship distributed process control system used by leading chemical, life sciences, and energy companies around the world.

Emerson Electric Co.

Hardware Design Engineer Intern

OTHER

Minimum 3–5 years of experience designing, integrating, testing, and troubleshooting control or system software strategies for prototype hardware, preferably related to microfluidics, lab-on-a-chip, or precision automated laboratory systems. In this role, you will act as a lead in system integration, orchestrating technical deliverables between internal mechanical engineers and external electrical engineering subcontractors, and ensuring the entire instrument functions seamlessly as a unified platform.

Signature Science, LLC

Systems Integration & Controls Engineer

ExactHire

Experience Required: Chillers, Pumps, Cooling Towers, VFD's, AHU's, CRAC's, CRCU's, UPS's, PDU's, Batteries, Generators, Fuel Pumps and Fuel Storage, Switchgear, Utility Feeds, Transfer Switches, Process Piping, Fire Detection, Fire Suppression, BAS, and Leak Detection systems. This will include but not be limited to: scheduling maintenance windows in Change Management, participating in staff meetings, interfacing with key vendors and project management personnel, and keeping up with written communications within the Critical Environment Team.

JLL is a financial and professional services firm specializing in commercial real estate services and investment management. We create value for companies and institutions that invest in and use real estate. With 60,000 employees across 280 corporate offices worldwide, we serve the local, regional and global real estate needs of corporates and investors in more than 80 countries. Our integrated services offering is grounded in expertise in all property types, a deep understanding of real estate markets and capital markets, and is coordinated and consistent across geographies.

Critical Environments Operating Engineer

Lead installation, commissioning, and troubleshooting of new equipment on site, working hands-on alongside electricians and vendor field teams and performing installs yourself where qualified, while holding the line on safe work practices such as LOTO and NFPA 70E. Design the test site's electrical systems and equipment integrations, including DC and AC configurations, LV and MV interconnections, grounding, and protection, so the site stays safe, reconfigurable, and representative of TAR's off-grid plants.

Technology Solutions Engineer

The Electrical Failure Analysis Engineer works closely with Metrology Engineers, Supplier Quality Engineers, Manufacturing Engineering, Design Engineering, and Reliability teams to investigate electrical failures occurring during incoming inspection, manufacturing, system integration, qualification testing, and field operation. The Electrical Failure Analysis Engineer supports manufacturing and quality operations by leading electrical root cause analysis (RCA), failure characterization, and corrective action activities across server, rack, cable, connector, and electromechanical hardware platforms.

ZT Systems

Electrical Failure Analysis Engineer (GTX)

Staff Electrical Failure Analysis Engineer (Gtx)

Essential Responsibilities: Design and develop high-performance analog and mixed-signal CMOS circuits and reusable IP, including amplifiers, bias and reference circuits, regulators, data converters, oscillators, PLLs, clocking circuits, and drivers. Summary of Role: GlobalFoundries is seeking a Senior Analog Design Engineer to develop advanced analog and mixed-signal integrated circuits and reusable IP for emerging semiconductor applications, including cryogenic CMOS and quantum systems.

YEAR

GlobalFoundries Inc

Cryo CMOS Analog Design Engineer

Essential Responsibilities: Design and develop high-performance analog and mixed-signal CMOS circuits and reusable IP, including amplifiers, bias and reference circuits, regulators, data converters, oscillators, PLLs, clocking circuits, and drivers. Summary of Role: GlobalFoundries is seeking a Principal Analog Design Engineer to develop advanced analog and mixed-signal integrated circuits and reusable IP for emerging semiconductor applications, including cryogenic CMOS and quantum systems.

Quantum Analog IC Design Engineer

Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA. Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Google LLC

Senior CPU Design Verification Engineer, Silicon

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience 6+ years of experience as a Hardware Design Engineer for production silicon shipped in volume Experience in digital design Microarchitecture, RTL coding, SoC integration and micro-architecture development Demonstrated communication and collaboration skills Master's or PhD degree in Electrical Engineering, Computer Science or related areas Experience in CPU, NOC, Memory, Die-to-die and Peripheral Subsystems Experience with Synthesis, Timing Closure and Formal Verification Methodology Experienced in managing SOC-level boot flow, Silicon Debug architectures and PLL/sequencing clocks and resets within SOC architecturesMeta builds technologies that help people connect, find communities, and grow businesses. You will collaborate with world-class researchers and engineers to design, implement, and optimize low-power hardware accelerators, state-of-the-art SoCs, and custom silicon solutions that enable the next generation of innovative devices and hardware.

Meta Platforms Inc

ASIC Engineer, Design

We run mechanical, electrical, environmental, and abuse testing from component to full system, track how the fleet holds up in the field, root-cause the failures that matter, and feed fixes straight back to design. Design and run safety and abuse tests, including thermal runaway, battery and inverter short circuit, and full-voltage switch interruption.

Base Power Inc

Test Engineer, Abuse Engineering

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In this role, you will be responsible for validating Nuvoton’s embedded firmware and developing automated software and hardware testing systems for system‑level features on production platforms used by leading OEM customers. Collaborate closely with firmware engineers, FPGA engineers, and hardware teams to analyze issues and drive root‑cause resolution.

Nuvoton

Embedded Firmware Validation Engineer - Super I/O

Comeet

Commitment to continuous learning and willingness to work in a variety of technical areas as needed, to solve real problems and deliver business impact. Experience as a senior engineer or tech lead, providing impactful technical leadership for a team while fostering a healthy engineering culture.

Hired Recruiters

Senior Software Engineer

The Senior OT Network and Cybersecurity Engineer supports the design, integration, and operation of communication and control systems across utility scale renewable energy assets, including solar PV, battery storage, and hybrid plants. Define and deploy end to end communication networks, including industrial Ethernet (fiber/copper), layered OT network segmentation, and integration of secure connectivity platforms, data collectors, and industrial gateways.

SMA America

Senior OT Network and Cybersecurity Engineer, Solar and Storage

GreenHouseAPI

Our team is responsible for designing, prototyping, and launching Storage Systems at scale - cutting edge solutions that integrate Enphase's core technologies like IQ series microinverters, home energy ecosystem of EV chargers, combiners, and more that are best in the market to deliver complete solutions for our consumers. Work with cross function teams like SDVT (system design validation testing) engineers to test and troubleshoot prototype designs.

Enphase Energy

Senior Staff Engineer, Embedded Firmware

Work with TPMs on schedules and sign-off criteria Own DV for multiple complex IPs or subsystems from start to finish, all the way from verification planning through coverage closure and sign-off Define the strategy across IPs, including the mix of simulation (constrained-random, UVM), formal, assertions, emulation and FPGA prototyping, plus power-aware verification (UPF) Design reusable testbench architectures, verification IP and libraries that are shared across IPs, subsystems and SoC generations Drive regression management, automated triage, coverage analytics, and compute-efficient runs (simulation and emulation) so the team can sustain high throughput as the number of designs grows Spot verification-quality and productivity gaps across the org, lead initiatives that measurably improve quality and time-to-closure, and drive DV methodology improvements, including AI-assisted ones Root-cause failures down to specific lines of RTL, reference model or FW/SW, and propose the fixesBachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience 8+ years of hands-on verification experience with SystemVerilog, UVM and C/C++ at the IP, subsystem and SoC level Has led DV for complex IP or an SoC through tape-out, including owning sign-off Has defined and run verification plans, coverage strategies, and closure metrics (functional and code coverage) across multiple blocks or IPs Has built UVM verification environments from scratch and designed reusable verification components Deep experience in at least one of: formal verification, SystemVerilog Assertions (SVA), emulation/FPGA prototyping, or low-power (UPF) verification Strong scripting skills (Python, TCL, Perl, Shell) for building verification tools and flows Has led and mentored engineers and coordinated work across teams Has verified power-limited mobile, wearable or AR/VR System-on-Chips (SoCs) Has managed EDA vendors or contracted DV teams Has verified computer vision, imaging/ISP, DSP or ML accelerator designs Master's or PhD in EE/CE/CS Has rolled out methodology changes (formal, emulation, portable stimulus, ML/AI-assisted verification) across an org Has verified hardware against reference models written in C++ or Python, or co-simulated with firmware or software Has scaled DV infrastructure (regression farms, CI for hardware, coverage and triage dashboards) across multiple IPs or programsMeta builds technologies that help people connect, find communities, and grow businesses. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today-beyond the constraints of screens, the limits of distance, and even the rules of physics.

Design Verification Engineer - Accelerators

This person monitors fleet health through data, decides when to pull or swap hardware in the field, triages returned units, and-critically-tracks what is failing at what rate so the team has accurate, well-informed Pareto charts to drive design and supplier decisions. Fleet Health Monitoring: Build and read dashboards (Grafana, SQL/BigQuery, Python) to assess the health of the deployed hardware fleet and spot emerging reliability trends.

Power Engineer Jobs in Austin, TX

Senior Mechanical Engineer, PE - Data Center TECO Westinghouse

Senior Physical Design Methodology Engineer, Innovus Flows NVIDIA

Senior Nuclear Test Engineer Aalo Atomics

Hardware Design Engineer Intern Emerson Electric Co.

Systems Integration & Controls Engineer Signature Science, LLC

Critical Environments Operating Engineer JLL

Technology Solutions Engineer TAR

Electrical Failure Analysis Engineer (GTX) ZT Systems

Staff Electrical Failure Analysis Engineer (Gtx) ZT Systems

Cryo CMOS Analog Design Engineer GlobalFoundries Inc

Quantum Analog IC Design Engineer GlobalFoundries Inc

Senior CPU Design Verification Engineer, Silicon Google LLC

ASIC Engineer, Design Meta Platforms Inc

Test Engineer, Abuse Engineering Base Power Inc

Embedded Firmware Validation Engineer - Super I/O Nuvoton

Senior Software Engineer Hired Recruiters

Senior OT Network and Cybersecurity Engineer, Solar and Storage SMA America

Senior Staff Engineer, Embedded Firmware Enphase Energy

Design Verification Engineer - Accelerators Meta Platforms Inc

Field Reliability Engineer Base Power Inc

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