Experience in FPGA/ASIC development using VHDL or Verilog
· Experience in FPGA/ASIC verification using System Verilog
· Experience with integrating FPGA firmware on hardware
· Experience with FPGA Vendor Specific FPGA Implementation tools (Vivado/Quartus/Libero)
· Experience working in a Linux based development environment
Preferred Additional Skills:
· Experience with MatLab, Simulink or similar digital signal processing (DSP) modelling tools
· Experience in communication system signal processing theory and waveform design
· Experience with TCL or Python scripting languages
· Working knowledge and experience in implementation and testing of MODEM RF Designs
· Experience with Universal Verification Methodology (UVM)
· Working knowledge and experience with vendor specific FPGA verification tools (Mentor Questa, Visualizer)