Staff Frontend Engineer - Design Systems Verkada IncStaff Frontend Engineer - Design SystemsSan Mateo, CA$185,000–$265,000 / yearYou will act as the vital bridge between Design and Engineering, partnering closely with 8+ product teams to deliver a cohesive, accessible, and beautiful web experience that supports a suite of connected devices at scale. We've got serious momentum in the market: more than 30,000 customers (including 100+ of the Fortune 500), a $5.8B valuation, more than $1 billion in annualized bookings, and backing from CapitalG, Sequoia Capital, General Catalyst, Felicis Ventures, Next47 and more.
Design Engineer FirecrawlDesign EngineerSan Francisco, Utah$160,000–$240,000 / yearBackgrounds that often do well: Design engineers at developer tools companies, frontend engineers with strong design instincts, designers who code and ship their own work, or indie builders who've launched products end-to-end. In just a year, we've hit 8 figures in ARR and 100k+ GitHub stars by building the fastest way for developers to get LLM-ready data.
Design Engineer ReplitDesign EngineerFoster City, CAIn this role, you'll help shape our design system implementation, architect front-end solutions, and ensure seamless user experiences across our platform. With millions of users worldwide, Replit is democratizing software development by removing traditional barriers to application creation.
Principal Design Automation Engineer MicronPrincipal Design Automation EngineerSan Jose, CaliforniaDevelop and productize agentic enablement for circuit design , including AI/LLM-assisted flows that support: environment setup and self-healing configuration, guided simulation and debug, intelligent corner planning and coverage closure, automated schematic/layout checks and review assistance, documentation synthesis and knowledge retrieval from internal sources, block/subsystem/full-chip verification (analog/mixed-signal), including reproducible run recipes, golden reference management, and regression gating criteria. Proficiency in analog/mixed signal circuit design (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgap, IO buffers, RTL, Verilog).
Senior Design Engineer GitHub, Inc.Senior Design EngineerSan Francisco, California$177,200–$329,200 / year7+ years experience in front-end engineering or development OR Bachelor's Degree in Industrial Design, Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 5+ years experience in front-end engineering or development. OR Master's Degree in Industrial Design, Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 3+ years experience in front-end engineering or development.
Design Engineer, III GitHub, Inc.Design Engineer, IIISan Francisco, California$153,900–$285,900 / year5+ years experience in front-end engineering, development, or design OR Bachelor's Degree in Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 3+ years experience in frontend engineering, development, or design. OR Master's Degree in Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 1+ year(s) experience in frontend engineering or development.
Sr. Full Stack Engineer Xona Space SystemsSr. Full Stack EngineerBurlingame, CaliforniaFull-Stack Engineer to help design and build the platform serves as the primary interface for commanding spacecraft, monitoring real-time telemetry, and supporting flight operations across development, test, and on-orbit environments. With Pulsar – the world’s most advanced PNT satellite infrastructure in Low Earth Orbit – Xona will offer a future-proof, backwards-compatible global positioning system optimized for absolute precision, superior power, and robust protection.
Manager, Construction Space Exploration TechnologiesManager, ConstructionPalo Alto, CA$175,000–$220,000 / yearRESPONSIBILITIES: Manage a team of direct and indirect reports within the construction team, including but not limited to construction project engineers, MEP engineers, designers, architects, and other individuals supporting construction projects. You will have the opportunity to drive positive change and own projects from start to finish, with the goal of making the SpaceX international and domestic offices efficient and impactful, ultimately leading to making life multiplanetary.
Manager, Construction SpaceXManager, ConstructionPalo Alto, CA$175,000–$220,000 / yearManage a team of direct and indirect reports within the construction team, including but not limited to construction project engineers, MEP engineers, designers, architects, and other individuals supporting construction projects . You will have the opportunity to drive positive change and own projects from start to finish, with the goal of making the SpaceX international and domestic offices efficient and impactful, ultimately leading to making life multiplanetary.
UI Engineer - Full-Stack (React/TypeScript, Python) Guild.aiUI Engineer - Full-Stack (React/TypeScript, Python)San Francisco, CaliforniaIf you love deep frontend craft, enjoy raising the bar on code quality without gatekeeping who gets to write it, want full-stack range without carrying backend architecture solo, and care about how humans interact with autonomous systems - we want to talk. A big part of this role is partnering with them: helping them realize their design intent, reviewing and hardening what they ship, and bringing software engineering discipline — architecture, performance, testing, maintainability - to the frontend as it grows.
RTL Design Engineer Advanced Micro Devices IncRTL Design EngineerSan Jose, CAKEY RESPONSIBILITIES: RTL Design & Microarchitecture: Author detailed micro-architecture specifications and own complete Verilog RTL implementation of major IP blocks, ensuring compliance with PPA (Performance, Power, Area) targets and timing requirements. Full ASIC Development Lifecycle: Drive design from concept through production silicon across all phases: specification, RTL coding, lint/CDC checks, synthesis, timing analysis, verification, physical design integration, and post-silicon validation.
Staff Design Engineer GitHub, Inc.Staff Design EngineerSan Francisco, California$200,500–$372,300 / yearOR Bachelor's Degree in Industrial Design, Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 8+ years experience in front-end engineering or development. OR Master's Degree in Industrial Design, Industrial Design, Graphic Design, Art, Computer Science, Human Factors Engineering, Human Computer Interaction, Information Architecture, or related field AND 6+ years experience in front-end engineering or development.
Senior Software Engineer, SOC Design Methodology NvidiaSenior Software Engineer, SOC Design MethodologySanta Clara, CAWe are building a next-generation software platform for semiconductor development, applying innovative graph neural network infrastructure to process graphs at a trillion-edge scale. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.
Internship, Materials Engineering (Fall 2026) Tesla IncInternship, Materials Engineering (Fall 2026)Fremont, CA$20–$50 / hourSeeking candidates who have experience in developing, executing and interpreting results of Design of Experiments (DOE); familiar with Catia, SolidWorks, Inventor, and/or AutoCAD; and interested working with or developing functional/aesthetic finishing processes, including but not limited to: Automotive Paint and Powder Coating, Thin Film Coating (eg. You will work with other engineers in support of the design and develop technically complex processes for finishing/coating our products; which includes process development, specification and validation, establishing and optimization of critical process parameters, design for manufacturing, equipment specification and design, as well as installation and commissioning.
Senior Digital Design Engineer - High-Speed I/O And Photonics NvidiaSenior Digital Design Engineer - High-Speed I/O And PhotonicsSanta Clara, CAWe recently delivered the industry's first 200G MRM-based silicon photonics chip, revolutionizing high-performance networking and enabling the era of Co-Packaged Optics (CPO) for NVIDIA. What You'll Be Doing: While engaged in frontend development, your responsibilities will include working on a wide range of high-speed, powerful DSPs, silicon photonics IPs, and chips.
Senior Digital Design Engineer - High-Speed I/O and Photonics NVIDIA CorpSenior Digital Design Engineer - High-Speed I/O and PhotonicsSanta Clara, CAWe recently delivered the industry's first 200G MRM-based silicon photonics chip, revolutionizing high-performance networking and enabling the era of Co-Packaged Optics (CPO) for NVIDIA. What You'll Be Doing: While engaged in frontend development, your responsibilities will include working on a wide range of high-speed, powerful DSPs, silicon photonics IPs, and chips.
Memory Subsystem Architect and Design Engineer Advanced Micro Devices, IncMemory Subsystem Architect and Design EngineerSanta Clara, CaliforniaYou will work closely with ASIC architects to evaluate and select memory controller IP/vendors, collaborate with silicon IP providers to optimize controller configurations, and partner with board designers to establish robust PCB trace design guidelines. At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems.
Staff Research Data Scientist, AI Data Intelligence Google LLCStaff Research Data Scientist, AI Data IntelligenceMountain View, CAPreferred qualifications: 10 years of experience using analytics to solve product or business problems, coding (e.g., Python, R, SQL), querying databases or statistical analysis, or 8 years of experience with a PhD degree. 8 years of experience using analytics to solve product or business problems, coding (e.g., Python, R, SQL), querying databases or statistical analysis, or 6 years of experience with a PhD degree.
Design Automation Engineer (Tfm/Eda) Intel Corp.Design Automation Engineer (Tfm/Eda)Santa Clara, CA$117,620–$227,270 / yearAbout This Role: This role encompasses installation, maintenance, and technical support of design environment (automation scripts, front-end and back-end design tools, flows, processes, and licenses) as well as compute environment (storage, compute, netbatch, ION, etc.). If you're a seasoned Silicon Design Automation Engineer with proficiency in Design TFM (Tools, Flows, Methodology) and EDA tools support for Intel's PDK (Process Development Kit) for external Foundry customers, we want you on our team.
Senior Circuit Design Engineer NVIDIA CorpSenior Circuit Design EngineerSanta Clara, CAMore recently, GPU deep learning ignited modern AI - the next era of computing - with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIAs invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing.
Principal, Design Verification Engineer, UAL and PCIe Subsystems Veracity Software IncPrincipal, Design Verification Engineer, UAL and PCIe SubsystemsSanta Clara, CAFull Name: Degree (BS/MS/PhD) – Major, University & Completion Year: Total ASIC/SoC Design Verification Experience (Years): Experience with SystemVerilog (Years – details): Experience with UVM (Years – details): Experience writing Verification Test Plans (Yes/No – details): Experience building Constrained Random Verification Environments (Yes/No – details): Experience with Coverage-Driven Verification (Yes/No – details): Experience with Python and/or Perl Scripting (Years – details): Experience using EDA Verification Tools (Specify tools): Experience with Object-Oriented Programming (Yes/No – details): Linux Experience (Years – details): C++ Programming Experience (Years – details): ARM Assembly Experience (Yes/No – details): Experience with UAL Protocol (Yes/No – details): Experience with PCIe Protocol (Years – details): Experience verifying Multi-Core SoCs (Yes/No – details): Experience with Boot Code Verification (Yes/No – details): Motivation / Reason for interest in this position: Contact Number: Email ID: LinkedIn Profile URL: Full Address (Street, City, State, Zip Code): Notice Period: Current Work Authorization Status: Expected Salary: Are you able to relocate on your own expenses and work Santa Clara, CA – Onsite ?. This role involves creating sophisticated verification methodologies, writing comprehensive verification plans, developing constrained-random verification environments, debugging complex hardware issues, and collaborating closely with design engineers to ensure robust silicon validation.
Design Verification Engineer, Principal Veracity Software IncDesign Verification Engineer, PrincipalSanta Clara, CAFull Name: Degree (BS/MS/PhD) – Major, University & Completion Year: Total Design Verification Experience (Years): Total SoC Verification Experience (Years): Experience leading Design Verification implementation and tape-out of complex SoCs (Yes/No – details): SystemVerilog Experience (Years – details): UVM Experience (Years – details): Experience writing detailed Verification Test Plans (Yes/No – details): Experience building Constrained Random Verification Environments (Yes/No – details): Experience with Coverage-Driven Verification & Coverage Closure (Yes/No – details): Experience with Python and/or Perl Scripting (Years – details): Experience using EDA Verification Tools (Specify tools): Experience with Object-Oriented Programming/Design (Yes/No – details): Linux Experience (Years – details): C++ Programming Experience (Years – details): ARM Assembly Experience (Yes/No – details): Experience with Multi-Core SoC Verification and Boot Code Verification (Yes/No – details): Experience leading verification teams or project-level verification activities (Yes/No – details): Understanding of Networking Protocols (Ethernet, TCP/IP, Switching, etc.) (Yes/No – details): Motivation / Reason for interest in this position: Contact Number: Email ID: LinkedIn Profile URL: Full Address (Street, City, State, Zip Code): Notice Period: Current Work Authorization Status: Expected Salary: Are you able to relocate on your own expenses and work Santa Clara, CA - Onsite?. · BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).
NewEnterprise Systems Engineer JUUL Labs IncEnterprise Systems EngineerSan Francisco, CA$165,000–$206,000 / yearDevelop and maintain AI-augmented workflows within the Juul Labs ecosystem, utilizing Claude and Gemini to build intelligent agents that assist in compliance monitoring and cross-system data reconciliation. Lead Workday and ERP implementations using AI-augmented methodologies - from requirements extraction and gap analysis through UAT script generation, training material creation, and post go-live support.
Engineer II Ross Stores IncEngineer IIDublin, CARemote$113,200–$195,000 / yearGENERAL PURPOSE: The Engineer II role focuses on designing, developing, and supporting modern full-stack applications using Angular for responsive user interfaces and Spring Boot for scalable, high-performing backend services. PREFERRED: Experience developing or integrating AI-enabled application capabilities using Azure OpenAI, LangChain, LangGraph, Semantic Kernel, AI agents, Retrieval-Augmented Generation (RAG), vector databases, or similar generative AI technologies.
Product Engineer, Frontend AmpersandProduct Engineer, FrontendSan Francisco, CaliforniaOur declarative platform, 150+ open-source connectors, and embeddable UI components give developers the building blocks they need to ship deep, bidirectional integrations. We've raised Series A funding from top-tier investors known for their early-stage bets on generational companies like Anthropic, Apple, Twilio, Supabase, and Vercel.
Senior Staff Signal Integrity Engineer Advanced Micro Devices IncSenior Staff Signal Integrity EngineerSan Jose, CAThis role involves analyzing, modeling and validating the complex interconnects of high-speed Serializer/De-serializer (SerDes) channels @56/64/112/128/224+ Gbps, High speed memories like LPDDR4/5x/6, DDR5, PCIe Gen 5/6 etc., and 400/800/1600Gbps Ethernet links. THE PERSON: In this role, you will closely collaborate with Board HW designers, HW architects, IC packaging team, PCB team, and external partners/suppliers to ensure first time success of the system/board products.
Senior Software Engineer, Platform Fullstack AirbyteSenior Software Engineer, Platform FullstackSan Francisco, CaliforniaWe create the infrastructure, internal tooling, developer platforms, and user-facing product surfaces that allow engineers to build quickly, deploy safely, and operate reliably at scale. As a Senior Fullstack Engineer on Platform, you'll work across the full stack to build both the internal tools that accelerate engineering and the user-facing features that customers interact with directly.
Principal, Design Engineer (SJ2) Celestica IncPrincipal, Design Engineer (SJ2)San Jose, CA$150,000–$216,000 / yearAs a leader in design, manufacturing, hardware platform and supply chain solutions, Celestica brings global expertise and insight at every stage of product development - from drawing board to full-scale production and after-market services for products from advanced medical devices, to highly engineered aviation systems, to next-generation hardware platform solutions for the Cloud. Data Architecture: Strong knowledge of data normalization, structuring unstructured data, and database management (specifically vector databases like Pinecone or Milvus).
Founding Design Engineer Jinba.ioFounding Design EngineerSan Francisco, CaliforniaYou'll build our design system from the ground up, create motion that makes complex workflows feel intuitive, and ship production code alongside the engineering team. Unlike traditional no-code tools that bolt a chat agent onto their interface, Jinba is built as a native vibe coding platform from the ground up.
Principal Mixed Signal RTL Design Engineer TYLsemiPrincipal Mixed Signal RTL Design EngineerSan Jose, CaliforniaDesign and implement supporting digital blocks: ADC interface, DPWM (digital PWM), Collaborate closely with analog designers on loop compensation, sensor design, quantization effects, and delay budgeting. Prior experience designing digital controllers for integrated voltage regulators (IVRs) , point-of-load (PoL) converters, or high-current AI/HPC power delivery.
Staff Software Engineer, Color Cloud Madison Reed IncStaff Software Engineer, Color CloudSan Francisco, CAWorking in a cross-functional, agile, ai-first environment, the engineer collaborates with teammates, product owners, designers, store operations, and stakeholders to ship reliable, fast, premium tools for the people serving our guests face-to-face. Experience building or operating the AI/LLM infrastructure that other engineering teams build on (agent frameworks, eval pipelines, retrieval/RAG, prompt and tool-call tooling).
ASIC Verification Engineer - New College Grad 2026 NVIDIA CorpASIC Verification Engineer - New College Grad 2026Santa Clara, CAThis position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you'll be doing: Verifying the ASIC design, architecture, golden models and micro-architecture of GPU and SoC units using Emulation and Prototyping platforms.
CAD Engineer NvidiaCAD EngineerSanta Clara, CAPerform expert debug of design errors to direct expeditious resolution: explaining user errors to designers; explaining techfile errors to the foundry support team, and explaining tool errors to EDA partners. You would be responsible for supporting and maintaining CAD tools used by IC designers including Virtuoso, IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools.
Senior ICV CAD Engineer NvidiaSenior ICV CAD EngineerSanta Clara, CAPerform expert debug of design errors to direct expeditious resolution: explaining user errors to designers; explaining techfile errors to the foundry support team, and explaining tool errors to EDA partners. You would be responsible for supporting and maintaining CAD tools used by IC designers including Virtuoso, IC-Manage, DRC/LVS verification tools, extractions, and spice simulation tools.
Embedded Hardware & Firmware Engineer ITWEmbedded Hardware & Firmware EngineerAlameda, CaliforniaThis role is responsible for the design, development, integration, and validation of advanced electronics and embedded systems used in semiconductor manufacturing, scientific instrumentation, industrial automation, and precision control applications. Background in ionization, electrostatic discharge (ESD) control, plasma, high-voltage, semiconductor process control, vacuum systems, or precision instrumentation is beneficial for this role.
Asic Verification Engineer - New College Grad 2026 NvidiaAsic Verification Engineer - New College Grad 2026Santa Clara, CAThis position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. What you'll be doing: Verifying the ASIC design, architecture, golden models and micro-architecture of GPU and SoC units using Emulation and Prototyping platforms.
Embedded Hardware & Firmware Engineer Illinois Tool Works IncEmbedded Hardware & Firmware EngineerAlameda, CA$110,000–$150,000 / yearThis role is responsible for the design, development, integration, and validation of advanced electronics and embedded systems used in semiconductor manufacturing, scientific instrumentation, industrial automation, and precision control applications. Background in ionization, electrostatic discharge (ESD) control, plasma, high-voltage, semiconductor process control, vacuum systems, or precision instrumentation is beneficial for this role.
ML Engineer - Personalization & Recommendation Systems KreaML Engineer - Personalization & Recommendation SystemsSan Francisco, CaliforniaCollaborate closely with product, design, and research to define what “good personalization” means in a creative context. We're dedicated to making AI intuitive and controllable for creatives - our mission is to build tools that empower human creativity, not replace it.
Full-Stack Software Engineer 5 - Ecosystem and Operational Insights Netflix IncFull-Stack Software Engineer 5 - Ecosystem and Operational InsightsLos Gatos, CA$388,000–$558,000 / yearYou will excel if you are comfortable with the ambiguity that comes with innovation, can deliver scalable technical solutions, remove technical debt, make strategic decisions for long-term effectiveness, and approach problems with a curiosity-driven lens. Operate in a cross-functional and dynamic environment where you will collaborate and learn with stunning colleagues from a variety of technical domains and backgrounds to achieve the common goal of entertaining the world.
Software Engineer III, Infrastructure, Google Distributed Cloud Google LLCSoftware Engineer III, Infrastructure, Google Distributed CloudSunnyvale, CAWe"re looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. Our team is dedicated to revolutionizing Kubernetes networking experiences, providing connectivity and network performance for AI, retail, telecom, and enterprise customers on the GDC platform.
NewSoftware Engineer, GDC AI Applications and Agents Google LLCSoftware Engineer, GDC AI Applications and AgentsSunnyvale, CAWe"re looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. Our key objectives include delivering fully managed AI applications that meet critical customer needs, providing a robust and user-friendly Agent Platform, and driving the adoption of GDC for AI workloads beyond basic inference.
Applied AI Engineer, Silicon Engineering Etched.ai IncApplied AI Engineer, Silicon EngineeringSan Jose, CAYou do not need to be a chip designer or a traditional software engineer - you need to be an exceptional problem solver who has shipped real agentic systems, works comfortably across stacks and domains, and uses AI to ramp on hard new problems fast. Build, deploy, and maintain LLM-agent workflows that accelerate chip development: debug triage, testbench and coverage work, log/waveform analysis, EDA script generation, and engineering knowledge retrieval.
Applied AI Engineer, Silicon Engineering EtchedApplied AI Engineer, Silicon EngineeringSan Jose, CaliforniaYou do not need to be a chip designer or a traditional software engineer — you need to be an exceptional problem solver who has shipped real agentic systems, works comfortably across stacks and domains, and uses AI to ramp on hard new problems fast. Build, deploy, and maintain LLM-agent workflows that accelerate chip development: debug triage, testbench and coverage work, log/waveform analysis, EDA script generation, and engineering knowledge retrieval.
Principal Media Streaming Engineer The Walt Disney CompanyPrincipal Media Streaming EngineerSan Francisco, New YorkAs a Principal Media Streaming Engineer at Disney, you will be part of the Media Delivery team, which is responsible for the entire video encoding supply chain from content acquisition to delivery, consisting of an agile and responsive team of engineers that design, build, and support the systems and workflows powering our on-demand video streaming products. Job Posting Segment: PE - Media Engineering Job Posting Primary Business: PE - Media Platform - Media Experience Primary Job Posting Category: Media Streaming Engineer Employment Type: Full time Primary City, State, Region, Postal Code: New York, NY, USA Alternate City, State, Region, Postal Code: Date Posted: 2026-04-07
Control Systems Engineer Lawrence Livermore National LaboratoryControl Systems EngineerLivermore, CA$146,340–$222,564 / yearFunction independently with minimal direction, taking significant responsibility and using advanced knowledge and judgment to establish objectives, prioritize parallel tasks, allocate resources, and collaborate in the development of innovative methods/technology to guide the completion of projects and contribute to the development of organizational goals. Advanced verbal and written communication skills with the ability to effectively prepare, present, and explain technical information, provide advice to senior management and external stakeholders, and collaborate with technical staff, managers, stakeholders, and vendors at all organizational levels.
Staff Front-end CAD Engineer, Silicon Google LLCStaff Front-end CAD Engineer, SiliconMountain View, CAApplyshare linkCopy linkemailEmail a friendinfo_outlineXNote By applying to this position you will have an opportunity to share your preferred working location from the following San Diego CA USA Mountain View CA USA.Minimum qualificationsBachelors degree in Computer Engineering or a related field or equivalent practical experience.10 years of experience in VLSI design software development front-end CAD or EDA tool development. ResponsibilitiesDevelop front-end CAD tools and flows for Google Silicon SoC projects in various domains RTL generation design verification AI-enabled CAD flows designIP quality assurance and release management design spec management internal CAD tool development etc.
(USA) Senior, Software Engineer Walmart Inc(USA) Senior, Software EngineerSunnyvale, CAOur team builds the Android experiences that power Walmart Marketplace's customer discovery journey, including Search, Browse, Item Pages, Seller Pages, and other pre-purchase experiences within the Walmart app. Option 1: Bachelor''s degree in computer science, computer engineering, computer information systems, software engineering, or related area and 3 years' experience in software engineering or related area.
Fullstack Engineer KreaFullstack EngineerSan Francisco, CaliforniaOptimize frontend performance: minimize render latency, profile UI with virtual DOM techniques, deliver seamless WebSocket image streams. Design interactive, responsive front-end experiences—drag-and-drop, real-time canvas polish, smooth and responsive UI animations.
Staff Software Engineer, Agentic Platform (West Coast) Docker IncStaff Software Engineer, Agentic Platform (West Coast)San Francisco, CARemoteCloud Platform Expertise (AWS/OCI/Azure/GCP): Proven, hands-on experience operating production services in AWS or Oracle Cloud Infrastructure compute, networking, managed services, IAM, and cost management. As AI agents redefine software development, Docker is at the center of that shift, providing the sandboxed environments, verified images, and secure infrastructure that make autonomous workflows trustworthy by default.
Senior Substrate Layout Design engineer Zp Group LlcSenior Substrate Layout Design engineerSan Jose, CA$215,000–$270,000 / yearKeywords: Substrate layout, substrate, package substrate design, multi-die packaging, chiplet integration, CoWoS, MCM, BGA, FPGA, CPU, GPU, High-density interconnect, escape routing, signal integrity, power integrity, organic substrate, substrate tape-out, substrate DRC, cadence allegro APD, autocad, cadence SiP layout, EDA tools, Layout verification tools, ASIC, OSAT, mechanical co-design, floorplanning, design reviews. Piper Companies is seeking a Senior Substrate Layout Designer who will be responsible for leading the design of advanced multi-die substrate packages.