IC Package Material Engineer Tesla IncIC Package Material EngineerPalo Alto, CA$160,000–$312,000 / yearBy creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life. Comprising brilliant engineers and visionaries, the team designs and develops advanced AI chips tailored to accelerate Tesla's machine learning capabilities.
RTL Design Engineer, Interconnect & Memory Systems Tesla IncRTL Design Engineer, Interconnect & Memory SystemsPalo Alto, CA$128,000–$414,000 / yearIn this role, you will focus on the critical data path elements of custom ASICs, including Network on Chip (NoC) architectures, DMA engines, memory controllers, Memory Management Units (MMUs), arbiters, and AXI protocol implementations. You will collaborate closely with system architects, verification engineers, physical design teams, and software/firmware developers to deliver high-performance, power-efficient designs that enable massive-scale AI training and inference.
Mechanical Design Engineer, Semi Charging Tesla IncMechanical Design Engineer, Semi ChargingPalo Alto, CA$109,600–$234,000 / yearThe Charging Hardware Mechanical Design team is looking for a highly skilled and motivated individual to take ownership over mechanical design of key sub-systems for our Semi Charging and Supercharging products. Modeling and design of mechanical components and assemblies including sheet metal, structural metals, high voltage distribution, plastics, environmental sealing materials, fasteners, and other components.
NewSenior Manager, Advanced Systems Engineering Intuitive Surgical IncSenior Manager, Advanced Systems EngineeringSunnyvale, CARepresent the portfolio to senior and executive leadership including technical progress, development health, program risks and mitigations, resourcing trade-offs, and key milestones in order to influence senior stakeholders on decisions of significance to the organization. Establish and assure adherence to budgets, schedules, resource plans, and top-level deliverables across a portfolio of parallel programs at differing stages of maturity, each built on a distinct energy-delivery architecture; continuously balance and re-prioritize resources across the group as a whole.
Senior Sales Engineer Mainspring Energy IncSenior Sales EngineerMenlo Park, CARemote$127,500–$150,000 / yearBacked by top-tier investors including Khosla Ventures, Bill Gates, American Electric Power, Lightrock, and General Catalyst Mainspring designs, manufactures and delivers its products to customers across the U.S. today, and we're quickly scaling for international expansion. As a member of the Sales Engineering team (a subset of Project Delivery), this role exercises independent technical judgment to develop cost-optimized, execution-ready solutions aligned with Mainspring's linear generator capabilities.
Systems Integration and Test Engineer Intern (Winter 2027) Peak EnergySystems Integration and Test Engineer Intern (Winter 2027)Burlingame, CaliforniaThis intern will support integration testing and functional verification of Peak Energy's energy storage systems, working across BMS, inverters, and other systems from batteries to power electronics. As Peak Energy scales its ESS testing infrastructure, this role helps build out the benchtop and HIL test capabilities needed to validate systems ahead of production.
Senior Optimization Engineer HitachiSenior Optimization EngineerSanta Clara, CaliforniaThis is your chance to join a team that is solving some of the most complex challenges in the energy industry—optimizing electricity markets, integrating renewables, and ensuring grid reliability in real time. Protected veterans and qualified individuals with a disability may request a reasonable accommodation if you are unable or limited in your ability to use or access the Hitachi Energy career site as a result of your disability.
Low Power Asic Engineer - New College Grad 2026 NvidiaLow Power Asic Engineer - New College Grad 2026Santa Clara, CAYou have an understanding of low power design techniques such as multi VT, Clock gating, Power gating, Block Activity Power, and Dynamic Voltage-Frequency Scaling (DVFS) etc. Come join NVIDIAs Low Power DV team to develop state of the art GPUs to power AI, Automotive, GeForce, and Mobile products.
Mechanical Design Engineer, Optimus & AC Charging Tesla IncMechanical Design Engineer, Optimus & AC ChargingPalo Alto, CA$109,600–$234,000 / yearModeling and design of mechanical components and assemblies including sheet metal, structural metals, high voltage distribution, plastics, environmental sealing materials, fasteners, and other components. The Charging Hardware Mechanical Design team is looking for a highly skilled and motivated individual to take ownership over mechanical design of key sub-systems for AC Charging and Optimus Robot Charging.
Software Engineer, Factory Software Tesla IncSoftware Engineer, Factory SoftwareFremont, CA$140,000–$210,000 / yearYou'll build scalable software systems that power the manufacturing of innovative products like vehicles, superchargers, and energy storage solutions as well as our next generation of products. Along with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire: Medical plans > plan options with $0 payroll deduction.
Forward Deployed Engineer (AI) NextpowerForward Deployed Engineer (AI)Fremont, CaliforniaThis individual will embed with teams across Finance, Human Resources, Supply Chain, Operations, Sales, Engineering, Advanced R&D, Customer Support, and other functional areas to understand their workflows and implement practical AI solutions that create measurable business value. This role is responsible for partnering directly with business functions across the organization to identify, design, build, and deploy AI-powered solutions that improve productivity, automate business processes, and accelerate decision-making.
Systems Validation Engineer NvidiaSystems Validation EngineerSanta Clara, CAWays to stand out from the crowd: Solid grasp of low-level system architecture, digital circuit design, and high-speed bus protocols (PCIe, USB, NVMe), with a clear understanding of how hardware integrates with firmware and software stacks. Strong capability to debug and root cause challenging system issues involving board-level failures, signal integrity, component-level problems, and firmware behavior.
Senior System Software Engineer, SoC Power and Performance - O-RAN Infrastructure NVIDIA CorpSenior System Software Engineer, SoC Power and Performance - O-RAN InfrastructureSanta Clara, CAStrong understanding of computer architecture and hardware-software interaction, including multicore systems, memory hierarchies, caches, interconnects, interrupts, memory-mapped I/O, and DMA. Familiarity with DPDK, accelerated networking, zero-copy data paths, SR-IOV, RDMA, SmartNICs, DPUs, GPUs, or dedicated baseband accelerators.
Senior Characterization Engineer NvidiaSenior Characterization EngineerSanta Clara, CAPerformance Metrics Optimization: Characterize and optimize performance metrics, including TX eye openings, RX jitter tolerance and sensitivity, PLL phase noise, jitter (RMS/peak-to-peak), lock time, frequency range, power supply rejection ratio (PSRR), and power consumption. What you'll be doing: ATE based Testing & Validation: Perform hands-on, post-silicon characterization of high-speed IOs, single-ended and differential, PLLs and related IP (VCOs, charge pumps, dividers).
Embedded Firmware Test Engineer ALTEN TechnologyEmbedded Firmware Test EngineerMountain View, California$110,000–$130,000 / yearYou'll leverage established test plans and procedures to validate embedded systems, automate testing using Python, and analyze test results to ensure products meet performance, reliability, and regulatory requirements. We’re ALTEN Technology USA, an engineering company helping clients bring groundbreaking ideas to life—from advancing space exploration and life-saving medical devices to building autonomous electric vehicles.
JOURNEYMAN ENGINEER ABM Industries IncJOURNEYMAN ENGINEERSanta Clara, CAThis role involves troubleshooting and resolving technical issues, conducting preventative maintenance, coordinating service calls, escorting vendors on-site, and collaborating with contractors to ensure the facility remains safe, functional, and compliant with all regulations. With over $8 billion in annual revenue and a blue-chip client base, ABM delivers innovative technologies and sustainable solutions that enhance facilities and empower clients to achieve their goals.
Staff Application Engineer Credo Semiconductor, Inc.Staff Application EngineerSan Jose, CA$140,000–$210,000 / yearActing as the technical bridge between customers and internal teams, the ideal candidate brings strong high-speed design expertise, hands-on lab proficiency, and can translate customer needs into actionable feedback to deliver winning solutions. Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform.
Hardware Validation Engineer Credo Semiconductor, Inc.Hardware Validation EngineerSan Jose, CA$80,000–$120,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. The role centers on silicon test and debug, product validation, and Python-based test automation-from characterizing new analog/mixed-signal designs and test chips in the lab to measuring optical evaluation boards and documenting results.
Electrical Avionics Engineer Momentus IncElectrical Avionics EngineerSan Jose, CA$140,000–$175,000 / yearKey Responsibilities:Develop avionics units in one or more of the following areas:Flight computer, data handling, and payload interface systemsPower converters and power distribution systemsAttitude determination sensors and camerasRadio communication systemsHigh power microwave amplifiersPerformPCB schematic capture and layoutPerform detailed technical review of electronics design and PCB layoutsAssist in developing test plans for flight qualification of avionics (TVAC, vibe, thermal, radiation, EMC/EMI, etc.)Preferred Skills and Experience:Experience with schematic capture and PCB layout in Altium DesignerExperience designing electronics for the space environment (LEO, GEO and deep space) including radiation, thermal, and vibeExperience defining spacecraft avionics architectures and developing associated budgetsExperience performing radiation test campaignsFamiliarity with embedded software developmentDeep technical expertise in at least one of the following areas:High-speed digital design: FPGAs, microprocessors, high speed memory, high speed communication busesPower electronics: power converters, load switches, etc. RF electronics: mixers, local oscillators, power amplifiersMixed-signal electronics: ADCs and DACs, image sensors, analogfront-endsExperience with circuit simulation software such asLTSpiceExperience designing fault-tolerant systemsPrevious experience working on DoD and other USG development and deployment programsAbility to hold and maintain a USG Security ClearanceEducation & Work Experience:BS degree in Electrical Engineering, or a closely related discipline5-8 years relevant experience.
Associate Design Engineer Credo Semiconductor, Inc.Associate Design EngineerSan Jose, CA$100,000–$150,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Our technology powers the most reliable and energy-efficient connections around the world - and our team powers new products and markets that come next.
Senior Manufacturing Engineer - DFM Mainspring Energy IncSenior Manufacturing Engineer - DFMMenlo Park, CA$116,000–$136,000 / yearBacked by top-tier investors including Khosla Ventures, Bill Gates, American Electric Power, Lightrock, and General Catalyst Mainspring designs, manufactures and delivers its products to customers across the U.S. today, and we're quickly scaling for international expansion. Commercial, industrial, and utility leaders are choosing Mainspring over traditional options like engines, turbines, and fuel cells to quickly and reliably deliver local power for EV charging, commercial facilities, data centers, and grid-scale operations.
Sr. Staff Engineer, Embedded Firmware (bare metal) Ayar Labs IncSr. Staff Engineer, Embedded Firmware (bare metal)San Jose, CA$180,000–$223,000 / yearBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop and implement sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems.
Sr. Engineer, Embedded Firmware (bare metal) Ayar Labs IncSr. Engineer, Embedded Firmware (bare metal)San Jose, CA$160,000–$192,000 / yearBacked by industry giants like NVIDIA, AMD, Mediatek and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop and implement sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems.
Power Systems Engineer Momentus IncPower Systems EngineerSan Jose, CA$140,000–$195,000 / yearThe ideal candidate should be accustomed to working in a fast-paced environment and enjoys working on ensuring the reliability, efficiency, and sustainability of the power supply, addressing both the technical and economic aspects of power system design and operation. With an experienced team of aerospace, propulsion, and robotics engineers, Momentus has developed a cost-effective and energy-efficient in-space transport system.
Senior Design Engineer (CAD & Methodology) Bitdeer Technologies GroupSenior Design Engineer (CAD & Methodology)San Jose, CATool Capability Mastery: Act as the internal subject matter expert on Cadence ADE (Analog Design Environment) and digital implementation suites, optimizing tool configurations, variables, and features to maximize engineer productivity and silicon performance. Education & Experience: Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, backed by proven hands-on experience in the integrated circuit (IC) design industry.
Senior Laser & SOA Characterization Engineer LightmatterSenior Laser & SOA Characterization EngineerMountain View, CA$210,000–$267,000 / yearExperience operating optical and RF instruments, including laser current drivers, TEC controllers, OSAs, optical power meters, photodetectors, RF spectrum analyzers, oscilloscopes, bias tees, optical filters, polarization controllers, optical switches, and fiber-coupled components. In this role, you will lead advanced characterization, bring-up, validation, and root-cause analysis of semiconductor lasers, tunable laser sources, DFB lasers, external-cavity lasers, laser diodes, and semiconductor optical amplifiers.
Intern, Power Electronics Engineer, Spring 2027 Heron PowerIntern, Power Electronics Engineer, Spring 2027Scotts Valley, CaliforniaThis role offers a unique opportunity to gain hands-on experience with real hardware, contribute to key product development initiatives, and deepen your understanding of high-voltage systems, power converter architectures, and control systems. You will be exposed to all stages of the hardware development lifecycle—from concept and modeling to prototyping and testing—while collaborating cross-functionally with teams in firmware, mechanical design, validation, and manufacturing.
Temporary Chief Engineer Crescent Hotels & Resorts LLCTemporary Chief EngineerRedwood City, CAPart timeFor applicants who will be working in California, the anticipated compensation range for the position is $ 81.92 per hour - The salary offered to a successful candidate will be dependent on several factors that may include, but are not limited to years of experience within the job, years of experience within the required industry, education, work location, etc. Every Crescent associate should adhere to the hotel security policies and procedures, particularly regarding key controls, lifting heavy objects, using chemicals, and effectively reporting safety hazards and safety concerns.
Sr. Engineer, Embedded Firmware Ayar LabsSr. Engineer, Embedded FirmwareSan Jose, CaliforniaEssential Functions: Firmware Architecture: Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
Sr. Staff Engineer, Package and Interconnect Reliability Ayar LabsSr. Staff Engineer, Package and Interconnect ReliabilitySan Jose, CaliforniaYou will work closely with advanced foundry partners (including TSMC) to qualify advanced packaging technologies like COUPE (Compact Optical Engine), micro-bump/hybrid bonding, precision die attach, and critical optical-to-electrical interfaces such as Fiber Array Units (FAUs) and optical connectors. Failure Analysis & Physics of Failure (PoF) Root Cause Analysis: Drive deep-dive Failure Analysis (FA) on components that fail during reliability stress testing using advanced techniques (e.g., CSAM, High-resolution X-ray, SEM/EDX, FIB, and optical interferometry).
Sr. Engineer, System Validation Ayar LabsSr. Engineer, System ValidationSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Lead New Product Introduction (NPI): Collaborate with Design, Package, and Reliability Engineering to ensure a smooth and successful transition of products from development to mass production.
Field Service Engineer Atlas Copco ABField Service EngineerSan Jose, CAKnowledge areas/Skills Strong customer focus to ensure delivered solutions meet customer expectations and timeframes, while working in alignment with Edwards strategies and processes. Vacuum is required in diverse sectors, from the generation of power to the production of steel, to the challenging environments of space simulation and high energy physics research.
Senior Language Engineer Microsoft CorpSenior Language EngineerMountain View, CA$119,800–$234,700 / yearRequired Qualifications: Bachelors Degree in Statistics, Econometrics, Computer Science, Electrical or Computer Engineering, or related field AND 4+ years related experience (e.g., statistics predictive analytics, research) OR Masters Degree in Statistics, Econometrics, Computer Science, Electrical or Computer Engineering, or related field AND 3+ years related experience (e.g., statistics, predictive analytics, research) OR Doctorate in Statistics, Econometrics, Computer Science, Electrical or Computer Engineering, or related field AND 1+ year(s) related experience (e.g., statistics, predictive analytics, research) OR equivalent experience. Starting January 26, 2026, Microsoft AI Experiences employees who live within a 50- mile commute of a designated Microsoft office in the U.S. or 25-mile commute of a non-U.S., country-specific location are expected to work from the office at least four days per week.
Staff Engineer, RTL Memory Centric Computing Samsung SemiconductorStaff Engineer, RTL Memory Centric ComputingSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Staff Engineer, Workbench Platform Samsung SemiconductorStaff Engineer, Workbench PlatformSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
NewEngineer, Product and Test Hardware Design Ayar LabsEngineer, Product and Test Hardware DesignSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Using schematics, drawings, and direct interaction with our Design and Product teams, this person will develop and bring up the probe cards and circuitry we use to test our next-generation TeraPHY and SuperNova devices.
NewSr. Engineer, Free-Space Optics Ayar LabsSr. Engineer, Free-Space OpticsSan Jose, CaliforniaBacked by industry giants like NVIDIA, Mediatek, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Key Responsibilities Develop optical test and characterization frameworks for free-space optical subsystems, including: Lenses, isolators, and polarization optics, Fiber Array Units (FAUs) and fiber coupling interfaces.
Sr. Staff Engineer, ASIC Design Ayar LabsSr. Staff Engineer, ASIC DesignSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Create clear documentation of their designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff.
Sr. Engineer, Silicon Validation Ayar LabsSr. Engineer, Silicon ValidationSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. You will execute post-silicon bringup and characterization across SerDes, photonic, and mixed-signal blocks, building the test infrastructure and automation that ensures our products meet and exceed specification before customer deployment.
Principal Engineer, SerDes AMS Design and Architecture Ayar LabsPrincipal Engineer, SerDes AMS Design and ArchitectureSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Key Responsibilities: Architect the high-speed optical PHY of our next-generation product: TX path, RX path, clocking, and mixed-signal control loops against a system-level link budget shared with the photonics and laser teams.
Sr. Staff Engineer, Embedded Firmware (bare metal) Ayar LabsSr. Staff Engineer, Embedded Firmware (bare metal)San Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop and implement sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems.
Staff Reliability Engineer ALSOStaff Reliability EngineerPalo Alto, CaliforniaWe’re a passionate team of builders, dreamers, doers and innovators, focused on creating entirely new (not to mention, innovative and delightful) vertically integrated, small EVs designed to meet the global mobility challenges of today and tomorrow. Establish reliability targets and metrics for new product development, covering actuators, batteries, drive units, PCBAs, chassis, and various low-voltage electronic systems.
Senior Reliability Engineer ALSOSenior Reliability EngineerPalo Alto, CaliforniaWe’re a passionate team of builders, dreamers, doers and innovators, focused on creating entirely new (not to mention, innovative and delightful) vertically integrated, small EVs designed to meet the global mobility challenges of today and tomorrow. Establish reliability targets and metrics for new product development, covering actuators, batteries, drive units, PCBAs, chassis, and various low-voltage electronic systems.
Principal Engineer, System Validation Ayar LabsPrincipal Engineer, System ValidationSan Jose, CaliforniaThis role owns reliability qualification at the system and fleet level: building the test infrastructure and evidence base that proves our products are ready for large-scale deployment, and then partnering directly with customers and integration partners to carry that evidence through joint qualification programs and pilot deployments. Fault injection and lifecycle monitoring: Design and run fault-injection and failure-mode testing, including scenarios that exercise field-serviceable components under representative operating conditions, in partnership with customer and integration-partner operations teams.
Staff Engineer, Design Verification Samsung SemiconductorStaff Engineer, Design VerificationSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Staff Engineer, Compiler Samsung SemiconductorStaff Engineer, CompilerSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Building or extending kernel DSLs for our hardware: taking a tile-based programming model (Triton-style), a higher-level expression (Helion-style), or a custom DSL we design, and lowering it to our ISA, our memory hierarchy, and our collective primitives.
Senior Staff Engineer, Design Verification Samsung SemiconductorSenior Staff Engineer, Design VerificationSan Jose, CA$189,000–$301,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Senior Staff Engineer, AI Software Samsung SemiconductorSenior Staff Engineer, AI SoftwareSan Jose, CA$189,000–$301,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Lead Engineer, Computational Knowledge Graph AvathonLead Engineer, Computational Knowledge GraphPleasanton, CA$150,000–$220,000 / yearCategory Technologies Languages Python (primary), Scala, IQL Graph Platforms Neon/Maana (proprietary), Neo4j concepts Cloud GCP (primary), AWS, Azure Data SQL, NoSQL, Time Series DBs APIs REST, GraphQL concepts ML Integration TensorFlow, PyTorch, NumPy CI/CD Travis CI, Jenkins Interview Process. Avathon is the leading Industrial AI autonomy platform, helping customers across heavy industries -- energy, mining, manufacturing, aerospace, defense, and logistics -- accelerate the journey toward autonomous operations.
Sr. Staff Engineer, Quality Ayar LabsSr. Staff Engineer, QualitySan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Design and Supplier Quality Management Define necessary procedures to ensure all design and Supplier Supplier Governance: Ensure all external partners (Foundries, OSATs, CMs) are onboarded and managed according to QMS requirements.