Senior Software Engineer, Scientific System of Record Lila SciencesSenior Software Engineer, Scientific System of RecordSan Francisco, Massachusetts$144,000–$240,000 / yearWe are seeking Senior Software Engineers with full stack experience to join our Scientific System of Record Team (SSR), where you’ll collaborate with software engineers, lab scientists, and machine learning engineers to build cutting-edge tools for automated scientific analysis and more. Lab Execution and Scientific Workflows: Build systems that model scientific intent, experiment planning, protocol execution, sample and asset state, operational events, and results capture across complex lab workflows.
Mechanical Engineer CrusoeMechanical EngineerSan Francisco, California$145,000–$165,000 / yearWe're looking for problem-solving, opportunity-finding teammates with a sense of urgency, who believe in the scale of our ambition and thrive on a path not fully paved — people who want to grow their careers alongside a team of experts across energy, manufacturing, data center construction, and cloud services. You will work closely with project managers, contractors, and other engineers to oversee the design, development, installation, testing, and commissioning of piping, HVAC, plumbing, and fire protection systems.
Applications Development Engineer - eBeam KLA CorpApplications Development Engineer - eBeamMilpitas, CA$97,800–$166,300 / yearEnabling the movement towards advanced chip design, KLA''s Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. This includes - investigating semiconductor manufacturing yield issues and providing inspection, review & metrology solutions; creating & sharing product value statements and use-cases with engineering, marketing and sales groups; training customers and other applications engineers.
Applications Development Engineer KLA CorpApplications Development EngineerMilpitas, CA$97,800–$166,300 / yearEnabling the movement towards advanced chip design, KLA''s Global Products Group (GPG), which is responsible for creating all of KLA's metrology and inspection products, is looking for the best and the brightest research scientist, software engineers, application development engineers, and senior product technology process engineers. This includes investigating semiconductor manufacturing yield issues and providing inspection solutions; creating & sharing product value statements and use-cases with engineering, marketing and sales groups; training customers and other applications engineers.
Project Engineer, Heavy Civil Construction Kiewit CorpProject Engineer, Heavy Civil ConstructionSan Jose, CA$100,000–$130,000 / yearWe offer our fulltime staff employees a comprehensive benefits package that's among the best in our industry, including top-tier medical, dental and vision plans covering eligible employees and dependents, voluntary wellness and employee assistance programs, life insurance, disability, retirement plans with matching, and generous paid time off. Whether we're boring tunnels through mountains, providing drinking water to communities, turning rivers into energy or building bridges that connect communities, we depend on our passionate, skilled, and safety-obsessed construction professionals to get it done right.
Software Engineer - Orchestrated Application Recovery RubrikSoftware Engineer - Orchestrated Application RecoveryPalo Alto, CA$152,400–$228,700 / yearRubrik Agent Cloud accelerates trusted AI agent deployments at scale by monitoring and auditing agentic actions, enforcing real-time guardrails, fine-tuning for accuracy and undoing agentic mistakes. As a Software Engineer in the AppFlows team, you will be responsible for: Owning, designing, and developing cutting-edge solutions for Disaster Recovery as a Service for both on-prem and various Cloud platforms.
Security AI Engineer, Principal Member of Technical Staff QuantumScape CorpSecurity AI Engineer, Principal Member of Technical StaffSan Jose, CA$155,000–$236,000 / yearWe are actively building an internal agentic AI platform for security and IT operations - multi-agent workflows that triage incidents, perform asset reconnaissance, run access reviews, and generate audit evidence, with humans in the loop wherever judgment matters. Security Engineering Breadth: Vulnerability management (Tenable or equivalent), endpoint control and application allowlisting (ThreatLocker or equivalent), identity and privileged access (SSO, FIDO2, PAM), and software supply chain security (SBOM, image scanning, signing).
Building Management Systems & Life Safety Engineer Axient LLCBuilding Management Systems & Life Safety EngineerMountain View, CA$150,000–$170,000 / yearThe engineer serves as the primary technical Subject Matter Expert (SME) for the site's integrated control networks and life-safety systems, including the center-wide BMS architecture, direct digital control (DDC) facility automation, campus-wide fire alarm networks, and mass notification infrastructure at NASA Ames Research Center. Bachelor's degree in Electrical Engineering, Computer Science, Mechanical Engineering or similar technical degree with 5-10 years of experience, or in lieu of formal degree 10+ years hands-on experience in large-scale BMS/Fire Alarm networks.
Senior Software Engineer, Scientific System of Record Lila Sciences IncSenior Software Engineer, Scientific System of RecordSan Francisco, CA$144,000–$240,000 / yearWe are seeking Senior Software Engineers with full stack experience to join our Scientific System of Record Team (SSR), where you'll collaborate with software engineers, lab scientists, and machine learning engineers to build cutting-edge tools for automated scientific analysis and more. Lab Execution and Scientific Workflows: Build systems that model scientific intent, experiment planning, protocol execution, sample and asset state, operational events, and results capture across complex lab workflows.
Principal, Hardware Engineer Aurelius SystemsPrincipal, Hardware EngineerSan Francisco, CaliforniaYou lead by example, you unblock hard problems, and you set the technical bar for how hardware gets designed and shipped at Aurelius. You'll work directly alongside mechanical, electrical, power, embedded, and optics engineers on the hardest problems the team is facing.
Full Stack Engineers ApiphanyFull Stack EngineersSan Francisco, CaliforniaOne year of experience as a Software Engineer or Developer or related that includes the following: 0-to-1 product development in building and shipping software from conception, navigating uncertainty and scaling from Minimum Viable Product (MVP) to production. Build and optimize front-end applications (React, TypeScript, etc.) and backend services (Python, Node.js, or similar), ensuring seamless end-to-end experiences.
Senior Server Engineer II, Subscriptions StravaSenior Server Engineer II, SubscriptionsSan Francisco, CaliforniaWhat You’ll Do: Design, build, and maintain scalable backend services powering Strava's subscription and payments platform using our tech stack (Ruby, Java, Scala, Python, Go, MySQL, Redis, Cassandra, Kafka, Kubernetes, and Docker). We’re backed by Sequoia Capital, TCV, Madrone Partners and Jackson Square Ventures, and we’re expanding in order to exceed the needs of our growing community of global athletes.
Senior Machine Learning Engineer StravaSenior Machine Learning EngineerSan Francisco, CaliforniaBuild from a rich dataset : Explore and use Strava’s extensive unique fitness and geo datasets from millions of users to extract actionable insights, inform product decisions, and optimize existing features. Analyzing the Data : Work closely with product managers, data scientists, and engineers to find opportunities for applying machine learning to drive business impact and enhance Strava’s features and measure impact.
Lead Engineer, Computational Knowledge Graph AvathonLead Engineer, Computational Knowledge GraphPleasanton, CaliforniaCategory Technologies Languages Python (primary), Scala, IQL Graph Platforms Neon/Maana (proprietary), Neo4j concepts Cloud GCP (primary), AWS, Azure Data SQL, NoSQL, Time Series DBs APIs REST, GraphQL concepts ML Integration TensorFlow, PyTorch, NumPy CI/CD Travis CI, Jenkins Interview Process. Avathon is the leading Industrial AI autonomy platform, helping customers across heavy industries -- energy, mining, manufacturing, aerospace, defense, and logistics -- accelerate the journey toward autonomous operations.
Principal Engineer, SerDes Validation Ayar LabsPrincipal Engineer, SerDes ValidationSan Jose, CaliforniaDrive Product Bring-up: Collaborate with Design Engineering to bring up cutting-edge silicon photonic and laser products, troubleshooting and resolving complex technical issues on the optical SerDes devices. Lead New Product Introduction (NPI): Collaborate with multi-disciplinary teams to identify and implement product improvements through bench characterization and ensure successful transition of products from development to mass production.
Sr. Principal Engineer, SoC Architect Ayar LabsSr. Principal Engineer, SoC ArchitectSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Cross-Functional Collaboration Work closely with: Design and verification teams on implementation feasibility, Firmware/software teams on boot, drivers, and runtime optimization, Validation teams on bring-up and debug strategies and Product and business teams on roadmap alignment.
Sr. Engineer, Embedded Firmware (bare metal) Ayar LabsSr. Engineer, Embedded Firmware (bare metal)San Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, Mediatek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop and implement sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems.
Sr. Staff Engineer, Quality Ayar LabsSr. Staff Engineer, QualitySan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Design and Supplier Quality Management Define necessary procedures to ensure all design and Supplier Supplier Governance: Ensure all external partners (Foundries, OSATs, CMs) are onboarded and managed according to QMS requirements.
Sr. Engineer, Embedded Firmware Ayar LabsSr. Engineer, Embedded FirmwareSan Jose, CaliforniaEssential Functions: Firmware Architecture: Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
Sr. Staff Engineer, Package and Interconnect Reliability Ayar LabsSr. Staff Engineer, Package and Interconnect ReliabilitySan Jose, CaliforniaYou will work closely with advanced foundry partners (including TSMC) to qualify advanced packaging technologies like COUPE (Compact Optical Engine), micro-bump/hybrid bonding, precision die attach, and critical optical-to-electrical interfaces such as Fiber Array Units (FAUs) and optical connectors. Failure Analysis & Physics of Failure (PoF) Root Cause Analysis: Drive deep-dive Failure Analysis (FA) on components that fail during reliability stress testing using advanced techniques (e.g., CSAM, High-resolution X-ray, SEM/EDX, FIB, and optical interferometry).
Sr. Staff Engineer, Optical Link Design Ayar LabsSr. Staff Engineer, Optical Link DesignSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, Mediatek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Essential Functions Drive rigorous link modeling studies to help evaluate future product solution spaces and define precise component-level specifications.
Principal Engineer, Laser Controls Ayar LabsPrincipal Engineer, Laser ControlsSan Jose, CaliforniaKey Responsibilities Define and own the end-to-end laser module control architecture, including: APC (Automatic Power Control) loops for stable optical output, ACC (Automatic Current Control) strategies for laser drive optimization, Automatic calibration frameworks (power, current, aging compensation, temperature drift), and TEC (Thermoelectric Cooler) control for wavelength and thermal stability. Backed by industry giants like NVIDIA, Mediatek, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
HVAC Engineer AstrionHVAC EngineerMountain View, California$140,000–$160,000 / yearBachelor’s degree in Mechanical Engineering, Mechanical Engineering Technology (MET) or relevant technical field with 5–10 years experience in commercial/industrial HVAC systems, or In lieu of a formal degree, 12+ years of specialized, hands-on experience in the operation, maintenance, and technical oversight of large-scale mechanical systems. This role focuses on Quality Assurance (QA), Contract Oversight, and Long-Range Capital Planning to support infrastructure modernization and operational readiness in support of NASA Missions and Projects.
Senior Language Engineer Microsoft CorpSenior Language EngineerMountain View, CA$119,800–$234,700 / yearRequired Qualifications: Bachelors Degree in Statistics, Econometrics, Computer Science, Electrical or Computer Engineering, or related field AND 4+ years related experience (e.g., statistics predictive analytics, research) OR Masters Degree in Statistics, Econometrics, Computer Science, Electrical or Computer Engineering, or related field AND 3+ years related experience (e.g., statistics, predictive analytics, research) OR Doctorate in Statistics, Econometrics, Computer Science, Electrical or Computer Engineering, or related field AND 1+ year(s) related experience (e.g., statistics, predictive analytics, research) OR equivalent experience. Starting January 26, 2026, Microsoft AI Experiences employees who live within a 50- mile commute of a designated Microsoft office in the U.S. or 25-mile commute of a non-U.S., country-specific location are expected to work from the office at least four days per week.
Staff Engineer, Workbench Platform Samsung SemiconductorStaff Engineer, Workbench PlatformSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Staff Engineer, RTL Memory Centric Computing Samsung SemiconductorStaff Engineer, RTL Memory Centric ComputingSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Sr. Staff Engineer, Platform Firmware Ayar LabsSr. Staff Engineer, Platform FirmwareSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. This role focuses on firmware running on STM32-based boards that emulate customer platforms, control external hardware, and validate embedded firmware running inside Ayar Labs’ and customers’ SoCs.
Sr. Staff Engineer, Analog/Mixed-Signal Design Ayar LabsSr. Staff Engineer, Analog/Mixed-Signal DesignSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. As an Analog and Mixed Signal Design Engineer, you will design various blocks such as oscillators, high speed transmitters/receivers, biasing circuits, linear regulators, ADCs/DACs, and others.
NewSenior Engineer RTL Power Macro Modeling Samsung SemiconductorSenior Engineer RTL Power Macro ModelingSan Jose, CA$138,000–$206,000 / yearThe role builds these models from S-parameter models of the interconnect, calibrates them against circuit-level references, and makes them fast enough to run over long workload traces. Proven self-discipline and professional maturity to execute independent research and meet rigorous milestones with a strong sense of accountability for both personal and collective goals in a fast-paced, on-site environment.
NewSenior Reliability Engineer ALSOSenior Reliability EngineerPalo Alto, CaliforniaWe’re a passionate team of builders, dreamers, doers and innovators, focused on creating entirely new (not to mention, innovative and delightful) vertically integrated, small EVs designed to meet the global mobility challenges of today and tomorrow. Establish reliability targets and metrics for new product development, covering actuators, batteries, drive units, PCBAs, chassis, and various low-voltage electronic systems.
NewStaff Reliability Engineer ALSOStaff Reliability EngineerPalo Alto, California$220,000–$255,000 / yearWe’re a passionate team of builders, dreamers, doers and innovators, focused on creating entirely new (not to mention, innovative and delightful) vertically integrated, small EVs designed to meet the global mobility challenges of today and tomorrow. Establish reliability targets and metrics for new product development, covering actuators, batteries, drive units, PCBAs, chassis, and various low-voltage electronic systems.
Capgemini Invent - Forward Deployed Engineer Senior Consultant Capgemini SECapgemini Invent - Forward Deployed Engineer Senior ConsultantSan Francisco, CA$112,600–$212,700 / yearAs part of Capgeminis Strategy & Transformation Consulting practice, DDT partners with clients to shape data‑centric strategies, modern operating models, and AI‑enabled solutions that deliver measurable business outcomes. It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem.
Temporary Chief Engineer Crescent Hotels & Resorts LLCTemporary Chief EngineerRedwood City, CAPart timeFor applicants who will be working in California, the anticipated compensation range for the position is $ 81.92 per hour - The salary offered to a successful candidate will be dependent on several factors that may include, but are not limited to years of experience within the job, years of experience within the required industry, education, work location, etc. Every Crescent associate should adhere to the hotel security policies and procedures, particularly regarding key controls, lifting heavy objects, using chemicals, and effectively reporting safety hazards and safety concerns.
Staff Partner Engineer Ripple LabsStaff Partner EngineerSan Francisco, CA$196,000–$245,000 / yearAs a member of Ripple's delivery team, you will work alongside a group of highly skilled solution engineers to lead the implementation of our payment solutions with customers and partners across the globe. Join Ripple as a Staff Partner Engineer and be part of our dedicated team that crafts and deploys innovative solutions for senders, receivers, exchanges, and fund providers worldwide.
Sr. Engineer, System Validation Ayar LabsSr. Engineer, System ValidationSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Lead New Product Introduction (NPI): Collaborate with Design, Package, and Reliability Engineering to ensure a smooth and successful transition of products from development to mass production.
Field Service Engineer Atlas Copco ABField Service EngineerSan Jose, CAKnowledge areas/Skills Strong customer focus to ensure delivered solutions meet customer expectations and timeframes, while working in alignment with Edwards strategies and processes. Vacuum is required in diverse sectors, from the generation of power to the production of steel, to the challenging environments of space simulation and high energy physics research.
Electrical Engineer - Entry to Junior Level Moffatt & NicholElectrical Engineer - Entry to Junior LevelOakland, CA$45–$60 / hourThe firm provides clients worldwide with customized service and a level of excellence that have become the firm's hallmark in several primary practice areas - ports and harbors; coastal, environmental and water resources; urban waterfronts and marinas; transportation, bridges and rail; inspection and rehabilitation; and energy. As part of the Electrical Group, the Electrical Engineer supports the planning, design and plan production for general electrical engineering on a wide variety of projects which may include lighting, power, and grounding plans, one-line diagrams, panel and cable schedules, and different project specifications.
NewEngineer, Product and Test Hardware Design Ayar LabsEngineer, Product and Test Hardware DesignSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Using schematics, drawings, and direct interaction with our Design and Product teams, this person will develop and bring up the probe cards and circuitry we use to test our next-generation TeraPHY and SuperNova devices.
NewSr. Engineer, Free-Space Optics Ayar LabsSr. Engineer, Free-Space OpticsSan Jose, CaliforniaBacked by industry giants like NVIDIA, Mediatek, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Key Responsibilities Develop optical test and characterization frameworks for free-space optical subsystems, including: Lenses, isolators, and polarization optics, Fiber Array Units (FAUs) and fiber coupling interfaces.
Sr. Staff Engineer, Embedded Firmware (bare metal) Ayar LabsSr. Staff Engineer, Embedded Firmware (bare metal)San Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop and implement sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems.
NewField Engineer ABM IndustriesField EngineerPleasanton, CA$60–$80Minimum 5–8 years of experience in electrical testing, commissioning, field service, industrial maintenance, utility operations, power generation, data center operations, or related electrical power systems work. Founded in 1909, ABM serves over 20,000 clients, with annualized revenue approaching $8 billion and more than 100,000 team members in 350+ offices throughout the United States, United Kingdom, Republic of Ireland, and other international locations.
Environmental Engineer (NWS 00927) North Wind GroupEnvironmental Engineer (NWS 00927)LIVERMORE, CA$80–$85Advanced knowledge and significant experience in environmental remediation and the design, installation, operation, and maintenance of environmental remediation systems and system components, such as extraction and injection wellhead design, pump specifications, treatment media and vessels, pipelines, associated instrumentation, and control systems. The successful candidate will provide engineering support for the planning, design, testing, compliance monitoring, and operation and maintenance of groundwater and soil vapor remediation systems at the LLNL Livermore Site 200 and Site 300 located in Tracy, California.
NewSr. Staff Engineer, ASIC Design Ayar LabsSr. Staff Engineer, ASIC DesignSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Create clear documentation of their designs to enable backend ASIC engineers to perform physical implementation (clocks and timing constraints, floorplan guidance, testability) and collaborate to ensure timing signoff.
Sr. Engineer, Silicon Validation Ayar LabsSr. Engineer, Silicon ValidationSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. You will execute post-silicon bringup and characterization across SerDes, photonic, and mixed-signal blocks, building the test infrastructure and automation that ensures our products meet and exceed specification before customer deployment.
Principal Engineer, System Validation Ayar LabsPrincipal Engineer, System ValidationSan Jose, CaliforniaThis role owns reliability qualification at the system and fleet level: building the test infrastructure and evidence base that proves our products are ready for large-scale deployment, and then partnering directly with customers and integration partners to carry that evidence through joint qualification programs and pilot deployments. Fault injection and lifecycle monitoring: Design and run fault-injection and failure-mode testing, including scenarios that exercise field-serviceable components under representative operating conditions, in partnership with customer and integration-partner operations teams.
Principal Engineer, SerDes AMS Design and Architecture Ayar LabsPrincipal Engineer, SerDes AMS Design and ArchitectureSan Jose, CaliforniaBacked by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. Key Responsibilities: Architect the high-speed optical PHY of our next-generation product: TX path, RX path, clocking, and mixed-signal control loops against a system-level link budget shared with the photonics and laser teams.
Staff Engineer, Design Verification Samsung SemiconductorStaff Engineer, Design VerificationSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Staff Engineer, Compiler Samsung SemiconductorStaff Engineer, CompilerSan Jose, CA$163,000–$253,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Building or extending kernel DSLs for our hardware: taking a tile-based programming model (Triton-style), a higher-level expression (Helion-style), or a custom DSL we design, and lowering it to our ISA, our memory hierarchy, and our collective primitives.
Senior Staff Engineer, Design Verification Samsung SemiconductorSenior Staff Engineer, Design VerificationSan Jose, CA$189,000–$301,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.
Senior Staff Engineer, AI Software Samsung SemiconductorSenior Staff Engineer, AI SoftwareSan Jose, CA$189,000–$301,000 / yearTo achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future.