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Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. The PERC ESD development team within this organization is looking for individuals who will be responsible to develop PERC ESD rule decks for latest Intel technologies.

YEAR

Intel

Sr. EDA Tools Engineer - PERC ESD

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Managing development teams in building healthcare AI and GenAI solutions, including analytical modeling, prompt engineering, Python-based development, testing, communication of results to clinical and operational stakeholders, front-end and back-end integration, and iterative use case development with health system clients; Documenting and analyzing healthcare business processes - across clinical operations, and population health programs - to identify AI and GenAI opportunities, gather requirements, define initial hypotheses, and develop solution approaches tailored to health system workflows; Collaborating with health system client teams - including clinical informatics, population health, and IT leaders - to understand their business and clinical problems and select the appropriate models, LLMs, and approaches for AI/GenAI use cases; Designing and solutioning AI/GenAI architectures for health system clients, including RAG-based clinical knowledge retrieval systems, agentic AI workflows for care management and revenue cycle automation, and custom LLM application builds with appropriate PHI safeguards; Managing teams to process healthcare unstructured and structured data - including clinical notes, discharge summaries, claims records, EHR data, and ADT feeds - for use as LLM context, including embedding of large clinical text corpora, generative SQL query development, and building connectors to EHR back-end databases; Managing daily operations of a global healthcare data science team on client engagements, reviewing developed models, providing feedback, and assisting in analysis of clinical and operational outcomes; Directing data engineers and other data scientists to deliver efficient, HIPAA-compliant solutions that meet health system client requirements for clinical, financial, and operational AI use cases; Leading and contributing to development of proof of concepts, pilots, and production use cases for health system clients - spanning clinical decision support, prior authorization automation, patient risk scoring, workforce optimization, and throughput modeling - while working in cross-functional teams; Facilitating and conducting executive-level presentations to health system leadership showcasing GenAI and ML solution capabilities, use case development progress, model performance, and recommended next steps; Structuring, writing, communicating, and facilitating client presentations that translate complex AI and ML concepts into clear clinical and business value narratives for health system audiences; and, Managing associates and senior associates through coaching, providing feedback, and guiding work performance, with an emphasis on developing healthcare domain knowledge alongside technical AI and ML capabilities. You will architect and build production-grade RAG pipelines, MCP connections, agentic AI workflows, and MLOps frameworks, managing daily operations across global delivery teams while engaging health system leaders at the executive level to ensure measurable clinical and operational impact.

PwC’s accounting practice originated in London well over a century ago. As times changed and PwC expanded worldwide, our commitment to clients—like you—never wavered. With us, you’re always supported by a global network of more than 223,000 people in 157 countries with one goal: to help your business thrive.

PwC’s professional services include audit and assurance, tax and consulting that cover such areas as cybersecurity and privacy, human resources, deals and forensics. We help resolve complex issues and identify opportunities across these industries.

Let’s combine your ​aspirations with our world-class capabilities to achieve your goals.

PricewaterhouseCoopers LLP

Applied AI Health Data System Engineer-Senior Manager

Leading the design and implementation of secure AI workloads across Amazon Web Services (AWS), Microsoft Azure, Google Cloud, and hybrid environments, including cloud landing zones, network isolation, private connectivity, logging, encryption, key management, data protection, containers, serverless workloads, Kubernetes, and infrastructure-as-code controls. Required: Bachelor's degree in Information Technology, Computer Science, Artificial Intelligence, Cybersecurity, Computer Engineering, or Software Engineering; equivalent professional work experience in software engineering, AI engineering, cybersecurity, cloud security, application security, or technology consulting may be considered in lieu of a degree.

Deloitte

Cyber - AI Cloud Security Engineer - Manager

The PERC ESD development team within this organization is looking for individuals who will be responsible to develop PERC ESD rule decks for latest Intel technologies. Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.

Intel Corp.

Sr. EDA Tools Engineer - Perc ESD

A wide range of analog RF components including LNAs, SSPAs, local oscillators, mixers, filters, drivers, power divider / combiners, switches, and attenuators. When determining an individual’s compensation, we consider several factors including skillset, experience, job scope, and current market data, so pay for this role may vary from the amounts listed.

AscendArc

Senior RF Board Engineer

We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors.

Quantum Packaging Signal/Power Integrity (Si/Pi) Engineer

As a Staff Engineer (0-4 years of experience), you will collaborate with a team of experienced professionals working on meaningful public infrastructure projects that improve water, wastewater, transportation and environmental systems. RH2 is recognized for delivering high-quality engineering solutions to public clients across the region, with a strong reputation for mentorship, technical rigor, and long-term client relationships.

HOUR

RH2 Engineering

Staff Engineer (Entry Level)

Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; or a Master's degree with 4+ years of experience; or a PhD with 2+ years of experience. As part of Intel, you will have the unique opportunity to collaborate with EDA vendors, define next-generation design tools, and contribute to groundbreaking innovations that enrich lives worldwide.

EDA Tools Hardware Engineer

As an AI Cloud Security Engineer, Consultant on the Cyber and Cloud Security team, you will be responsible for: Designing secure architectures for generative AI, agentic AI, retrieval-augmented generation (RAG), model serving, and AI-enabled enterprise applications; applying AI Zero Trust principles across models, agents, tools, application programming interfaces (APIs), data, cloud workloads, development pipelines, and runtime environments. Designing and implementing secure AI workloads across Amazon Web Services, Microsoft Azure, Google Cloud, and hybrid environments, including cloud landing zones, network isolation, private connectivity, logging, encryption, key management, data protection, containers, serverless workloads, Kubernetes, policy-as-code controls, and automated remediation.

Cyber -AI Cloud Security Engineer - Consultant

Using considerable independent judgment and time management, assure technology is appropriate for the solution, solutions meet the needs of the customer and business, schedules are met, resources are used efficiently, design activities are well coordinated, and technical conflicts associated with competing ideas and priorities are quickly resolved. The position works across multiple initiatives at a time while supporting individual projects and solutions, and serves as the technical "face" of enterprise systems engineering - partnering with leadership to identify, plan, evaluate, and road-map future capabilities while balancing investment and return.

A-dec Inc

Systems Engineer, Principal

Your responsibilities as a Yield Product Development Engineer will include but not be limited to: Develop methods, processes, and systems to consolidate and analyze diverse big data sources for defect mode understanding and yield modeling. Create and harden systems capable of meeting operational needs for leading-edge logic nodes, working with equipment vendors and internal collaborators.

Intel Corp

Yield Product Development Engineer

Position Overview: As a Research Engineer Intern, you will play a crucial role in developing STCO methodology and evaluating 3D/2.5D dis-aggregation schemes using solder microbumps or hybrid bonding for memory and logic stacking across different product architectures. 1-2+ years research experience relevant to one or more of the following areas: System architecture modelling, digital circuit analysis and design, VLSI physical layout, electronic design automation, multi-physics modeling of electronic materials or systems.

System Technology Research Engineer - (PhD Intern)

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates Experience listed below would be obtained through a combination of your schoolwork, classes, research and/or relevant previous job and/or internship experiences. With over 15,000 dedicated employees, Foundry TD spearheads innovative research, develops next-generation processes and packaging technologies, and manages high-volume manufacturing in state-of-the-art facilities.

Intel Foundry LTD Product Yield Engineer

Develop robust, cost-effective mechanical & structural solutions for a range of semiconductor tool pedestals that fall within tool manufacturer specifications and customer facility requirements. Experience designing for metal fabrication & machine shop applications with knowledge of cutting, grinding, forming, welding and milling.

Fulcrum Technologies

Mechanical Design Engineer

Daimler Trucks North America (DTNA) Product Engineering is at the forefront of developing new product specifications, designing innovative products, and maintaining current heavy truck systems. Our evolving brand portfolio is second to none, including Freightliner Trucks, Western Star, Demand Detroit, Thomas Built Buses, Freightliner Custom Chassis, and Financial Services.

Daimler Truck North America

Mechanical Product Design Engineer III - Suspensions

Prepares basic design studies, calculations, drawings, Bills of Materials, and other engineering documents in accordance with customer requirements and department policies and procedures. This job profile is intended for early-career professionals who apply broad theoretical knowledge and require the ability to investigate and analyze problems.

Sulzer Ltd

Design Engineer

System Technology Research Engineer - (Phd Intern)

As a Semiconductor Device Modeling Engineer, you will be responsible for characterizing device behavior and generating/updating device models for new technologies while ensuring robust and accurate model simulations. As a member of CDMG, you will be at the forefront of co-optimizing Intel's state-of-the-art process technology, enabling customers with diverse design needs to deliver best-in-class products for data-centric applications.

Semiconductor Device Modeling Engineer

You will be a member of the R&D digital Application-Specific Integrated Circuit (ASIC) design team that develops the main controller with critical HP proprietary intellectual property that separates HP printers from the rest of the competitions. The pay range for this role is $116,150 to $182,400 USD annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only).

Senior ASIC Design Engineer

A Network Planning Engineer’s (Telco Engineer) role will be a crucial part in evaluating, planning, and implementing a cutting-edge telecommunications network design tailored to mission-critical needs. Domain knowledge of the Telecommunications industry, including carrier services, provisioning terminology, CISCO routers and network infrastructure and IP technologies such as Pseudo Wire and Ethernet switching.

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