Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) SpaceXSr. SOC/ASIC Physical Design Engineer (Silicon Engineering)Sunnyvale, CA$170,000–$230,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
Principal DFT Engineer (Silicon Engineering) Space Exploration TechnologiesPrincipal DFT Engineer (Silicon Engineering)Palo Alto, CA$220,000–$355,000 / yearRESPONSIBILITIES: Lead implementation and optimization of DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST, leveraging Siemens Tessent tools for RTL and gate netlist DFT implementation. ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
FPGA Engineer AstranisFPGA EngineerSan Francisco, CA$140,000–$205,000 / yearBase Salary $140,000—$205,000 USD U.S. Citizenship, Lawful Permanent Residency, or Refugee/Asylee Status Required (To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States, or other protected individual as defined by 8 U.S.C. 1324b(a)(3)) Our mission and our products are meant to connect the world and everyone in it, regardless of gender, race, creed, or any other distinction. Today, Astranis satellites provide dedicated, secure networks to highly-sophisticated customers across the globe— large enterprises, sovereign governments, and the US military.
Sr. Soc/Asic Physical Design Engineer (Silicon Engineering) Space Exploration TechnologiesSr. Soc/Asic Physical Design Engineer (Silicon Engineering)Sunnyvale, CA$175,000–$280,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Staff Software Engineer (Cloud Infrastructure) CrusoeStaff Software Engineer (Cloud Infrastructure)San Francisco, California$215,000–$260,000 / yearWe're looking for problem-solving, opportunity-finding teammates with a sense of urgency, who believe in the scale of our ambition and thrive on a path not fully paved — people who want to grow their careers alongside a team of experts across energy, manufacturing, data center construction, and cloud services. The ideal candidate will be hands-on with GPU rack-level troubleshooting and work closely with data center operations, engineering, and vendors to support cutting-edge infrastructure featuring the latest NVIDIA and AMD GPUs.
Post-Silicon Validation Engineer Etched.ai IncPost-Silicon Validation EngineerSan Jose, CARequirements You may be a good fit if you have: 7+ years of experience in post-silicon validation, bring-up, and debug of ASICs (preferably including AI/ML accelerators) Proven expertise in early silicon bring-up, debug, and validation Deep knowledge of peripheral interfaces and board-level debug Proficiency in C, Python, and scripting for validation automation Hands-on expertise with oscilloscopes, logic/protocol analyzers, and other validation lab tools Familiarity with firmware, bootloaders, and low-level silicon debug environments Strong problem-solving, analytical, and collaboration skills across hardware and software teams Bachelors degree in Electrical Engineering, Computer Engineering, or a related field (Masters preferred). Benefits Medical, dental, and vision packages with generous premium coverage $500 per month credit for waiving medical benefits Housing subsidy of $2k per month for those living within walking distance of the office Relocation support for those moving to San Jose (Santana Row) Various wellness benefits covering fitness, mental health, and more Daily lunch + dinner in our office.
NewSr. RTL Design Engineer (Silicon Engineering) Space Exploration TechnologiesSr. RTL Design Engineer (Silicon Engineering)Palo Alto, CA$175,000–$280,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
NewAsic/Soc DFT Engineer (Silicon Engineering) Space Exploration TechnologiesAsic/Soc DFT Engineer (Silicon Engineering)Palo Alto, CA$135,000–$175,000 / yearWe are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). ITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.
NewSr. Embedded Controls Engineer – Scanning Systems Aeva, Inc.Sr. Embedded Controls Engineer – Scanning SystemsMountain View, CATesting and qualifying changes by coordinating with the reliability and test team to identify the appropriate test conditions, collect relevant data and present the results for approval. Within the range, the successful candidate’s starting base pay will be determined based on factors including job-related skills, experience, certifications, qualifications, relevant education or training, and market conditions.
NewHardware Test Engineer, Droid ZiplineHardware Test Engineer, DroidSouth San Francisco, CAAs we scale toward thousands of units in production and tens of thousands of flight cycles per unit, we need someone to own the ground testing that makes that scale credible - every fixture, life-test rig, environmental chamber, and automated bring-up station that proves the droid and zipping point work reliably together while exceeding our reliability targets. Our customers include the world's largest and most prominent healthcare systems, governments, retailers, restaurants and global businesses who rely on us to save lives, reduce emissions, increase economic opportunity, and provide delivery from point A to point B as fast as possible.
Senior Hardware Systems Engineer CrusoeSenior Hardware Systems EngineerSunnyvale, CaliforniaWe're looking for problem-solving, opportunity-finding teammates with a sense of urgency, who believe in the scale of our ambition and thrive on a path not fully paved — people who want to grow their careers alongside a team of experts across energy, manufacturing, data center construction, and cloud services. You will work closely with cross-functional teams to support, debug, and improve hardware platforms at scale, with a particular focus on PCIe, InfiniBand, and NVMe/storage, which have been identified as essential areas for deeper expertise.
NewSoftware Engineer III (Full Time) - United States ENG/CPO/WTG ETR Cisco Systems IncSoftware Engineer III (Full Time) - United States ENG/CPO/WTG ETRMilpitas, CA$155,000–$222,600 / yearRight now, we are actively investing in Wi-Fi 8, device health intelligence, and Edge AI, bringing neural processing directly onto access points to enable real-time network intelligence and next generation physical AI applications. For quota-based incentive pay, Cisco typically pays as follows: 75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and.
NewSenior Embedded Controls Engineer – Scanning Systems Aeva, Inc.Senior Embedded Controls Engineer – Scanning SystemsMountain View, CATesting and qualifying changes by coordinating with the reliability and test team to identify the appropriate test conditions, collect relevant data and present the results for approval. Within the range, the successful candidate’s starting base pay will be determined based on factors including job-related skills, experience, certifications, qualifications, relevant education or training, and market conditions.
NewSr. FPGA Verification Engineer Reliable Robotics CorporationSr. FPGA Verification EngineerMountain View, CaliforniaFPGA engineers at Reliable Robotics have a unique opportunity to work at the heart of a vertically integrated technology stack that goes all the way up to aircraft level, with a direct impact on the aircraft's capabilities and requirements. FPGA Verification Engineer, you will own the FPGA integration and test environment for multiple airborne products including their test benches & simulation, continuous integration, timing analysis, elemental analysis, and build.
Embedded Software Engineer Intern (Fall 2026) ZiplineEmbedded Software Engineer Intern (Fall 2026)South San Francisco, CAFrom deploying embedded software to devices across the world, fault response and handling, launching & landing, all the way to integration with our customer's physical & software systems, you will work with and learn from not only some of the most impressive embedded engineers in the field, but from a huge variety of our amazing Zipline team! Our customers include the world's largest and most prominent healthcare systems, governments, retailers, restaurants and global businesses who rely on us to save lives, reduce emissions, increase economic opportunity, and provide delivery from point A to point B as fast as possible.
Hardware Engineer (hybrid) - 2011668 Cisco Systems IncHardware Engineer (hybrid) - 2011668San Jose, CA$135,800–$193,400 / yearMeet the Team: Cisco Systems is seeking a System Level Test Engineer to validate and ensure the quality of next-generation networking platforms, including switches, routers, and data center systems. For quota-based incentive pay, Cisco typically pays as follows: 75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and.
Hardware Compliance Regulatory Engineer Cisco Systems IncHardware Compliance Regulatory EngineerSan Jose, CA$152,400–$221,800 / yearAs part of the central hardware power engineering group, you will collaborate with various functions like Hardware Design and Test, ASIC Design and Test, Power Engineering, Signal Integrity, EMC / EMI, and Mechanical Design, expanding the breadth of your knowledge, designing power, and delivering amazing products to the market. Minimum Qualifications: Bachelor's degree in electrical engineering, electronics engineering, RF Engineering, or related field with 7+ years of experience; or master's degree with 4+ years of experience or PhD with one year of experience.
Senior Systems Engineer AEye IncSenior Systems EngineerPleasanton, CA$140,000–$180,000 / yearWe are looking for a Senior Systems Engineer to join our systems engineering team and collaborate with internal architecture, hardware, software, firmware, and mechanical teams to drive the specifications of AEye''s lidar and its variants. Cross-functional collaboration: work with cross-functional teams to meet system-level targets, debug hardware and software interfaces, and resolve data quality and point cloud issues at the system level.
Hardware Validation Engineer Iconma LLCHardware Validation EngineerPalo Alto, CAFailure Analysis: Lead deep-dive root cause investigations for test failures, utilizing data reproduction and fault simulation to solve complex hardware/firmware bugs. Data Analytics: Provide advanced data analytics from conducted tests to drive design improvements and ensure compliance with Component Technical Specifications (CTS).
Sr. Full Chip Physical Verification Engineer (Silicon Engineering) Space Exploration TechnologiesSr. Full Chip Physical Verification Engineer (Silicon Engineering)Sunnyvale, CA$175,000–$280,000 / yearPREFERRED SKILLS AND EXPERIENCE: Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation). We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Principal Design Verification Engineer (Silicon Engineering) Space Exploration TechnologiesPrincipal Design Verification Engineer (Silicon Engineering)Palo Alto, CA$210,000–$355,000 / yearITAR REQUIREMENTS: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation).
Power Validation Engineer EtchedPower Validation EngineerSan Jose, CaliforniaDesign and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs. Demonstrated ability to design experiments that isolate root cause in a complex hardware-software stack, strong oscilloscope and lab instrument fluency (triggering on rare transient events, correlating multi-channel captures), and a track record of finding bugs that only surface under specific workload or environmental conditions.
System Engineer - HVDC Texas Instruments IncSystem Engineer - HVDCSanta Clara, CATexas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere.
Communications Systems Test Engineer AalyriaCommunications Systems Test EngineerMountain View, CaliforniaYou'll design and execute the experiments that determine whether our free space optical communications products actually perform, setting up benches with BERTs, AWGs, high-speed oscilloscopes, OSAs, and coherent DSPs, writing the automation that makes testing repeatable and scalable, and digging into the data with Python or MATLAB when results don't match the model. Utilize lab instrumentation such as Bit Error Rate Testers (BERTs), Arbitrary Waveform Generators (AWGs), high-speed Oscilloscopes, Optical Spectrum Analyzers (OSAs), Optical Power Meters (OPMs), Variable Optical Attenuators (VOAs), and Polarization Controllers.
Post-Silicon Validation Engineer EtchedPost-Silicon Validation EngineerSan Jose, CaliforniaBacked by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads.
Hardware Validation Engineer EtchedHardware Validation EngineerSan Jose, CaliforniaWe are seeking an experienced and motivated Hardware Validation Engineer to validate system hardware and printed circuit board (PCB) functionality and ensure robust power and signal margins across all interfaces. In this role, you will collect and analyze lab data to validate hardware performance, support post-silicon characterization, and ensure reliable operation across multiple subsystems, including PCIe and I2C.
R&D Software Engineer Keysight Technologies, Inc.R&D Software EngineerSanta Clara, CaliforniaOur ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Integrate Across Disciplines: Collaborate with hardware engineers and other technical teams to ensure seamless integration with analog/digital systems and negotiate design trade-offs.
Senior Hardware Systems Engineer, Performance CrusoeSenior Hardware Systems Engineer, PerformanceSunnyvale, CaliforniaWe're looking for problem-solving, opportunity-finding teammates with a sense of urgency, who believe in the scale of our ambition and thrive on a path not fully paved — people who want to grow their careers alongside a team of experts across energy, manufacturing, data center construction, and cloud services. We are seeking a Senior Hardware Systems Engineer to strengthen Crusoe’s Hardware Systems Engineering team and close critical skill gaps in debugging, validation, performance evaluation and production support of high-performance compute systems.
Sr. FPGA Design Engineer Reliable Robotics CorporationSr. FPGA Design EngineerMountain View, CaliforniaFPGA designers at Reliable Robotics have a unique opportunity to work within a vertically integrated technology stack that extends up to the aircraft level, with a direct impact on the aircraft's capabilities and requirements. In your role as an FPGA Design Engineer, you will work in a highly collaborative and cross-functional development environment including mutual peer review to maintain high product quality.
Robotics Systems Engineer Sunday RoboticsRobotics Systems EngineerRedwood City, CaliforniaAs an early member of a small, cross-functional team, you’ll play a key role in pushing both our technology and product forward: advancing the frontier of embodied AI, and soon giving countless hours back to our customers so they can spend more time on the things they value most. Support design of robot HW and SW systems, collaborating across teams to optimize the architecture of next-gen robot products for safety, performance, reliability, cost, and manufacturability.
FPGA Design Engineer Reliable Robotics CorporationFPGA Design EngineerMountain View, CaliforniaFPGA designers at Reliable Robotics have a unique opportunity to work within a vertically integrated technology stack that extends up to the aircraft level, with a direct impact on the aircraft's capabilities and requirements. In your role as an FPGA Design Engineer, you will work in a highly collaborative and cross-functional development environment including mutual peer review to maintain high product quality.
Staff Hardware Systems Engineer, Performance CrusoeStaff Hardware Systems Engineer, PerformanceSan Francisco, CaliforniaWe're looking for problem-solving, opportunity-finding teammates with a sense of urgency, who believe in the scale of our ambition and thrive on a path not fully paved — people who want to grow their careers alongside a team of experts across energy, manufacturing, data center construction, and cloud services. We are seeking a Staff Hardware Systems Engineer to strengthen Crusoe’s Hardware Systems Engineering team and close critical skill gaps in debugging, validation, performance evaluation and production support of high-performance compute systems.
Platform Validation Engineer Etched.ai IncPlatform Validation EngineerSan Jose, CAKey Responsibilities • Perform system hardware and PCB functional verification to ensure all features meet design specifications, including validation of power and signal integrity margins • Collect and analyze lab data to verify power delivery, signal integrity, and overall system robustness • Support post-silicon validation by identifying key performance metrics and conducting PVT, power, and thermal characterization • Evaluate PCIe performance, including signal integrity, eye opening measurements (EOM), and bit error rate (BER), to ensure adequate operating margins • Identify hardware issues, perform root cause analysis, and drive issues to resolution in collaboration with cross-functional teams • Design and execute DOE experiments to debug hardware issues and optimize system performance • Validate power sequencing, microcontroller functionality, and conduct power efficiency, noise, and transient analysis • Perform detailed characterization of I2C bus systems to ensure compliance with design requirements • Track and document PCB issues and validation results, ensuring clear communication with relevant stakeholders • Collaborate closely with design, firmware, and system engineering teams to ensure end-to-end hardware quality. Requirements You may be a good fit if you have: • A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field • Proven experience with hardware validation, lab testing, and PCB-level debugging • Strong understanding of power integrity and signal integrity principles and measurement techniques • Familiarity with PCIe, I2C, and other common hardware interfaces and protocols • Experience using lab equipment such as oscilloscopes, logic analyzers, spectrum analyzers, and power supplies • Hands-on experience debugging hardware issues and performing root cause analysis • Knowledge of power sequencing and microcontroller-based systems • Strong analytical and problem-solving skills, including experience with scripting languages such as Python or Matlab • Excellent communication skills and the ability to work effectively in cross-functional teams.
Power Validation Engineer Etched.ai IncPower Validation EngineerSan Jose, CADesign and execute power measurement campaigns across all voltage rails (VDD_CORE, HBM, PCIe, AUX, etc) under realistic LLM inference and power virus workloads; characterize peak, sustained, and idle power envelopes across PVT corners and define derating curves used in system thermal and PDN specs. Demonstrated ability to design experiments that isolate root cause in a complex hardware-software stack, strong oscilloscope and lab instrument fluency (triggering on rare transient events, correlating multi-channel captures), and a track record of finding bugs that only surface under specific workload or environmental conditions.
Hardware Qualification Engineer, Senior Staff d-Matrix CorpHardware Qualification Engineer, Senior StaffSanta Clara, CASignal & Power Integrity Validation: Provide senior-level oversight for the validation of high-speed SerDes (112G/224G/PCIe), LPDDR, CoWOS designs, and complex PDN (Power Delivery Network) transients. This is a high-impact, technical leadership role responsible for defining the qualification strategies that ensure our hardware-from ASIC substrates to Rack scale systems - can withstand the rigorous demands of 24/7 data center environments.
Principal LLM Inference Engineer d-Matrix CorpPrincipal LLM Inference EngineerSanta Clara, CAWe build the tools, runtimes, and frameworks that let frontier AI models run efficiently and cost-effectively across heterogeneous deployments - combining D-Matrix silicon with CPUs, GPUs, and custom accelerators. Our charter spans the full stack: from pathfinding emerging use cases and novel deployment patterns to deep optimization of inference kernels, to building proof-of-concept systems that showcase D-Matrix's unique computational fabric.
Hardware (Power) Engineer Cisco Systems IncHardware (Power) EngineerSan Jose, CA$135,800–$193,400 / yearAs part of the central hardware power engineering group, you will collaborate with various functions like Hardware Design and Test, ASIC Design and Test, Power Engineering, Signal Integrity, EMC / EMI, and Mechanical Design, expanding the breadth of your knowledge, designing power, and delivering amazing products to the market. Minimum Qualifications: Bachelor's degree in electrical or computer engineering or Power electronics with 5+ years of experience or a master's degree in electrical or computer engineering or Power electronics with 3+ years of experience or PhD with 0+ years of related experience.
Instrument Design Engineer/Scientist Stanford Research Systems, Inc.Instrument Design Engineer/ScientistSunnyvale, CA$80,000–$130,000 / yearEven if you've never built an instrument, if you own a soldering iron, have built electronic boxes, have written code to control an experiment, enjoy the technology of measurement as much as result itself, understand noise, Fourier transforms and op-amps, have used a spectrometer, vacuum pump or CAD system, then you may be wh o we are looking for. The ideal candidate will have experience with one or more of the following: Electronics (microcontrollers, FPGAs, ADCs, DACs, PLLs, analog, digital, RF, schematic capture and PCB design), software, firmware, HDL, and algorithm design.
Hardware Validation Engineer IconmaHardware Validation EngineerPalo Alto, CA$40.95–$54.15 / hourFailure Analysis: Lead deep-dive root cause investigations for test failures, utilizing data reproduction and fault simulation to solve complex hardware/firmware bugs. Data Analytics: Provide advanced data analytics from conducted tests to drive design improvements and ensure compliance with Component Technical Specifications (CTS).
Senior Thermal Test Engineer, Platforms Infrastructure GoogleSenior Thermal Test Engineer, Platforms InfrastructureSunnyvale, CAAs a Thermal Test Engineer at Google, you will collaborate closely with the Thermal Product Design Team to produce test plans, develop test fixtures, configure hardware and software systems, create scripts for hardware manipulation, and analyze and document the thermal performance of hardware systems. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Sr. Software Engineer, Megapack Test Automation Tesla IncSr. Software Engineer, Megapack Test AutomationPalo Alto, CA$120,000–$252,000 / yearThe Tesla Energy Software team is looking for a software engineer to help build the tools and automation behind the engineering and field-service application used to commission, monitor, and debug Tesla s utility-scale Megapack sites and Supercharger stations. You ll build full-stack diagnostics features and the test automation that keeps them reliable, so field engineers, commissioners, and remote operators can bring industrial energy and charging assets online faster.
Lead Audio ML Engineer HarkLead Audio ML EngineerSan Jose, CaliforniaWhile today's AI largely operates through chat boxes and decade-old devices, Hark is focused on what comes next: agentic systems that interact naturally with people and the real world. To get there, we're developing multimodal models and next-generation AI hardware together - designed from the ground up as a single, unified interface for a new era of intelligent systems.
Principal Software Engineer, Rack-Scale System Software - CSP Engagements NVIDIA CorpPrincipal Software Engineer, Rack-Scale System Software - CSP EngagementsSanta Clara, CAWhat you'll be doing: Drive rack-scale SW/FW architecture alignment across CSP engagements - including fabric management software, link health monitoring, GPU/NVSwitch error handling, SW/FW serviceability features (e.g., hot-plug support, component isolation, firmware-driven recovery), and multi-component firmware orchestration. Drive technical work streams with CSP engineering teams on rack-scale system software - ensuring they deeply understand fabric management, NVSwitch behavior, error handling and recovery policies, health telemetry APIs, and SW/FW-controlled recovery operation.
Principal Software Engineer - Rack Scale Systems Infrastructure NVIDIA CorpPrincipal Software Engineer - Rack Scale Systems InfrastructureSanta Clara, CAWhat You Will Be Doing: Define the complete software architecture for rack-scale infrastructure products and services, covering control plane services, infrastructure management, firmware, operating systems, kernel drivers, networking fabrics, accelerator software, and user-mode manageability software. Partner directly with hyperscalers, CSPs, enterprise customers, internal component leads, vendors, and business partners to align infrastructure capabilities with real-world deployment and integration needs.
Senior Embedded Engineer ButlrSenior Embedded EngineerBurlingame, CA$150,000–$200,000 / yearOur sensors power occupancy intelligence for enterprises, senior living communities, healthcare organizations, laboratories, and commercial real estate worldwide, with more than 30,000 privacy-preserving sensors deployed. You'll own significant pieces of the embedded stack end to end — firmware, OS builds, connectivity, and OTA — and your work on remote access, updates, and cloud connectivity will be pivotal to our product reliability.
System Software Engineer, Networking TensordyneSystem Software Engineer, NetworkingSunnyvale, CaliforniaDrive route, neighbor, next-hop, and ECMP programming flows from control-plane intent all the way to confirmed ASIC hardware state, and build mechanisms that distinguish control-plane acceptance from SDK acceptance from hardware programming acknowledgement. This is a deeply technical, hands-on role for someone who is at home moving up and down the stack — tuning userspace services, patching kernel drivers, and reaching into firmware — to squeeze latency, bandwidth, and reliability out of large, lossless networks.
Senior Embedded Software Engineer MatternetSenior Embedded Software EngineerMountain View, CA$190,000–$240,000 / yearWorking across microcontrollers, embedded Linux, and the buses and peripherals that connect them, you'll bring up new hardware, own the drivers and firmware that make sensors and actuators reliable, and harden the embedded systems our delivery ecosystem depends on for every flight. This is a senior individual-contributor role with real ownership: you'll own embedded subsystems end-to-end, from board bring-up through flight test and regulated change control, working closely with Electrical, Mechanical, and Onboard Software teams.
Principal Software Engineer, At-Scale Reliability and Fleet Intelligence - CSP Engagements NVIDIA CorpPrincipal Software Engineer, At-Scale Reliability and Fleet Intelligence - CSP EngagementsSanta Clara, CAWe're looking for a Principal Software Engineer to join our CSP Engagements team as the technical focal point for fleet-scale reliability, working directly with engineering teams of key CSP / hyperscale customers to ensure NVIDIA platforms achieve target MTBI (Mean Time Between Interruptions) in production. You will drive work streams with CSP engineering teams to build shared understanding of reliability software/firmware architecture, methodology, incorporate their fleet telemetry and failure data into NVIDIA's improvement priorities, and validate that reliability improvements measured in the lab translate to real customer environments.
Senior Silicon Power, Thermal Validation And Methodology Engineer NvidiaSenior Silicon Power, Thermal Validation And Methodology EngineerSanta Clara, CASpecific examples of silicon-level impact, such as faster bring-up, stronger characterization coverage, better debug turnaround, and methodology improvements that reduced risk across programs. Build AI-enabled workflows to automate data analysis, metric extraction, trend checks, and report generation across multiple bringups to improve, leverage, and shorten time to market.
Principal Software Engineer, At-Scale Reliability And Fleet Intelligence - CSP Engagements NvidiaPrincipal Software Engineer, At-Scale Reliability And Fleet Intelligence - CSP EngagementsSanta Clara, CAWe're looking for a Principal Software Engineer to join our CSP Engagements team as the technical focal point for fleet-scale reliability, working directly with engineering teams of key CSP / hyperscale customers to ensure NVIDIA platforms achieve target MTBI (Mean Time Between Interruptions) in production. You will drive work streams with CSP engineering teams to build shared understanding of reliability software/firmware architecture, methodology, incorporate their fleet telemetry and failure data into NVIDIA's improvement priorities, and validate that reliability improvements measured in the lab translate to real customer environments.