NewDFT Lead Engineer Broadcom CorporationDFT Lead EngineerSan Jose, CAThe candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production.
NewDFT Lead Engineer Broadcom IncDFT Lead EngineerSan Jose, CAThe candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products Division)'s designs - DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production.
PCB Layout Engineer Cowboy SpacePCB Layout EngineerSan Carlos, California$128,000–$160,000 / yearOur satellites operate in Low Earth Orbit to collect sunlight and enable a new class of capabilities—from powering on-orbit compute, to transmitting energy via infrared lasers (space-to-earth and space-to-space), powering on-orbit compute to delivering secure, high-bandwidth optical data. Export Control Requirement: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR), applicants must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Sr. Electrical Engineer, Validation Platforms Tesla IncSr. Electrical Engineer, Validation PlatformsPalo Alto, CA$100,000–$150,000 / yearThis role works within a multi-disciplinary validation infrastructure team delivering electrical engineering designs of various test infrastructure form factors ranging between PBCA and large scale custom hardware-in-the-loop platforms. Proficiency with PCBA schematics and datasheets, placing for low parasitic capacitance, inductance, and PCB layout techniques for power electronic circuits and mixed small signal circuits.
Staff Software Engineer, Google Cloud Business Platforms Google LLCStaff Software Engineer, Google Cloud Business PlatformsSunnyvale, CACareers Careers home home_outline Jobs expand_more noogler_hat Students expand_more google How we work expand_more handyman How we hire expand_more person_outline Your career expand_more. home home Home home_outline work_outline Jobs Jobs noogler_hat noogler_hat Students Students googlegoogle.
Senior Software Engineer, Machine Learning, Core ML Google LLCSenior Software Engineer, Machine Learning, Core MLMountain View, CAExperience with deep learning frameworks (e.g., JAX, PyTorch, or TensorFlow), including a track record of contributing to or modifying their core internals to support novel and emerging use cases. Design and manage large-scale training runs across multi-pod environments, maximizing data center network bandwidth and minimizing communication bottlenecks.
Staff Software Engineer, AI and Infrastructure Google LLCStaff Software Engineer, AI and InfrastructureSunnyvale, CAThe Borglet Infrastructure group in Borglet is a team of 30 SWEs (distributed between Sunnyvale and Warsaw) developing core pieces of Borglet (Software Architecture, Runtime, Machine Management, Storage) to deliver the container infrastructure that is scalable, extensible, efficient and secure. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud.
Software Engineer III, Mobile (Android), YouTube Google LLCSoftware Engineer III, Mobile (Android), YouTubeSan Jose, CAhome home Home work_outline Jobs Jobs noogler_hat Students Students google How we work How we work handyman How we hire How we hire person_outline Your career Your career help_outline Help link feedback Send feedback more_vert Help Send Feedback Sign in. Careers Careers home home work_outline Jobs expand_more noogler_hat Students expand_more google How we work expand_more handyman How we hire expand_more person_outline Your career expand_more.
Staff Data Engineer, Search, Data Science Google LLCStaff Data Engineer, Search, Data ScienceMountain View, CAYou will work end-to-end to help build products that users love, enabling headroom analysis, experiment analysis, and technical trade-offs between competing metrics (e.g., richness of experience vs. Own the data engineering strategy for high-stakes Search initiatives, designing multi-stage data products that process data for billions of users.
Post Silicon Validation Engineer, AI Hardware Tesla IncPost Silicon Validation Engineer, AI HardwarePalo Alto, CA$160,000–$282,000 / yearThe candidate will regularly take part in hardware design and schematics review, firmware development, and building automated test infrastructures for running large volumes of post-silicon system-level tests. By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life.
Internship, AI Hardware Silicon Validation Engineer, AI Hardware (Fall 2026) Tesla IncInternship, AI Hardware Silicon Validation Engineer, AI Hardware (Fall 2026)Palo Alto, CA$20–$55 / hourBy creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life. As a Silicon Validation Engineer, the candidate will take on challenges like validating High-Speed Serdes, perform system level power characterization, and troubleshooting complex hardware bugs and field returns.
Staff Robot Controls Integration Engineer Rhoda AIStaff Robot Controls Integration EngineerMountain View, CaliforniaOur robots are designed to be generalists capable of operating in complex, real-world environments and handling long-tail edge cases, made possible by our cutting edge research and end-to-end system design. This role sits at the intersection of embedded firmware, control theory, and hardware bringup: you'll validate control behavior across the full stack, diagnose timing and performance issues, and drive fixes that make our robots actually work .
Senior Mechanical Engineer Teradyne, Inc.Senior Mechanical EngineerSan Jose, CA$121,700–$214,200 / yearThe candidate will be able to take product requirements and with minimal oversight, be able to develop detailed design solutions, be able to present to other design engineers and manufacturing engineers the proposed solution, perform DFM with vendors, and prepare final drawings and BOMs for fabrication. The ideal candidate would have a working knowledge and previous experience with some or all of the following topics: Familiar with electrical connector design both for power delivery and high speed signal delivery.
Application Validation Engineer Super Micro Computer IncApplication Validation EngineerSan Jose, CA$89,000–$115,000 / yearThe individual will work with cross-functional engineering team to fix quality issues and ensure the products meet engineering and customer specifications, support Research and Development engineering and pre-and-post product release activities, such as white-box design verification, BIOS/IPMI testing on the board products, as well as on the system level, black-box testing. About Supermicro: Supermicro is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide.
RTL / Circuit IP Design Engineer Advanced Micro Devices, IncRTL / Circuit IP Design EngineerSan Jose, CaliforniaThe focus of this role is to plan, build, and execute the implementation of new and existing features for AMD’s programmable embedded IP, resulting in final designs that meet product defined power, performance, and area targets with intended functionality that operates on silicon and is modeled accurately for customer design use. Strong understanding of circuit design concepts, translating circuit designs in an optimal way to either custom implementations or with best practices for RTL synthesis .
Staff HiL SW Infrastructure Engineer Agility Robotics IncStaff HiL SW Infrastructure EngineerFremont, CA$190,000–$247,000 / yearAgility's commercially deployed humanoids operate alongside teams in warehouses, manufacturing facilities, and distribution centers-tackling physically demanding and repetitive tasks while enabling workers to focus on higher-value work. Fault Injection Implementation: Programmatically control Fault Injection Units (FIU) to simulate short-to-battery, short-to-ground, and open-circuit conditions on critical robot signals.
NewSr Clinical Engineer Imperative CareSr Clinical EngineerCampbell, CA$140,000–$150,000 / yearEnsure detailed plans are executed fully to support internal development projects with preclinical testing including bench testing, model development needs, in-vitro test methods and plans and in-vivo animal studies. Serve as a clinical engineering team member for product development including preclinical testing, bench testing, model development needs, in-vitro test methods and plans and in-vivo animal studies.
Analog And Mixed Signal Design Engineer Intel Corp.Analog And Mixed Signal Design EngineerSanta Clara, CA$164,470–$269,100 / yearPreferred Qualifications: Experience in one or more of the following areas is preferred: GPIOs, high speed parallel or serial IO links and their subcomponents (data path, TX, RX, etc.), clock distribution, clock conditioning, clock recovery circuits, voltage regulators, voltage reference circuits, ADCs/DACs, inductors, transmission lines, RF and millimeter-wave circuits, test of custom analog and mixed-signal circuits. Business group: Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly.
Senior Optomechanical Engineer Lawrence Livermore National LaboratorySenior Optomechanical EngineerLivermore, CA$175,530–$222,564 / yearAn employee's position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, seniority, geographic location, performance, and business or organizational needs. Our mission spans four critical national security areas nuclear deterrence, threat preparedness, energy security, and multi-domain defense empowering teams to take on the toughest challenges of today and tomorrow.
NewAssociate Design Engineer DustPhotonics LtdAssociate Design EngineerSan Jose, CA$100,000–$150,000 / yearOur product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Our technology powers the most reliable and energy-efficient connections around the world - and our team powers new products and markets that come next.
Lead Software Test Infrastructure Engineer ALTEN Technology USALead Software Test Infrastructure EngineerPalo Alto, CA$135,000–$155,000 / yearAs a Lead Software Test Infrastructure Engineer, you will be responsible for designing, developing, maintaining, and scaling automated test frameworks and tools that enable efficient software testing. Experience with software testing tools, frameworks, and methodologies (e.g., requirements-driven test development, unit testing, integration testing, system testing, automated testing).
Lead Software Test Infrastructure Engineer ALTEN TechnologyLead Software Test Infrastructure EngineerPalo Alto, CaliforniaAs a Lead Software Test Infrastructure Engineer, you will be responsible for designing, developing, maintaining, and scaling automated test frameworks and tools that enable efficient software testing. Experience with software testing tools, frameworks, and methodologies (e.g., requirements-driven test development, unit testing, integration testing, system testing, automated testing).
Senior RTL Engineer, Interconnect Design OpenAISenior RTL Engineer, Interconnect DesignSan Francisco, CAFor unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale.
Chief Systems Engineer (CSE) E-SpaceChief Systems Engineer (CSE)Saratoga, CA$190,000–$225,000 / yearWith Space Systems Electrical Engineering (SSEE) as an organic fifth function, the CSE also holds sole authority over the spacecraft-level electrical architecture and the electrical ICD framework to which every hardware VP and Semiconductor Development designs. We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.
NewMission Systems Engineer E-SpaceMission Systems EngineerSaratoga, CA$100,000–$200,000 / yearVerification & Validation — building and executing the mission V&V plan, defining and tracking Technical Performance Measures (TPMs), planning environmental test campaigns (TVAC, vibration/acoustic, EMI/EMC), and dispositioning test data and anomalies for the assigned mission. Program and customer interface — serving as the technical point of contact to the government customer and Program Manager for the assigned contract; preparing for and presenting at contract technical reviews and milestones (e.g., SRR, PDR, CDR, TRR) and closing associated action items.
NewElectrical Systems Engineer Lawrence Livermore National LaboratoryElectrical Systems EngineerLivermore, CA$154,950–$196,476 / yearCollaborate and provide day-to-day technical direction to a group of Infrastructure & Operations technical personnel, including shop/crafts personnel, engaged in the planning, engineering, troubleshooting, maintenance, and operations of low-voltage (under 600V) building electrical distribution systems including emergency and standby power systems, electrical components, and electrically operated equipment for non-reactor nuclear facilities and conventional facilities. Conduct root-cause analysis of equipment or systems failures using a systematic methodology to determine and correct root causes of problems, unplanned events, and occurrences related to the maintenance and the reliability of low-voltage building electrical systems, electrical components, and electrically operated equipment.
TPU SoC Design Engineer, Cloud Google LLCTPU SoC Design Engineer, CloudSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. You will work on top-level RTL, architecture, design and implementation of global communication busses, and integration of complex ASIC designs, as this is a highly cross-functional and central role that will require interactions with numerous ASIC development teams.
TPU Hardware Design Engineer, Cloud Google LLCTPU Hardware Design Engineer, CloudSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. You will join the team designing and developing the on-chip network of Google"s next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in data centers.
Senior TPU Validation Engineer Google LLCSenior TPU Validation EngineerMountain View, CAGoogle is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. Minimum qualifications: Bachelor"s degree in Electrical Engineering, Computer Engineering, Computer Science, a related technical field, or equivalent practical experience.
Silicon Physical Design Engineer Google LLCSilicon Physical Design EngineerSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. You"ll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Package Design Engineer Google LLCPackage Design EngineerSunnyvale, CAAdditionally, you will be instrumental in identifying and incorporating advanced chip packaging technologies into the Google chip product design pipeline, which contributes to successful chip deployment in data centers, ensuring the best optimized PPA (Power, Performance, Area) designs and enhancing system performance relative to TCO (Total Cost of Ownership) and power. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
NewTPU PCIe RTL Design Engineer Google LLCTPU PCIe RTL Design EngineerSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Join the team designing and developing the core components of Google"s next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in data centers.
RTL Design Engineer, TPU and ML Google LLCRTL Design Engineer, TPU and MLSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. In this role, you will join the team designing and developing the On-Chip Network of Google"s next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in datacenters.
Senior Design and Integration Engineer, Cloud TPU Google LLCSenior Design and Integration Engineer, Cloud TPUSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Join the team designing and developing the On-Chip Network of Google"s next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in datacenters.
Senior RTL Design Engineer, TPU Google LLCSenior RTL Design Engineer, TPUSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects Google LLCSenior TPU RTL Design Engineer, Networking, Inter-Chip InterconnectsSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Join the team designing and developing the core components of Google"s next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in data centers.
Silicon Validation Engineer, Google Cloud Google LLCSilicon Validation Engineer, Google CloudSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Debug and help root-cause failures, providing feedback to improve features like power management quality, performance, and reliability through generations of designs, including in pre-silicon prototyping platforms as well as through post-silicon bringup and production.
Senior Packaging Design Engineer, Silicon Google LLCSenior Packaging Design Engineer, SiliconMountain View, CA$163,000–$237,000 / yearCollaborate closely with Signal Integrity (SI), Power Integrity (PI), Test, New Product Introduction (NPI), and Mechanical Engineering teams to refine and optimize product package architecture and design. Skip navigation links home Home work_outline Jobs noogler_hat Students google How we work handyman How we hire person_outline Your career help_outline Help.
TPU SoC Design Engineer, Google Cloud Google LLCTPU SoC Design Engineer, Google CloudSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving force behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
TPU RTL Design Engineer Google LLCTPU RTL Design EngineerSunnyvale, CAFrom software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. We"re the driving team behind Google"s groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future.
Senior Software Engineer, Embedded Security, Silicon Google LLCSenior Software Engineer, Embedded Security, SiliconMountain View, CAApplyshare linkCopy linkemailEmail a friendinfo_outlineXNote By applying to this position you will have an opportunity to share your preferred working location from the following Mountain View CA USA San Diego CA USA.Minimum qualificationsBachelors degree or equivalent practical experience.5 years of experience with software development in one or more programming languages e.g. Were looking for engineers who bring fresh ideas from all areas including information retrieval distributed computing large-scale system design networking and data storage security artificial intelligence natural language processing UI design and mobile the list goes on and is growing every day.
Senior Systems Engineer Santa Clara Valley Transportation AuthoritySenior Systems EngineerSan Jose, CA$165,053.24–$200,603.54 / yearUnique among transportation organizations in the San Francisco Bay Area, VTA is Santa Clara County's authority for transit development and operations (light rail and bus), congestion management, transportation-related funding, highway design and construction, real estate and transit-oriented development, and bicycle and pedestrian planning. The position works closely with maintenance teams, contractors, consultants, and other engineering disciplines, requiring strong technical judgment, project management capability, and the ability to deliver practical, effective solutions in a dynamic operating environment.
Flight Research Senior Systems Engineer Joby Aviation IncFlight Research Senior Systems EngineerSanta Cruz, CA$161,400–$222,000 / yearSafety & Reliability Leadership: Drive System Safety Assessments (SSA), Functional Hazard Assessments (FHA), and Failure Mode, Effects, and Criticality Analysis (FMECA) for complex autonomous systems. The Systems Engineers will own the architecture, integration, and life-cycle success of a single or multiple avionics systems, ranging from requirements management, development, certification, and entry into service.
Applied AI Engineer, Silicon Engineering Etched AIApplied AI Engineer, Silicon EngineeringSan Jose, CAYou do not need to be a chip designer or a traditional software engineer - you need to be an exceptional problem solver who has shipped real agentic systems, works comfortably across stacks and domains, and uses AI to ramp on hard new problems fast. Build, deploy, and maintain LLM-agent workflows that accelerate chip development: debug triage, testbench and coverage work, log/waveform analysis, EDA script generation, and engineering knowledge retrieval.
Staff FPGA Engineer Vector AtomicStaff FPGA EngineerPleasanton, CA$150,000–$180,000To comply with the US export control laws, Vector Atomic employees must be U.S. citizens (born or naturalized), lawful U.S. permanent residents (green card holders), and certain categories of refugees, and asylees. Our team of engineers, scientists, software developers, and operations professionals works together to solve complex challenges and turn bold ideas into real-world solutions.
Staff Autonomy Systems Engineer Joby Aviation IncStaff Autonomy Systems EngineerSanta Cruz, CA$201,700–$238,000 / yearThe role will be involved in defining high level requirements in alignment with stakeholder objectives, targeted decomposition of requirements in high risk areas, creating technology development roadmaps to increase TRL and reduce operational risk, defining key interfaces between systems, and generating V&V plans and test cases to verify requirements and validate the design. They are responsible for translating mission objectives into technical requirements, ensuring seamless collaboration between hardware and software teams, balancing competing constraints (cost, schedule, and performance), and validating that all parts safely achieve the mission.
CPU Emulation Engineer Qualcomm IncCPU Emulation EngineerSanta Clara, CA$167,100–$250,700 / yearMinimum Qualifications: Bachelor''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience. Master''s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Systems Development Engineer Google LLCSystems Development EngineerSunnyvale, CAAlternatively, will accept a Master's degree in Computer Science, Information Technology, Electrical Engineering, Computer Engineering or a related field, and 1 year of experience in the job offered or in a Systems Development Engineer-related occupation. Minimum qualifications: Bachelor's degree in Computer Science, Information Technology, Electrical Engineering, Computer Engineering or a related field and 3 years of experience in the job offered or in a Systems Development Engineer-related occupation.
Senior ASIC Design Engineer - Terawave Blue Origin Enterprises LPSenior ASIC Design Engineer - TerawaveCA$230,398–$322,556.85 / yearand/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing (CDL drivers only), vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. We are seeking a ASIC/SOC Design Validation engineers (all levels including Senior, Principal, Senior Principal) to work in the Design Validation team who are critical to ensuring our RFIC/ASIC designs culminate in thoroughly validated cutting-edge integrated circuits that drive Blue Origin's mission of enabling millions to live and work in space for the benefit of Earth.
Senior Mechanical Engineer Span.IOSenior Mechanical EngineerSan Francisco, CAYour work directly enables the productivity of a broader engineering bench, including multiple senior and senior staff engineers in India whose effectiveness depends on a strong, well-organized partnership across time zones. Architecting an improved international 2D CAD collaboration workflow - file structure, drawing templates, intake process, status tracking - in partnership with engineering leadership across both offices.