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You'll use your exceptional design and analytical skills to lead, plan, design and focus on mechanical (plumbing, HVAC, odor control, and fire protection) systems for water and wastewater treatment-related facilities, which typically feature process treatment buildings, administration and operations buildings, laboratories, maintenance buildings, and occasional assignments for other business units, including federal and military programs, industrial, and institutional projects. At Jacobs, we're challenging today to reinvent tomorrow by solving the world's most critical problems for thriving cities, resilient environments, mission-critical outcomes, operational advancement, scientific discovery and cutting-edge manufacturing, turning abstract ideas into realities that transform the world for good.

YEAR

Jacobs Solutions Inc

Senior Building Mechanical Engineer

Collaborating with cross-disciplinary teams, the CTO plays a pivotal role in delivering impactful designs that support Intel''s broader mission of creating world-changing technology. Bachelor''s degree in Electrical Engineering, Computer Engineering, or a related field and 6+ years of hands-on physical design experience OR a Master''s degree with 4+ years of relevant experience.

Intel Corp

Qubit Control Physical Design Engineer

We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Minimum Qualifications: B.S. degree in Electrical Engineering, Computer Engineering, or a related field AND 5+ years of experience in IC substrate design for CPU, GPU, SoC/ASIC, and/or relevant design architectures.

Quantum IC Package Substrate Design Engineer

You will be a member of the R&D digital Application-Specific Integrated Circuit (ASIC) design team that develops the main controller with critical HP proprietary intellectual property that separates HP printers from the rest of the competitions. The pay range for this role is $116,150 to $182,400 USD annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only).

Senior ASIC Design Engineer

Conduct detailed analysis including structural, finite element analysis (FEA), thermal, heat transfer, stress, vibrations, fluid and gas flow dynamics, and manufacturability to properly specify designs. Support the full life cycle of mechanical and electro-mechanical systems from concept to productization including conceptualization, designing, CAD modeling, development, and test/validation.

From smartphones and tablets to wearables and automobiles, it’s hard to go more than a few hours without using a semiconductor-enabled device. The semiconductor industry touches nearly every person on the planet, and chipmakers continue to advance the technology that powers it all.    
As a trusted partner to the world’s leading semiconductor companies, we welcome challenges and we deliver. That’s why, today, nearly every advanced chip is built with Lam technology.   
Our innovative wafer fabrication equipment and services allow chipmakers to build smaller and better performing devices. We combine superior systems engineering, technology leadership, and a strong values-based culture, with an unwavering commitment to our customers.

Lam Research Corp

Mechanical Engineer 4

Your experience described above must be in the following: Experience with integrated circuit design tools (ex: Synopsys/Cadence), including logic synthesis, place and route, static timing analysis and design closure. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Senior Physical Design Engineer

As a member of our CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on implementation, synthesis and timing closure while collaborating closely with the logic design team on micro-architecture definition and feasibility. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

Visualize your future . . . We Do 
NVIDIA is the world leader in graphics processing technologies, creating innovative, industry-changing products for computing, consumer electronics, and mobile devices. NVIDIA products are transforming visually-rich applications such as video games, film production, broadcasting, industrial design, space exploration, and medical imaging. We invest in our people and our technologies, support and fund industry research around the world, and consistently deliver high-quality products. NVIDIA's culture promotes and inspires a team of world-class employees to be at the top of their game. We've created an environment where talents are recognized and collaboration is valued. Our employees are shaping the world of tomorrow. . . today. We invite you to explore the opportunities available at NVIDIA to see what your future may hold.

NVIDIA

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects

The Aerospace, Defense, Government (ADG) - The Senior DFT Logic Design Engineer provides technical support to Intel Foundry Services customers on our PDKs, DFT/DFM insertion, ATPG validation methodology and flows. With a focus on scalability, AI advancement, and shaping the future, we provide an unparalleled blend of an industry-leading technology, a rich IP portfolio, a world-class design ecosystem, and an operationally resilient global manufacturing supply chain.

Intel Corp.

Senior DFT Logic Design Engineer

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As a critical contributor to our design ecosystem, you will drive the creation and optimization of complex layouts for analog signal circuits, ensuring that our designs meet stringent performance, area, and reliability requirements. Preferred Qualifications and Experience: Strong understanding of analog layout effects including mismatch, parasitics, IR drop, electromigration (EM), and coupling, and their impact on circuit performance.

Academic Coordinator Jobs in Binghamton, NY

Senior Building Mechanical Engineer Jacobs Solutions Inc

Qubit Control Physical Design Engineer Intel Corp

Quantum IC Package Substrate Design Engineer Intel Corp

Senior ASIC Design Engineer HP

Mechanical Engineer 4 Lam Research Corp

Senior Physical Design Engineer Intel Corp

Senior ASIC Physical Design Engineer, Cache Coherent Interconnects NVIDIA

Senior DFT Logic Design Engineer Intel Corp.

Analog Layout Design Engineer Intel Corp.

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