Signal and Power Integrity Engineer

Google

Sunnyvale, CA

JOB DETAILS
SKILLS
3D Design, 3D Graphics Software, ASIC (Application Specific Integrated Circuit), Analysis Skills, Artificial Intelligence (AI), Automation, C++ Programming Language, Cloud Computing, Computer Engineering, Computer Science, Cross-Functional, Data Analysis, Data Processing, Develop Methodologies, Electrical Engineering, Electricity, Equal Employment Opportunity (EEO), Establish Priorities, Ethernet, Google Search Engine, HFSS (High Frequency Structure Simulator), IP (Internet Protocol), Input/Output, MATLAB, Machine Learning, Materials Engineering, Mechanical Engineering, Memory Hardware, Memory Testing, PCI Express (PCI-E), PHY, Power Engineering, Printed Circuit Board (PCB), Printed Circuit Board Design, Product/Service Launch, Python Programming/Scripting Language, SERDES, Signal Integrity, Simulation, System Architecture, System Integration (SI), System Validation, YouTube
LOCATION
Sunnyvale, CA
POSTED
27 days ago

Minimum qualifications:

  • Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering, Technology, Science, a related field, or equivalent practical experience.
  • 8 years of experience in SI/PI design for chip/package or system PCB.
  • Experience in industry SI/PI modeling tool chains (e.g., HFSS, ADS, Sigrity, Siwave, etc.).

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Experience with signal and power integrity with various high speed interconnects (e.g., HBMx, D2D, Ethernet, PCIe, etc.).
  • Experience with 2.5D/3D package design such as silicon interposer, silicon bridge, 3D die stacking.
  • Experience in co-design with chip top design, physical design, STA, package, system and validation teams.
  • Familiarity with the post SI test environment on memory or high speed serdes.
  • Excellent programming and data analysis skills with MATLAB, Python, C++, etc. to establish automation flows and data processing.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Chip Package Signal Integrity/Power Integrity (SI/PI) Engineer, you will be responsible for the chip package design with signal/power integrity simulation and characterization in the chip, package and system level. Within a concurrent engineering environment, you will be the main part of a larger team with system architects, ASIC engineers, and other SI/PI engineers. You will work with multi cross-functional teams including chip design team, board design team, system design team as well as vendors. You will drive chip packaging signal and power implementations to meet chip, package and system electrical requirements.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $163000 - $237000 (USD) + 15% bonus target + bonus + equity + benefitsLearn more about benefits at Google.

Responsibilities

  • Drive SI/PI analysis and optimization for HPC based on 2.5D/3D technology, influencing product definition, chip floorplan, power tree structures, and netlists.
  • Lead the development of next-generation memory interfaces and evaluate high-speed interface IP, considering Input/Output Physical Layer (IO PHY), physical design, and SI/PI requirements.
  • Manage post-silicon validation and qualification of high-speed interfaces for New Product Introduction (NPI), ensuring performance meets production standards.
  • Partner with chip/system design teams and external vendors to define SI/PI design goals, set chip boundaries, and balance SI/PI and DFM tradeoffs for production closure.
  • Develop innovative methodologies to enhance simulation accuracy and productivity while providing critical feedback on chip floorplans to optimize routability and signal integrity.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

About the Company

G

Google

Build for everyone

Since our founding in 1998, Google has grown by leaps and bounds. Starting from two computer science students in a university dorm room, we now have thousands of employees and offices around the world. These Googlers build products that help create opportunities for everyone, whether down the street or across the globe.

It starts with how we work together. We’re building a company where people of different views, backgrounds and experiences can do their best work and show up for one another. A place where every Googler feels like they belong.

So whether you develop new technology or creative campaigns, craft beautiful products or breakthrough partnerships, your work here is a chance to accomplish things that matter. Bring your insight, imagination, and healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.

Benefits

We strive to provide Googlers and their loved ones with a world-class benefits experience, focused on supporting their physical, financial, and emotional wellbeing. Our benefits are based on data, and centered around our users: Googlers and their families. They’re thoughtfully designed to enhance your health and wellbeing, and generous enough to make it easy for you to take good care of yourself (now, and in the future). So we can build for everyone, together.

Learn more about Google’s benefits on this site featuring Googlers’ experience.

How we Hire

Google’s hiring process is an important part of our culture. Googlers care deeply about their teams and the people who make them up. In order to  build for everyone, we know that we need a wide range of perspectives and experiences, and a fair hiring process is the first step in getting there.

Learn more about our hiring process.

COMPANY SIZE
10,000 employees or more
INDUSTRY
Computer Software
EMPLOYEE BENEFITS
Paid Sick Days, Performance Bonus, Professional Development, 401K, Stock Options, Employee Events, Retirement / Pension Plans, Tuition Reimbursement, Work From Home, Life Insurance, On Site Cafeteria
FOUNDED
1998
WEBSITE
https://goo.gle/4dbno6V