Senior Mixed-Signal Verification Engineer -Power Management ICs

What You’ll Do 

• Develop and execute mixed-signal verification plans for high-current IVR designs. 

• Build and maintain analog behavioral models (Verilog-A / SystemVerilog real-number modeling) for power stages, integrated inductors, PDN, and analog blocks. 

• Perform analog-digital co-simulation using industry-standard tools (Cadence Xcelium + Spectre, Synopsys VCS + FineSim / CustomSim, or AMS Designer). 

• Verify digital control loops 

• Create testbenches for key performance metrics: transient response (load steps), loop stability, efficiency, ripple, over-current / over-voltage protection, and startup/shutdown sequences. 

• Run regressions across PVT corners, Monte-Carlo analysis, and corner-case scenarios. 

• Debug mixed-signal issues at both transistor-level and behavioral level. 

• Collaborate closely with analog designers, digital designers, and system engineers to close verification coverage. 

• Develop automated verification scripts and improve verification methodology for faster turnaround. 

• Support post-silicon validation by correlating simulation results with lab measurements. 

What We’re Looking For 

• 5+ years of hands-on experience in mixed-signal verification of power management ICs or analog/mixed-signal SoCs. 

• Strong proficiency in mixed-signal simulation flows: 

• Real Number Modeling (RNM) and Verilog-A behavioral modeling 

• Analog-digital co-simulation (AMS, VCS + Spectre, Xcelium) 

• Solid understanding of power converter topologies (buck, multi-phase, 3-level buck, switched-capacitor converters). 

• Good knowledge of digital control concepts for power converters (PID controllers, DPWM, digital feedback loops). 

• Experience with MATLAB/Simulink for system-level modeling and testbench reference generation. 

• Proficiency in SystemVerilog and UVM for digital/mixed-signal testbenches. 

• Familiarity with Cadence Virtuoso, Spectre, or Synopsys CustomSim for analog simulation. 

• Understanding of analog non-idealities (quantization effects, loop delay, sensor offsets, PDN resonances, inductor non-linearities). 

• BSEE / MSEE with 8+ years relevant experience. 

Nice to Have

• Experience verifying high-frequency IVRs, PoL regulators, or high-current power delivery systems. 

• Experience with SIMPLIS, PLECS, or Simulink for system-level power electronics validation. 

• Familiarity with digital PID controller verification and fixed-point arithmetic effects. 

• Exposure to advanced packaging and on-die inductor modeling. 

• Scripting skills in Python, Perl, or Tcl for automation. 

Location

Hybrid/On-site - San Jose, CA / Remote -USA