IC Enable is seeking an experienced RTL Design Engineer to support digital IC development from architecture through implementation. This role is ideal for an engineer with strong Verilog/SystemVerilog RTL design experience, a solid understanding of ASIC/SoC development flows, and the ability to collaborate across design, verification, analog/mixed-signal, physical design, and product engineering teams. The RTL Design Engineer will contribute to advanced semiconductor programs across application areas such as neurostimulation, ultrasound, read-out integrated circuits (ROICs), wireless transceivers, energy harvesting, sensor interfaces, defense electronics, and other high-reliability digital and mixed-signal systems. Location: Richardson, TX (Hybrid, Remote considered based on experience and qualifications) What You’ll Do: - Develop, integrate, and debug Verilog/SystemVerilog RTL for digital blocks, processing logic, control logic, interfaces, and mixed-signal IC subsystems
- Translate architecture, system, and product requirements into efficient, maintainable RTL implementations
- Support block-level and subsystem-level integration, including IP integration, interface definition, and design documentation
- Develop and maintain design constraints; support logic synthesis, timing review, implementation handoff, and APR closure activities
- Collaborate with verification engineers by supporting RTL debug, resolving design issues, and providing design intent needed for functional verification
- Participate in design reviews, technical documentation, implementation planning, and silicon bring-up or characterization support as needed
- Work closely with analog/mixed-signal, physical design, firmware, product, and customer-facing teams to support successful silicon development and delivery
- Apply industry best practices throughout the IC development lifecycle, including design quality, reuse, maintainability, and traceability
What We’re Looking For: - Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
- Working knowledge of the RTL design cycle, including specification review, RTL implementation, synthesis support, verification debug, documentation, and product support
- Experience with System Verilog RTL design, coupled with design synthesis
- Familiarity with simulation, debug, lint, CDC, reset-domain crossing, and other design quality checks
- Experience collaborating with verification, analog/mixed-signal, physical design, and product engineering teams
- Proven track record developing successful integrated circuit designs
- Strong understanding of silicon development methodologies, EDA tools, and semiconductor design best practices
- Excellent debugging, analytical, and problem-solving skills
- Strong written and verbal communication skills, including the ability to communicate complex technical information clearly
- Must be eligible to work on ITAR-controlled projects, which may require U.S. citizenship or lawful permanent resident status
** Please note, we are not able to support visa sponsorship for this role. Why IC Enable? For more than 20 years, IC Enable has delivered world-class design IP, semiconductor products, engineering services, and platform solutions to customers ranging from innovative startups to Fortune 50 companies. Our expertise spans high-reliability mixed-signal and digital IC development, while our platform solutions support leading IDMs, foundries, and IP providers. This is an exciting opportunity to join a team that is driving innovation across the Semiconductor, Medical, and Defense industries. We specialize in advanced technology development, full-custom ASIC/SoC design, and electronics development for some of the industry's most challenging fabrication processes and product applications. IC Enable offers competitive benefits, opportunities to contribute to advanced semiconductor programs, and a collaborative environment where engineers can work closely with industry-leading customers and highly skilled technical teams. IC Enable is an Equal Opportunity Employer
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