FPGA Design Engineer

Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases. US Citizen: This role requires the ability to obtain a Secret US security clearance, which requires a thorough background search and US citizenship.

DPP is seeking a FPGA Design Engineer for our client in the Aerospace & Defense Manufacturing industry.
 
Work location: Onsite in San Diego, CA
Work schedule: 9x80 A
Duration: 6 months
Terms: W2 Contract
Work authorization: US Citizen; must be able to obtain and maintain a Secret DoD clearance.
 
Duties and Responsibilities:

• Design, develop, integrate and test VHDL-based digital designs for our end-user customers and businesses, primarily focused on software defined radio VHDL firmware code bases.
• Work using FPGA programming development tools and environments
• Work with multi-disciplinary teams, such as with Systems Engineering, Digital Engineering, Hardware, and Integration & Test
• Work in waterfall or Agile software development environment
• Analyze system concept of operation, requirements and design documents to resolve functional, performance or timing issues.

Basic Qualifications:

• BS + 5 years of experience in related STEM field; MS + 3 years of experience.
• Significant hands-on current experience in the field of VHDL design.
• Excellent written and communication skills and be able to work independently and within groups.
• Have working knowledge of formal engineering development process, VHDL design and verification.
• An active Secret Clearance is required to start.

Preferred Qualifications:

• 8 or more years of professional technical experience.
• Experience with VHDL design and OSVVM verification for FPGA firmware
• Experience with AMD/Xilinx series including Zynq, Kintex, Ultrascale, Versal family of devices.
• Experience with Communication Protocols (I2C, SPI, UART, PCIe, Ethernet)
• Experience with Electronic Design Automation (EDA) tools: Vivado, Quartus, QuestaSim
• Knowledgeable in FPGA physical constraints and achieving timing closure.
• Generation of Test benches and support of formal VHDL Verification.
• Experience with board RO system level debug using test equipment such as oscilloscopes and logic analyzers.
• Experience with translating systems requirements into programmable logic requirements, design documents, and test specifications.
• Hands on experience with DoD communications systems.

US Citizen: This role requires the ability to obtain a Secret US security clearance, which requires a thorough background search and US citizenship. Residency requirements may apply. 

Interested? Learn more:
Click the apply button or contact Jason at Jason.Slabaugh@dppit.com to learn more about this position (#26-00772).
 

DP Professionals (DPP) offers a range of compensation and benefits packages to our employees and their eligible dependents. DPP is a certified Woman-owned Small Business Enterprise (WBE and WOSB) with more than 25 years in the staffing industry. EOE/AA/V/D