UNKNOWN

FEED

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. You'll orchestrate cross-disciplinary collaboration, implementing sophisticated floorplans, power grids, and clock networks while ensuring design closure at the chip level.

Tenstorrent

Top Level Physical Design Engineer

IRecruitee

This role is ideal for someone who enjoys writing clean, modular software that directly touches hardware, understands how measurements are supposed to work, and can drive experiments that isolate variables across silicon, instrumentation, and test methodology. Tenstorrent is hiring an ATE Test Development Engineer who can build sophisticated, scalable test solutions on the Advantest V93000 platform using SmartTest 8, custom code, and low‑level tester APIs.

ATE Test Development Engineer

ea_via_bold

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. You'll collaborate closely with logic, DFT, and physical design teams to debug constraints, optimize paths, and ensure our chips meet performance targets across corners and modes.

Physical Design Engineer - STA

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. Strong background in ESD planning, padring integration, bump/RDL strategies, and reliability analysis (IR drop, EM), with solid understanding of advanced nodes (7nm, 5nm, 3nm) and FinFET design challenges.

Full-Chip Physical Design Verification Engineer

Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities.

Ai/Ml Physical Design Flow Engineer

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. Use Python, Perl, and Tcl for automation and flow development; experience with SPICE, PNR, placement, CTS, routing, post-route optimization, DFT, or AI-based automation is a plus.

Physical Design Engineer, Timing

Tenstorrent Inc

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. I3C, UART), signoff breadth (DRC/LVS, EM/IR, LEC/Formality), multi-clock/CDC-aware implementation, PLL/DLL integration, and DFT-aware physical implementation (OCC/MBIST).

Physical Design Engineer, Pnr

Physical Design Engineer, PnR

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).

Physical Design Engineer

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible.

Field Applications Engineer, IP Product

Responsibilities Executes established test plans and protocols for assigned portions of code for end-user applications, systems software, and firmware running on hardware, local, networked, and Internet- based platforms; identifies, logs, and debugs assigned issues. Participates as a member of project team of other software quality assurance engineers to develop reliable, cost effective and high quality solutions for low to moderately-complex products.

Software Quality Engineer

Working knowledge of various manufacturing equipment (tube & syringe fillers, sealers, crimpers), bottling lines (fillers, cappers, labelers), tray packaging (Thermoformers, cartoners), and vision inspection (track and trace, label inspection) is preferred. Hazardous waste involvement may include, but is not limited to container and tank management and inspections, generation of hazardous waste as a part of production or sampling processes and transfer of hazardous waste between lab procedure area, satellite accumulation and storage.

YEAR

Tolmar Careers

Equipment Engineer II

Responsibilities: Manage Cisco Unified Communications solutions, including Cisco Communications Manager, Unity Connection, Unified Contact Center Express (UCCX). Cisco Unified Border Element (CUBE), Unity Connection, Singlewire Informacast Fusion, Call Recording, Call Detail Reporting, Cisco Unified Computing System (UCS), VMware.

HOUR

University of Colorado Health

Voice Engineer

PART_TIME

Tolmar Inc.

Company Overview Cemex US is a leader in the building materials industry, known for our innovation, quality, and operational excellence. With over a century of expertise, we are committed to delivering products and services that meet the needs of our customers and communities across the globe. At Cemex, we believe in investin...

Cemex Inc

Engineer Reliability

Responsibilities: To work in Telecom Infrastructure Domain, focusing on HPE ProLiant server validation specific to Telco requirements(Carrier grade features), server NIC, memory, storage drive performance testing, OS validation, RFC 2544, Memory performance benchmarking, stress tests, Thermal Power and Performance characterization, Network Equipment Building System (NEBS) Testing etc. Job Description: To work in Telecom Infrastructure Domain, focusing on HPE ProLiant server validation specific to Telco requirements(Carrier grade features), server NIC, memory, storage drive performance testing, OS validation, RFC 2544, Memory performance benchmarking, stress tests, Thermal Power and Performance characterization, Network Equipment Building System (NEBS) Testing.

Hewlett Packard Enterprise Co

Telco Infrastructure Engineer

Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. Responsibilities: Codes and programs enhancements, updates, and changes for portions and subsystems of systems software, including operating systems, compliers, networking, utilities, databases, and Internet-related tools.

Manageability Firmware Engineer

Designs enhancements, updates, and programming changes for portions and subsystems of systems software, including operating systems, compliers, networking, utilities, databases, and Internet-related tools. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.

Jobs in Indianola, MS

Top Level Physical Design Engineer Tenstorrent

ATE Test Development Engineer Tenstorrent

Physical Design Engineer - STA Tenstorrent

Full-Chip Physical Design Verification Engineer Tenstorrent

Ai/Ml Physical Design Flow Engineer Tenstorrent

Physical Design Engineer, Timing Tenstorrent

ATE Test Development Engineer Tenstorrent Inc

Physical Design Engineer, Pnr Tenstorrent

Physical Design Engineer, PnR Tenstorrent Inc

Full-Chip Physical Design Verification Engineer Tenstorrent Inc

Physical Design Engineer Tenstorrent Inc

Field Applications Engineer, IP Product Tenstorrent

Software Quality Engineer HP

Equipment Engineer II Tolmar Careers

Voice Engineer University of Colorado Health

Equipment Engineer II Tolmar Inc.

Engineer Reliability Cemex Inc

Telco Infrastructure Engineer Hewlett Packard Enterprise Co

Manageability Firmware Engineer Hewlett Packard Enterprise Co

Systems Software Engineer Hewlett Packard Enterprise

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