UNKNOWN

FEED

Familiarity with high-speed, high-resolution analog-to-digital (ADC) or digital-to-analog (DAC) data converter design and building block circuits such as bandgap reference, op-amp, comparators, oscillators, DLL, PLL etc. The successful candidate in this role will design high performance transistor level circuits starting from initial specification, through design and layout supervision, silicon evaluation and characterization to final product introduction to market.

Omni Design Technologies Inc

Analog/Mixed-Signal IC Design Engineer

The successful candidate in this role will do high performance transistor level design starting from initial specification, through design and layout supervision, silicon evaluation and characterization to final product introduction to market. We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem.

Senior Analog/Mixed-Signal IC Design Engineer

The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm. We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design's IP cores and the rapidly emerging semiconductor embedded design business ecosystem.

Chip Lead: Analog & Mixed-Signal Layout Engineer

Utilize and maintain monitoring tools by performing ongoing assessments of the efficiency/performance of these tools, Work alongside operations, sales, and customer facing teams on requirements and operational implementation, Provide input and guarantee accuracy of operations, efficiency, and transition documentation and procedures, Effectively communicate with team members, cross-departmental staff, and customers regarding status, milestones, issues, and resolution. Vantor is a place for problem solvers, changemakers, and go-getters—where people are working together to help our customers see the world differently, and in doing so, be seen differently.

YEAR

Vantor

DAF Support Engineer

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You will be responsible for the day-to-day timing closure and sign-off of complex ASIC designs, run and analyze static timing analysis (using tools like Synopsys PrimeTime or Cadence Tempus), debug timing violations such as setup/hold failures, and refine or create timing constraints to accurately model real chip behavior. The role also involves writing scripts (Python, TCL, Bash) to automate flows, process large datasets, and improve efficiency, as well as leveraging knowledge of circuit elements like flip-flops, latches, memory, and CMOS logic to understand timing paths.

We are a staffing agency helping individuals find jobs and employers fill open positions.
Based in Atlanta, Insight Global is a premier provider of employment and staffing solutions to Fortune 1000 customers across the United States and Canada. We provide long-term contract, short-term contract, temporary-to-permanent, direct placement, and enhanced staffing services. Insight Global specializes in placing contract job seekers into Information Technology, Accounting and Finance, Engineering (non-IT), and Government jobs.
Since our inception in 2001, we have experienced unprecedented growth within our industry, rapidly expanding from an Atlanta-based start-up to one of the most successful staffing firms in America.
Our core staffing services are the backbone upon which Insight Global was founded and have driven our success. We cater our delivery approach and recruiting efforts to meet each client’s unique demands, ensuring that we deliver both maximum client value and the differentiated Insight Global experience.

Insight Global

Physical Design Engineer - STA Design Integration

IRecruitee

Sr Physical Design Engineer - STA Design Integration

The position provides hands-on experience with the latest 3 nm and smaller process nodes and involves working across multiple design hierarchies to define, validate, and sign off complex timing environments for AI, computing, and networking SoCs. Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular, Networking, Computing, and Storage products.

Broadcom Corporation

Design Engineer - STA

Broadcom Inc

Job Description: The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques.

Digital Design RTL Engineer

Job Description: The candidate would be required to work on Design Implementation activities related to place and route and/ or timing closure - floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC). Education and Experience required: BS in Electrical Engineering/ Computer Engineering or related field and 8+ years of related experience or an MS in Electrical Engineering/ Computer Engineering or related field and 6+ years of related experience.

Design Implementation Engineer

Opportunity to participate in innovation, design flow and methodology development to address challenges of designing in deep submicron processes and state-of-the-art ASIC design for AI, computing and networking products. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.

IC Design Engineer

This job will involve development, testing and deployment of software products and usage methodology to a world-wide, cutting edge, ASIC Design technology development and implementation team. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth.

Asic Design Automation Engineer

ASIC Design Automation Engineer

Capture photos of equipment, covering different views and its connections using client developed inspection applications from handheld devices (customer provided or personnel). Job Description & Skill Requirement: Minimum of 5 -7 years of experience and good with Plant walk down activities.

Katalyst Healthcares & Life Sciences

Field Walkdown Engineer

jobdiva

This includes teaching live instructor-led courses for technical and non-technical audiences, developing course content and supporting materials, and partnering with the AI Community team to extend learning beyond the classroom through events and knowledge sharing. GeoZone Definition: GeoZones are geographic groupings created by Lockheed Martin to align compensation ranges with regional labor markets and cost-of-labor differences across the United States.

Headquartered in Bethesda, Maryland, Lockheed Martin is a global security and aerospace company that employs approximately 125,000 people worldwide and is principally engaged in the research, design, development, manufacture, integration and sustainment of advanced technology systems, products and services.
	Our Mission:&nbsp; We solve complex challenges, advance scientific discovery and deliver innovative solutions to help our customers keep people safe and provide them essential services. 
	
	Our Vision:&nbsp;Be the global leader in supporting our customers to strengthen global security, deliver citizen services and advance scientific discovery.
	Our Values:
	
	<li style="margin: 0px 0px 0px 15px;">Do What's Right</li>
	<li style="margin: 0px 0px 0px 15px;">Respect Others</li>
	<li style="margin: 0px 0px 0px 15px;">Perform With Excellence</li>

Lockheed Martin Corporation

AI Systems Engineer Sr

As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).

Tenstorrent Inc

Physical Design Engineer

The senior analog & mixed-signal layout designer will be responsible for the layout of cutting edge, high performance, high speed CMOS data converters in foundry CMOS process nodes in 2nm, 3nm, 5nm, 6nm, 7nm, 16nm, and 28nm. We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design’s IP cores and the rapidly emerging semiconductor embedded design business ecosystem.

Omni Design Technologies

No casual or athletic attire is permitted, which includes jeans, hats, caps, t-shirts, tennis shoes, construction-type boots, un-tucked shirts, hoodies, and thermal sweatshirts. The dress code for this position is business casual, which means wearing dress pants such as slacks or khakis, a collared shirt (tucked in), and dress shoes.

ObjectWin Technology Inc

Field Engineer 4

The position emphasizes technical ownership, test strategy development, and cross functional collaboration to improve validation quality and efficiency. · Partner with CVE and product design teams to align test coverage with firmware and hardware architecture.

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Design Engineer - STA Broadcom Inc

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Digital Design RTL Engineer Broadcom Inc

Design Implementation Engineer Broadcom Inc

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ASIC Design Automation Engineer Broadcom Inc

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