Sr. FPGA Engineer

Day-to-day responsibilities include developing and refining FPGA modules, debugging complex hardware issues, collaborating with cross-functional teams (architecture, software, and validation), and ensuring designs meet performance, power, and reliability targets. Demonstrated capability in FPGA hardware verification and debug using simulation, assertions, coverage, reference models, automated regression, and ILA or equivalent tools.

Title: Sr. FPGA Engineer (Remote work)
Location: Remote
Duration: Full time/Contract

Salary is based on DOE

Our client is building groundbreaking heterogeneous architectures designed for the disaggregated computing needs of modern AI workloads. The company focuses on systems that can support 100x performance-to-bandwidth demands expected from future large-scale AI factories. By rethinking how compute, memory, and interconnects work together, our client enables highly efficient and scalable AI infrastructure.

Description
The Senior FPGA Engineer will design, implement, and optimize FPGA-based solutions that support client's advanced AI computing architectures. This position involves RTL and HLS design, and system-level verification on high-performance FPGA platforms.
Day-to-day responsibilities include developing and refining FPGA modules, debugging complex hardware issues, collaborating with cross-functional teams (architecture, software, and validation), and ensuring designs meet performance, power, and reliability targets. The engineer will also contribute to design reviews, maintain documentation, and help define best practices and methodologies for FPGA development within the organization.

Minimum Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
• 8+ years of FPGA or digital-design experience with complex production or advanced-development systems.
• Solid foundation in Electrical Engineering principles, particularly digital logic, timing, and hardware interfaces.
• Strong proficiency in RTL Design for FPGA/ASIC, hands-on practical experience with HDLs such as Verilog, and strong practical experience with C/C++ HLS.
• Hands-on experience with PCIe-connected FPGA platforms, DMA, AXI4/AXI4-Lite/AXI4-Stream, interrupts, and host integration.
• Strong knowledge of HBM/DDR and on-chip memory architecture, pipelining, buffering, backpressure, CDC, reset, and timing closure.
• Demonstrated capability in FPGA hardware verification and debug using simulation, assertions, coverage, reference models, automated regression, and ILA or equivalent tools.
• Experience with AMD/Xilinx Vivado and Vitis HLS, plus Linux, Python, Tcl, Git, and C/C++ host software.
• Familiarity with high-speed interfaces, memory subsystems, or networking protocols is beneficial.
• Ability to collaborate in a multidisciplinary team, communicate technical concepts clearly, and document designs and test results.
• Background in high-performance computing, AI and data analytics acceleration, or heterogeneous architectures is a plus.

Preferred Qualifications

• Datacenter or cloud or edge FPGA platforms
• AWS F1/F2, distributed data-processing frameworks
• database or analytics acceleration
• RDMA/networking, multi-FPGA systems
• Early-stage product development.

Full time Benefits:
Base salary (DOE) plus equity, medical insurance, and 401(k).

For Contract:
The following benefits are offered for this position: medical, dental, & vision insurance, short-term disability, life and AD&D insurance, and a 401(k) retirement plan.

Everest Consultants is an equal opportunity employer and does not discriminate on the basis of race, color, religion, sex, national origin, age, disability, or any other characteristic protected by applicable local, state, or federal civil rights laws.