Silicon Validation Engineer

Do you love working on groundbreaking technologies that power amazing new products? Do you bring the attention to detail and the drive for excellence it takes to deliver extraordinary results? Imagine what you could do here.

At Apple, new insights have a way of quickly becoming extraordinary products, services, and customer experiences. Bring your passion and dedication, and there's no telling what you could accomplish.

Our team designed and delivered the Apple N1, Apple's first custom wireless chip, and we're just getting started. We're looking for a motivated Silicon Validation Engineer to help shape the next generation of Apple's custom wireless silicon. In this role, you'll span the full lifecycle, from pre-silicon validation on emulation and real-time FPGA prototype platforms through post-silicon bring-up and validation in the lab, and you'll drive the tight collaboration between pre-silicon design and post-silicon validation that is key to shipping high-quality products. In this role, youll be responsible for the following:

• Working closely with cross-functional teams, you'll study SoC designs through their micro-architecture and specifications, and develop comprehensive validation plans.
• You'll validate pre-silicon designs using emulation and real-time FPGA prototype platforms.
• You'll perform post-silicon bring-up and functional validation, including power-state behavior and PVT characterization.
• You'll implement and execute tests using Python (or similar) scripting and bare-metal C/C++ coding on embedded processors, focused on Wi-Fi and wireless subsystems.
• You'll drive the debug and resolution of engineering issues in close collaboration with cross-functional teams.Work closely with IC design, FPGA emulation, firmware, and system teams across Apple to drive execution from first silicon through to mass production. Execute the validation plan across pre- and post-silicon phases, exercising wireless data paths (MAC/PHY), embedded processors, and power management. Run RTL simulations and analyze waveforms to validate and debug behavior. Develop and maintain test scripts and bare-metal firmware, and the infrastructure to run them on emulation, FPGA prototype, and silicon platforms. Triage failures, root-cause issues across RTL, firmware, and system boundaries, and track them to resolution. Collaborate with the Systems team to support system-level integration and debug.BS and a minimum of 10 years relevant industry experienceProven experience with Cadence Palladium (or equivalent emulation platforms such as Synopsys ZeBu), including build flows, compile optimization, and platform bring-up Strong debugging skills with experience in system-level and IP-level debug on emulation platforms Experience with emulation compile flows, including synthesis for emulation, memory compilation, clock modeling, and I/O abstraction Proficiency in debug tools and methodologies (waveform analysis, signal probing, assertion-based debug, transactors) Solid understanding of RTL design concepts, SoC architectures, ARM-based subsystems, and standard bus protocols (AXI, AHB, APB) Experience developing and maintaining automation scripts (Python, Tcl, Perl, Shell) to streamline emulation workflows Strong analytical and problem-solving skills with ability to debug complex system-level issues Experience with Wireless SoC applications (Wi-Fi, Bluetooth, cellular) - strongly preferred Excellent communication and collaboration skills to work effectively across functional teams Experience with version control systems (Git, Perforce) and CI/CD integration for emulation flows