Senior Staff Design Automation Engineer

This SkyWater Senior Staff Design Automation Engineer will primarily lead custom layout and Electronic Design Automation (EDA) activities to provide testchip collateral for semiconductor integrated circuit (IC) technologies. This engineer will be a significant contributor to a broad array of design projects supporting modeling, reliability, and yield as part of Process Design Kit (PDK) development for advanced CMOS or quantum technologies.The position is based at our HQ site in Bloomington, MN, with consideration available for remote work.Major Areas of Accountability:

Automated or systematic creation or conversion of test structures for eTest, modeling, reliability, yield, and IP test chips as part of new technology developmentVersion control and management of large design libraries with multiple contributorsIntroduction of both custom and automated designs for layout projects supporting highly diverse technology flowsUtilize SkyWater PDK's and provide feedback to internal teams on issues, improvements, capabilities, etc.Lead physical verification and tape-in reviews

Required Qualifications:

5+ years of experience with AS in Electronic Design fields. 3+ years of experience with BS in Electrical Engineering, Microelectronics or related fields.Proven experience in full-custom layout design, especially for discrete device process-control monitors using EDA tool-assisted design flow such as Cadence and Siemens EDA tool suites, (e.g. Calibre and Virtuoso)Capable to independently execute design automation using tools such as SKILL, Tcl, python or other scripting languageExperience in developing and/or using physical verification tools (DRC, ERC, LVS/PEX) and DFM tooling.Experience in large design library change controls.Familiarity with typical mixed-signal IC design and tape-in flow.Clear communicator, concise written report skills, and inventive problem solverU.S. Person Required: This position requires compliance with the International Traffic in Arms Regulations (ITAR). All accepted applicants must be U.S. Persons. ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent Resident, Political Asylee, or Refugee.

Preferred Qualifications:

Background in PDK development in some or all of the following fields: CMOS, MEMS, photonics, or superconducting.Familiarity with parasitic extraction tools such as Mentor Calibre xRC, Cadence Quantus, or Synopsys StarRC.Experience with data preparation for photo mask designBackground in full-custom IC design utilizing hierarchical design priciples and automation including place-and-routeFormal training in both (1) electrical engineering or electronic device design, (2) computer science