Accredited Business Accountants (ABA), Autonomous Driving Systems, Cadence, Communication Skills, Computer Architecture, Computer Systems, Continuous Integration, Cross-Functional, Datapath Design, Debugging Skills, Design Verification, Formal Verification, Hardware Design, IP (Internet Protocol), Leadership, Logic Design, Mentoring, Metrics, Model Review, Network Operations Center, Network Protocols, Network Topology, Presentation/Verbal Skills, Process Improvement, Product Shipments, Python Programming/Scripting Language, Reporting Dashboards, Strategic Planning, System-on-a-Chip (SoC), SystemVerilog, Technical Leadership, Test Plan/Schedule, Testing, Use Cases, Validation Testing, Verification Engineering, Verification Plans, Writing Skills
Senior Formal Verification Engineer
4576 On Site Mountain View, California
Hardware Engineering
Full-Time
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Waymo is an autonomous driving technology company with the mission to be the worlds most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver-The Worlds Most Experienced Driver-to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymos fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases.
The Waymo Driver has provided over ten million rider-only trips enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15 U.S. states.
Waymos Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicles software stack. To achieve our mission, we architect and create high-performance custom silicon, we develop system-level compute architectures that push the boundaries of performance, power, and latency, and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance.
We are a multidisciplinary team seeking curious and talented teammates to work on one of the worlds highest performance automotive compute platforms. This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead.
Responsibilities:
- Define and drive formal strategy for first-pass silicon success.
- Own the formal verification sign-off approach across complex IP and SoC designs utilizing advanced formal techniques, e.g., Bounded Model Checking, Datapath Validation, Connectivity, Sequential LEC, etc.
- Architect robust and scalable FV environments.
- Develop and deploy reusable formal testbenches, methodology flows, and high-coverage SVA assertion suites for systemic deployment across multiple design blocks and projects.
Technical Leadership & Mentorship:
- Serve as the teams formal Subject Matter Expert, training and guiding logic designers and verification engineers to effectively incorporate formal methods into their workflows.
Strategic Planning and Test Plan Execution:
- Collaborate with Architecture and Design teams to translate complex system and IP specifications into comprehensive formal verification test plans.
- Drive FV Infrastructure & Reporting. Maintain and enhance continuous integration regression flows and dashboarding to provide clear actionable formal verification status and sign-off metrics to leadership.
Advanced Bug-Hunting and Debugging:
- Apply state-of-the-art formal techniques, e.g., assume-guarantee abstractions, reductions, to tackle and efficiently decompose the most challenging intractable verification problems.
Requirements:
- BS, MS, or PhD in CSE or related field combined with 5 years of hands-on formal verification experience on shipping silicon products.
- Deep expert-level proficiency with at least one major commercial formal verification platform, e.g., Cadence JasperGold, Synopsys VC Formal, Mentor Questa Formal.
- High-level language proficiency in C and/or Python.
- Ability to model complex designs in SystemVerilog and advanced SystemVerilog Assertions, including writing complex cut-points and environment models for effective formal proof convergence.
- Proven track record in applying advanced formal debug techniques for problem decomposition, e.g., clock domain crossings, abstractions, assume-guarantee reasoning.
- Excellent verbal and written communication skills with the ability to influence cross-functional teams and drive technical alignment.
Preferred Qualifications:
- Informed of latest developments in formal verification research and industry practice, identifying opportunities for Waymos silicon development process.
- Experience in formally proving correctness of arithmetic units, such as floating point adders and multipliers.
- Knowledge and experience working with NOCs and networking topologies, protocols, e.g., AXI, ABA.
- Understand basic principles of cache coherency.
- Experience with high-performance designs.
Salary Range:
The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training, and education, and skill level. Your recruiter can share more about the specific salary range for the role, location, or if the role can be performed remote, during the hiring process.
Benefits:
Waymo employees are also eligible to participate in Waymos discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.