Senior Digital ASIC Design Engineer

Artech LLC

  • Agoura hills, CA
  • 10 days ago
  • $75–$120 Per Hour

Highlights

Strong knowledge of RTL to Netlist ASIC development flows including synthesis, static timing analysis (STA), clock domain crossing (CDC), and timing closure. Proven experience designing complex digital blocks including state machines, FIFOs, high-speed datapaths, arbitration logic and DFT-friendly architectures.

Numbers & Facts

LocationAgoura hills, CA
Salary$75–$120 Per Hour

Description

Job Title: Senior ASIC Digital Design Engineer
Location: Agoura Hills, CA
Duration: 12 month contract
Payrate: $75 to $120 per hour

Job Description:
Client's Digital ASIC Group is seeking a to help develop complex mixed-signal ASICs for next-generation semiconductor test systems. Working closely with architects, analog designers, verification engineers, and physical design teams, you will drive digital design activities from architecture definition through silicon bring-up. This role offers the opportunity to own critical ASIC subsystems, influence technical direction, and contribute to cutting-edge products in a highly collaborative environment.

Must Have:
  • BSEE required; MSEE or PhD desired.
  • 8+ years of ASIC or digital design experience with strong expertise in Verilog RTL development.
  • Proven experience designing complex digital blocks including state machines, FIFOs, high-speed datapaths, arbitration logic and DFT-friendly architectures.
  • Strong knowledge of RTL to Netlist ASIC development flows including synthesis, static timing analysis (STA), clock domain crossing (CDC), and timing closure.
  • Experience integrating third-party and custom IP into large-scale SoCs or mixed-signal ASICs.
  • Experience performing Block level P&R of high-speed digital blocks and interfaces to analog IP
  • Experience with EM/IR analysis
  • Experience with DRC/LVS signoff
  • Proficiency with scripting and automation using Python, Tcl, Make, or similar languages.
  • Experience supporting verification, silicon bring-up, debugging, and root-cause analysis.
  • Strong collaboration, communication, and problem-solving skills with the ability to mentor junior engineers and drive technical excellence across cross-functional teams.

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