Senior Design Verification Engineer, Silicon

Google LLC

Mountain View, CA

JOB DETAILS
SKILLS
ARM (Advanced RISC Machine), ASIC (Application Specific Integrated Circuit), Android, Artificial Intelligence (AI), Automation, Cloud Computing, Commodity Management, Computer Engineering, Computer Firmware, Computer Hardware, Computer Science, Debugging Skills, Design Verification, Disk Management, Electrical Engineering, Embedded Systems, English Language, Equal Employment Opportunity (EEO), FPGA, Facilities Management, Genetics, Hard Drives, I2C, IP (Internet Protocol), Industry Standards, Intrusion Prevention Systems, Low Power, Machine Tool, Manufacturing, Network Operations Center, Perl Programming Language, Product Management, Python Programming/Scripting Language, Quality Engineering, Recruiting/Staffing Agency, Regulatory Requirements, Reliability Engineering, Sales Management, Scripting (Scripting Languages), Simulation, Software Development, Software Engineering, Stock Purchase Plans, Structural Engineering, SystemVerilog, Tape Backup, Technical Support, Technical/Engineering Design, Test Plan/Schedule, Testing, Universal Asynchronous Receiver-Transmitter (UART), Verification Engineering, Verification Plans
LOCATION
Mountain View, CA
POSTED
5 days ago

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Senior Design Verification Engineer, Silicon

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Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

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Minimum qualifications:

  • Bachelor"s degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 8 years of experience verifying digital logic at RTL using SystemVerilog for ASICs or FPGAs.
  • Experience verifying digital IP and subsystems.
  • Experience working with design verification (DV) testbenches or environments.

Preferred qualifications:

  • Master"s degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • Experience with verification planning, testplan development, and coverage-driven verification closure.
  • Experience creating and using verification components in VMM, OVM, or UVM.
  • Experience with UPF-based power simulations and gate-level simulation (GLS) debugging.
  • Familiarity with ASIC standard interfaces (e.g., MIPI, ARM AMBA, UART, I2C) and scripting languages like Perl or Python.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google"s direct-to-consumer products. You"ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google"s mission is to organize the world"s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people"s lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $237000 (USD) + 15% bonus target + equity + benefits

Learn more about benefits at Google.

Responsibilities

  • Develop verification plans and test plans for digital intellectual properties (IPs) and subsystems.
  • Create and utilize verification components and testbench environments for digital logic at RTL using SystemVerilog and industry-standard methodologies such as VMM, OVM, or UVM.
  • Execute gate-level simulations (GLS) and Unified Power Format (UPF)-based power simulations, performing debugging to deliver high-performance and low-power hardware.
  • Drive coverage-driven verification strategies to ensure complete verification closure for ASICs or FPGAs.
  • Utilize scripting languages like Perl or Python to create automation and support various verification techniques.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google"s Applicant and Candidate Privacy Policy.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google"s EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

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