Senior Analog & Mixed-Signal Engineer (Precision Timing)

About Mesa Quantum

Mesa Quantum is building the manufacturing backbone of the quantum economy. We specialize in chip-scale quantum devices, starting with clocks and sensors, that unlock resilient Position, Navigation, and Timing (PNT) for defense, telecom, space, and critical infrastructure. Our team combines world-class expertise in AMO physics, photonics, microfabrication, and engineering to transform breakthrough science into scalable, deployable technology. Backed by top-tier deep-tech investors and the U.S. Department of Defense, MesaQuantum is rapidly scaling and actively recruiting exceptional innovators who want to build the future of quantum technology from the ground up.

The Role

We are hiring a Senior Analog & Mixed-Signal Engineer to lead the development of the precision control electronics at the core of our chip-scale atomic clock platform. You will own the analog front-end, signal conditioning, and control loop architecture that takes our physics package from benchtop validation to fielded product, partnering with our AMO physics, photonics, RF, and systems teams.

This is a hands-on senior role. You are expected to personally execute the bulk of the analog circuit design work, from schematic capture and simulation through bench bring-up and characterization. We are looking for an engineer who is genuinely passionate about designing circuits, takes pride in elegant analog topology, and would rather be at the bench than in front of slides. The work spans precision analog, mixed-signal PCB design, and RF synthesis, with frequent interfacing to the embedded and digital teams. Reports to the CTO.

This is a full-time, on-site position in Boulder, CO.

Key Responsibilities

• Own the precision analog front-end: photodetector signal conditioning, low-noise transimpedance and instrumentation amplification, and lock-in detection for weak atomic signal recovery
• Architect and deliver successive generations of the control electronics, driving size, power, and noise improvements at each iteration
• Design and validate the microwave synthesis chain that drives atomic interrogation, including PLL and VCO architecture, phase noise optimization, and reference distribution
• Implement precision VCSEL current drive and thermal control electronics for the laser and physics package
• Build characterization protocols, test fixtures, and automation to validate clock performance against Allan deviation, phase noise, and holdover targets
• Drive Design for Manufacturability and Design for Test with PCB houses and contract manufacturers as we scale toward high-volume production
• Mentor junior engineers and act as the senior technical voice in hardware design reviews

Required Skills & Experience

• 10+ years of analog and mixed-signal hardware design, including at least one product taken from prototype through volume production
• Deep expertise in low-noise precision analog: signal conditioning, low-noise amplifiers, ADC/DAC interfacing, and rigorous noise budgeting
• Mixed-signal PCB design: multi-layer stack-ups with sensitive analog, RF, and digital domains on a single board; controlled impedance; thermal management; debug experience under signal integrity constraints
• RF circuit design through GHz, with hands-on experience in low phase noise frequency synthesis, PLLs, and VCOs
• Strong SPICE simulation and circuit analysis skills, including noise, stability, and tolerance analysis
• Hands-on proficiency with oscilloscopes, spectrum and phase noise analyzers, network analyzers, source measure units, and signal generators
• Scripting experience for instrument control, characterization, and data analysis
• Experience using Git or similar version-control systems within a hardware development environment

Strongly Preferred

• Chip-scale atomic clocks, rubidium or cesium oscillators, OCXOs, or other precision frequency references
• Optoelectronics: VCSEL drive design, photodetector readout, laser frequency locking
• Embedded firmware in C/C++ on ARM Cortex-M class microcontrollers
• FPGA development in Verilog or SystemVerilog, including real-time DSP IP (lock-in detection, PID, digital filtering)
• Mixed-signal ASIC familiarity, particularly mixed-signal block specification, verification, or characterization
• Hardware design under hard size and power budgets (low SWAP-C)
• Production partnerships with contract manufacturers and PCB houses, including DFM and DFT contribution
• Defense, aerospace, or space-qualified hardware experience
• Familiarity with atomic physics or other quantum sensing modalities

Eligibility

Due to U.S. Department of Defense funding requirements, applicants must be U.S. persons (U.S. citizens or lawful permanent residents). The ability to obtain and maintain a U.S. security clearance may be required for certain projects.

Benefits

What We Offer

• Competitive base salary in the range of $150K to $230K, commensurate with experience, skills, qualifications, and education. Most candidates who meet the minimum qualifications will be hired within the middle portion of the range; placement above the midpoint requires demonstrated expertise significantly beyond the role's minimum requirements, and offers at the top of the range are atypical
• Meaningful equity in a deep-tech company at the inflection point between prototype and product
• Comprehensive benefits package
• Direct ownership of a critical subsystem with measurable impact on a product that matters to U.S. national security
• A team that includes deep AMO physics, RF, photonics, and microfabrication expertise
• Boulder location with access to Colorado's strongest tech and outdoor communities