Principal Memory Design Engineer/Senior Technical Manager

MediaTek's advanced memory design team in San Jose, CA is seeking a highly experienced memory design engineer to architect and define memory circuits. This role focuses on high-performance compute (HPC) ASIC solutions for Data Center AI and Networking, as well as designing energy efficient edge AI Accelerators. Work in close partnership with leading Data Center AI ASIC customers in North America to co-develop embedded memory architectures and circuits on advanced technology nodes. Collaborate with product engineering, technology development and architecture teams to define, design, and deliver high-performance, customized semiconductor memory solutions - including SRAM, TCAM, Compute-In-Memory (CIM), and Near Memory Compute (NMC) macros - tailored to diverse PPA requirements for Data Center AI, Networking, and Edge AI applications. Lead Design Technology Co-Optimization (DTCO) and pathfinding initiatives for semi-custom and custom SRAM designs. Lead the end-to-end design of dual-rail custom memories, ensuring all customer performance, power, and area (PPA) specifications are fully satisfied. Drive innovation by designing and integrating specialized circuits and features to achieve industry-leading PPA in both custom and compiler-generated memories. Provide mentorship and technical direction to other designers, while remaining hands-on in digital circuit design with a focus on memory architectures. Evaluate and implement new design methodologies and tools to enhance productivity and quality. Demonstrate strong organizational skills and the ability to work independently, effectively managing multiple tasks, and collaborating with global design and CAD teams.