Principal AI Compiler Engineer

NXP Semiconductor, Inc.

  • Austin, TX
  • 30+ days ago

    Highlights

    With a relentless focus on hardware-software co-design, you'll collaborate across teams to translate high-level AI models into blazing-fast, energy-efficient executables, unlocking the full potential of our silicon for real-world impact. Here, you'll not only architect and scale a production-class AI compiler toolchain, but also rethink how AI automates, optimizes, and accelerates every step of building and deploying neural networks on NXP's SoCs.

    Numbers & Facts

    LocationAustin, TX

    Description

    Locations available: San Diego and San Jose, California or Austin, Texas

    NXP is searching for a hands-on AI Compiler Engineer who thrives at the convergence of cutting-edge AI, compiler tech, and hardware design. Here, you'll not only architect and scale a production-class AI compiler toolchain, but also rethink how AI automates, optimizes, and accelerates every step of building and deploying neural networks on NXP's SoCs. You'll work shoulder-to-shoulder with visionary engineers-both human and AI-enabling adaptive compilers that learn, evolve, and redefine what's possible for embedded intelligence. With a relentless focus on hardware-software co-design, you'll collaborate across teams to translate high-level AI models into blazing-fast, energy-efficient executables, unlocking the full potential of our silicon for real-world impact. Innovation here isn't a catchphrase-it's your everyday.

    Job Responsibilities:

    • Own the design, implementation, and evolution of an AI compiler toolchain that leverages AI agents to seamlessly map neural networks onto NXP's SoC platforms.
    • Pioneer new graph transformations, lowering, scheduling, and codegen strategies for CPUs and custom accelerators, driven by insights from AI-powered analytics.
    • Build deep integrations with leading AI frameworks (PyTorch, TensorFlow, ONNX, and more), using AI agents to rapidly onboard new model architectures and ops.
    • Push the envelope on quantization, operator fusion, memory planning, and layout transformations-combining human expertise and AI-guided design for state-of-the-art results.
    • Partner with hardware and software architects, kernel hackers, and AI agents to co-design next-gen compiler and accelerator features, aligning silicon and code for maximum impact.
    • Diagnose and crush performance bottlenecks with AI-enabled profiling and diagnostics, relentlessly tuning for latency, throughput, and power efficiency.
    • Level up validation, benchmarking, and regression pipelines by harnessing AI agents-ensuring compiler correctness and world-class performance, release after release.
    • Uplevel the developer experience by streamlining usability, diagnostics, and documentation-AI agents are your copilots for user support, troubleshooting, and rapid iteration.

    Qualifications:

    • MS/PhD (or equivalent experience) in Computer Science, EE, or related field
    • Deep experience building AI compilers, accelerator backends, or graph optimization frameworks.
    • Strong expertise in graph optimization and performance optimization for NPUs or custom accelerators
    • Experience with MLIR, LLVM, TVM-like systems, or proprietary compiler IRs.
    • Excellent C/C++ and Python skills
    • Solid understanding of AI inference workloads (CNNs, transformers, perception or generative models)
    • Strong communication skills are required, e.g. agile development experience in Scrum team (Product Owner or Scrum Master)

    More information about NXP in the United States...

    NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

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