Lead Physical Design Engineer

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Silicon · Bengaluru, India

Lead Physical Design Engineer

Physical implementation for ASIC, SoC and IP core programmes - floorplan through signoff.

Full time8+ yearsBengaluru, India

THE WORK

What the role involves.

• Floorplanning, placement, clock tree synthesis, routing and timing closure across multiple corners.
• Power integrity, IR analysis and physical verification through to DRC and LVS signoff.
• Working within foundry PDKs across mature and advanced nodes.

Physical designTiming closureCTSIR/EMDRC/LVSPDK

TO APPLY

Send us something specific.

A CV is fine. What helps more is a paragraph about a problem you solved that was harder than it looked, and what you would do differently now. Write to careers@faststreamtech.com with the role title in the subject.

Apply for this role All open roles

COMMON QUESTIONS

What engineers ask before they call.

01

Where is this role based?

Bengaluru, India. Full time.

02

What experience is expected?

8+ years. The range is a guide rather than a filter - make the case if you are outside it.

03

How do I apply?

Write to careers@faststreamtech.com with the role title in the subject, and include a paragraph about a problem you solved that was harder than it looked.

KEEP READING

Related work.

CAREERS

All open roles

Everything currently open.

COMPANY

About Faststream

How the work is organised.

SERVICES

How we work

What the engineering involves.

BUILD WITH FASTSTREAM

Bring us the difficult part.

Tell us the specification, the constraint and the deadline. Programmes that cross silicon, radio, embedded and AI are where Faststream is strongest.

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