Lead FPGA Design Engineer

• 
  Bachelor’s degree with at least 9 years of relevant experience, a graduate degree with at least 7 years of relevant experience, or 13 years of relevant experience in lieu of a degree.
• Current U.S. Department of Defense (DoD) security clearance or the ability to obtain one.
• Strong experience in FPGA design, RTL development, simulation, synthesis, verification, and implementation.
• Proficiency in VHDL (preferred) or Verilog.
• Knowledge of digital signal processing, digital modulation and demodulation, radar systems, and wireless communications.
• Experience with FPGA-based modem algorithms, electronic warfare systems, or ASIC design.
• Familiarity with FPGA design tools such as AMD Xilinx Vivado/ISE, Intel Quartus, ModelSim, or Synplify.
• Experience with FPGA timing closure, high-speed serial interfaces, and hardware debugging.
• Knowledge of interfaces such as Ethernet, SPI, UART, SDRAM, DDR3, JESD, and PCIe.
• Experience using laboratory equipment, including oscilloscopes, signal generators, logic analyzers, and bit-error-rate testers.
• Familiarity with Git and programming or modeling tools such as C, C++, C#, MATLAB, or Simulink.

Preferred Qualifications

• Master’s degree in Computer Science, Computer Engineering, Software Engineering, or Electrical Engineering.
• Experience leading small engineering teams or technical contributors.
• Experience with electronic support (ES), electronic attack (EA), signal detection, classification, and identification.
• Knowledge of forward error correction (FEC), machine learning, and advanced DSP algorithms.
• Experience with high-level synthesis (HLS) and FPGA interfaces operating at 3 Gbps or higher.