Hardware Validation Engineer

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  • Palo Alto, CA
  • Today

    Highlights

    Failure Analysis: Lead deep-dive root cause investigations for test failures, utilizing data reproduction and fault simulation to solve complex hardware/firmware bugs. ? Infrastructure Development: Collaborate with design teams to architect and build specialized test scripts and hardware fixtures (HIL/Bench) to support diverse validation activities.

    Numbers & Facts

    LocationPalo Alto, CA

    Description

    Core Responsibilities

    ?       Cross-Functional Service Delivery: Serve as the primary validation partner for HW/SW design teams, providing centralized testing services that span the entire product lifecycle.

    ?       Test Strategy & Design: Develop comprehensive test plans, cases, and environmental strategies (DVP&R) that integrate Silicon Validation data into ECU-level functional testing.

    ?       Infrastructure Development: Collaborate with design teams to architect and build specialized test scripts and hardware fixtures (HIL/Bench) to support diverse validation activities.

    ?       Risk & Lifecycle Management: Participate in DFMEA, PFMEA, and Bill of Design (BoD) assessments to identify and mitigate risks to project timing and customer quality.

    Technical Execution & ECU Validation

    ?       High-Fidelity Testing: Plan and execute Durability, Electrical, and Functional validation for component-level ECUs.

    ?       Silicon Characterization: Validate Silicon-level performance (SoCs, Microcontrollers) within the ECU environment, focusing on power integrity, thermal boundaries, and signal analysis.

    ?       Failure Analysis: Lead deep-dive root cause investigations for test failures, utilizing data reproduction and fault simulation to solve complex hardware/firmware bugs.

    ?       Data Analytics: Provide advanced data analytics from conducted tests to drive design improvements and ensure compliance with Component Technical Specifications (CTS).

    Operational Excellence

    ?       Standardization: Maintain and enhance technical templates, "ADV Toolboxes," and Drawing Templates to ensure a unified validation approach across the engineering org.

    ?       Traceability: Establish and manage end-to-end traceability between requirements and test results using JAMA, JIRA, and version control systems.

    ?       Continuous Improvement: Manage "Lessons Learned" repositories to refine the Bill of Materials (BoM) and improve product performance and safety based on real-world test data.

    Qualifications

    ?       Education: BS/MS in Electrical Engineering, Computer Engineering or a related technical field.

    ?       Experience: 6+ years of experience in automotive or consumer electronics, with a strong focus on the design and development of electronics.

    ?       Domain Expertise: Strong background in Silicon-level validation and ECU component testing; Proficient in automotive communication protocols: CAN, CAN-FD, LIN, and Flexray. Working knowledge of ISO/IEC 17025 requirements for testing labs.

    ?       Lab Skills: Hands-on experience with bench-level testing [oscilloscopes, power supply, digital multimeter] & thermal chambers.

    ?       Software & Tooling: Proficiency in JIRA and JAMA for requirement management.

    ?       LabView, Test Stand, and CAPL programming skills (highly preferred).

    ?       Ability to interpret complex electrical schematics and mechanical drawings.

    ?       Soft Skills: A collaborative communicator capable of working cross-functionally in a fast-paced "Engineering Ops" service model.



    TECHNICAL SKILLS

    Must Have

    • Plan and execute Durability, Electrical, and Functional validation for component-level ECUs.

    • Validate Silicon-level performance (SoCs, Microcontrollers) within the ECU environment, focusing on power integrity, thermal boundaries, and signal analysis.

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