| Location | Cedar Rapids, IA |
| Salary | $110–$113 Per Hour |
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FPGA Design Engineer & Digital Signal Processing (DSP) Engineer
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Job Description
Job Title: FPGA Design Engineer & Digital Signal Processing (DSP) Engineer
Duration: 6+ Months
Location: Cedar Rapids, IA and El Segundo, CA
On-site Requirement: Full-time, on-site, air‑gapped lab environment
Payrates
FPGA Design Engineer -$100.hr to $110 hr
DSP Engineer - $110 to $130
Start: Immediate priority
We are seeking a skilled Digital Signal Processing (DSP) Engineer to design, develop, and optimize signal processing algorithms for real-time embedded systems.
The ideal candidate will have experience in DSP theory, algorithm development, and implementation using C/C++, MATLAB, and Python.
This role involves developing solutions for applications such as audio processing, wireless communications, radar, imaging, and embedded systems while collaborating with cross-functional engineering teams.
Key Requirements:
Preferred:
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Job details
Job ID JPC - 199997
Location Cedar Rapids, Iowa, United States
Work Model On-site
Employment Type W-2 Hourly
Experience 8-15 years
Pay Rate $110 - $113 (Hourly)
Posted February 5, 2026
Skills asic FPGA lab equipment
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