| Location | Tucson, AZ |
| Salary | $71–$74.29 Per Hour |
All current openings
FGPA Engineer job opportunity at Tucson, AZ
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Job Description
Indotronix is seeking an MAT Ramp: FGPA Engineer P2 for an exciting job opportunity in Tucson, AZ.
Job Title: MAT Ramp: FGPA Engineer P2
Location: Tucson, AZ 85756
Duration: 12 Months Contract
Pay Rate: $71/hr to $74.29/hr on W2
Schedule: 9/80 schedule
Job Description
The Effector Digital Products department is seeking an Electrical Engineer with FPGA development or verification experience to join our team.
Responsibilities to Anticipate:
Design and deliver production quality FPGA releases from initial proof of concept up to production Architect FPGA based systems to determine parts, interfaces, and Concept of Operations (CONOPS) Translate system level requirements into FPGA requirements Design and code in VHDL for reliability and maintainability Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage Help drive projects and execute to program schedules on time and budget Create complete documentation including requirements, verification plan, and user's guides. May support internal and external technical reviews
In this role you will develop FPGA designs for all major vendors and device families including:
Xilinx, Altera, and Microsemi.
Designs are implemented using VHDL for the following applications: gigabit serial interfaces, Radio Frequency (RF) and Electro Optical (EO) DSP, controls, data links, embedded processing and processor interfaces.
Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaborative modeling of algorithms, partition and perform code development, simulation, and place and route.
Designs are verified against requirements using both directed test and constrained random methodologies.
Design support is expected from requirements definition through integration and test.
Design documentation and configuration management are required.
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Job details
Job ID JPC - 210687
Location Tucson, Arizona, United States
Work Model On-site
Experience 2-5 years
Pay Rate $71 - $74.29
Posted October 1, 2026
Skills FPGA Xilinx Altera and Microsemi
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